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[TableGen][CGS] Print better errors on overlapping InstRW 

Differential Revision: https://reviews.llvm.org/D83588
This commit is contained in:
Jon Roelofs 2020-07-22 16:13:20 -06:00
parent a52aea0ba6
commit 88ce9f9b44
4 changed files with 48 additions and 20 deletions
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2
llvm/include/llvm/TableGen/Error.h
View File

@ -20,6 +20,8 @@ namespace llvm {
void PrintNote(const Twine &Msg);
void PrintNote(ArrayRef<SMLoc> NoteLoc, const Twine &Msg);
LLVM_ATTRIBUTE_NORETURN void PrintFatalNote(ArrayRef<SMLoc> ErrorLoc,
const Twine &Msg);
void PrintWarning(ArrayRef<SMLoc> WarningLoc, const Twine &Msg);
void PrintWarning(const char *Loc, const Twine &Msg);

7
llvm/lib/TableGen/Error.cpp
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@ -45,6 +45,13 @@ void PrintNote(ArrayRef<SMLoc> NoteLoc, const Twine &Msg) {
PrintMessage(NoteLoc, SourceMgr::DK_Note, Msg);
}
void PrintFatalNote(ArrayRef<SMLoc> NoteLoc, const Twine &Msg) {
PrintNote(NoteLoc, Msg);
// The following call runs the file cleanup handlers.
sys::RunInterruptHandlers();
std::exit(1);
}
void PrintWarning(ArrayRef<SMLoc> WarningLoc, const Twine &Msg) {
PrintMessage(WarningLoc, SourceMgr::DK_Warning, Msg);
}

21
llvm/test/TableGen/CodeGenSchedule-duplicate-instrw.td Normal file
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@ -0,0 +1,21 @@
// RUN: not llvm-tblgen --gen-subtarget -I %p/../../include -I %p/Common %s -o - 2>&1 | FileCheck %s
include "llvm/Target/Target.td"
def FakeTarget : Target { }
def FakeModel : SchedMachineModel { }
def WriteA : SchedWrite;
def WriteB : SchedWrite;
let SchedModel = NoSchedModel in {
def : InstRW<[WriteA], (instrs COPY)>;
def : InstRW<[WriteB], (instrs COPY)>;
// CHECK: [[@LINE-1]]:3: error: Overlapping InstRW definition for "COPY" also matches previous "(instrs COPY)".
// CHECK-NEXT: def : InstRW<[WriteB], (instrs COPY)>;
// CHECK: [[@LINE-6]]:3: note: Previous match was here.
// CHECK-NEXT: def : InstRW<[WriteA], (instrs COPY)>;
}

38
llvm/utils/TableGen/CodeGenSchedule.cpp
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@ -248,8 +248,7 @@ void CodeGenSchedModels::checkSTIPredicates() const {
}
PrintError(R->getLoc(), "STIPredicate " + Name + " multiply declared.");
PrintNote(It->second->getLoc(), "Previous declaration was here.");
PrintFatalError(R->getLoc(), "Invalid STIPredicateDecl found.");
PrintFatalNote(It->second->getLoc(), "Previous declaration was here.");
}
// Disallow InstructionEquivalenceClasses with an empty instruction list.
@ -454,10 +453,8 @@ void CodeGenSchedModels::checkMCInstPredicates() const {
PrintError(TIIPred->getLoc(),
"TIIPredicate " + Name + " is multiply defined.");
PrintNote(It->second->getLoc(),
" Previous definition of " + Name + " was here.");
PrintFatalError(TIIPred->getLoc(),
"Found conflicting definitions of TIIPredicate.");
PrintFatalNote(It->second->getLoc(),
" Previous definition of " + Name + " was here.");
}
}
@ -1083,13 +1080,14 @@ void CodeGenSchedModels::createInstRWClass(Record *InstRWDef) {
if (RWD->getValueAsDef("SchedModel") == RWModelDef &&
RWModelDef->getValueAsBit("FullInstRWOverlapCheck")) {
assert(!InstDefs.empty()); // Checked at function start.
PrintFatalError
(InstRWDef->getLoc(),
"Overlapping InstRW definition for \"" +
InstDefs.front()->getName() +
"\" also matches previous \"" +
RWD->getValue("Instrs")->getValue()->getAsString() +
"\".");
PrintError(
InstRWDef->getLoc(),
"Overlapping InstRW definition for \"" +
InstDefs.front()->getName() +
"\" also matches previous \"" +
RWD->getValue("Instrs")->getValue()->getAsString() +
"\".");
PrintFatalNote(RWD->getLoc(), "Previous match was here.");
}
}
LLVM_DEBUG(dbgs() << "InstRW: Reuse SC " << OldSCIdx << ":"
@ -1118,13 +1116,13 @@ void CodeGenSchedModels::createInstRWClass(Record *InstRWDef) {
for (Record *OldRWDef : SchedClasses[OldSCIdx].InstRWs) {
if (OldRWDef->getValueAsDef("SchedModel") == RWModelDef) {
assert(!InstDefs.empty()); // Checked at function start.
PrintFatalError
(InstRWDef->getLoc(),
"Overlapping InstRW definition for \"" +
InstDefs.front()->getName() +
"\" also matches previous \"" +
OldRWDef->getValue("Instrs")->getValue()->getAsString() +
"\".");
PrintError(
InstRWDef->getLoc(),
"Overlapping InstRW definition for \"" +
InstDefs.front()->getName() + "\" also matches previous \"" +
OldRWDef->getValue("Instrs")->getValue()->getAsString() +
"\".");
PrintFatalNote(OldRWDef->getLoc(), "Previous match was here.");
}
assert(OldRWDef != InstRWDef &&
"SchedClass has duplicate InstRW def");