[COFF, ARM64] Implement Intrinsic.sponentry for AArch64

Summary: This patch adds Intrinsic.sponentry. This intrinsic is required to correctly support setjmp for AArch64 Windows platform.

Reviewers: mgrang, TomTan, rnk, compnerd, mstorsjo, efriedma

Reviewed By: efriedma

Subscribers: majnemer, chrib, javed.absar, kristof.beyls, llvm-commits

Differential Revision: https://reviews.llvm.org/D53673

llvm-svn: 345791
This commit is contained in:
Mandeep Singh Grang 2018-10-31 23:16:20 +00:00
parent d548f0a214
commit 88ad9ac720
10 changed files with 191 additions and 30 deletions

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@ -10330,6 +10330,27 @@ of the obvious source-language caller.
This intrinsic is only implemented for x86.
'``llvm.sponentry``' Intrinsic
^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
Syntax:
"""""""
::
declare i8* @llvm.sponentry()
Overview:
"""""""""
The '``llvm.sponentry``' intrinsic returns the stack pointer value at
the entry of the current function calling this intrinsic.
Semantics:
""""""""""
Note this intrinsic is only verified on AArch64.
'``llvm.frameaddress``' Intrinsic
^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^

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@ -70,7 +70,7 @@ namespace ISD {
/// of the frame or return address to return. An index of zero corresponds
/// to the current function's frame or return address, an index of one to
/// the parent's frame or return address, and so on.
FRAMEADDR, RETURNADDR, ADDROFRETURNADDR,
FRAMEADDR, RETURNADDR, ADDROFRETURNADDR, SPONENTRY,
/// LOCAL_RECOVER - Represents the llvm.localrecover intrinsic.
/// Materializes the offset from the local object pointer of another

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@ -320,6 +320,7 @@ def int_gcwrite : Intrinsic<[],
def int_returnaddress : Intrinsic<[llvm_ptr_ty], [llvm_i32_ty], [IntrNoMem]>;
def int_addressofreturnaddress : Intrinsic<[llvm_ptr_ty], [], [IntrNoMem]>;
def int_frameaddress : Intrinsic<[llvm_ptr_ty], [llvm_i32_ty], [IntrNoMem]>;
def int_sponentry : Intrinsic<[llvm_ptr_ty], [], [IntrNoMem]>;
def int_read_register : Intrinsic<[llvm_anyint_ty], [llvm_metadata_ty],
[IntrReadMem], "llvm.read_register">;
def int_write_register : Intrinsic<[], [llvm_metadata_ty, llvm_anyint_ty],

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@ -1059,6 +1059,7 @@ void SelectionDAGLegalize::LegalizeOp(SDNode *Node) {
case ISD::FRAMEADDR:
case ISD::RETURNADDR:
case ISD::ADDROFRETURNADDR:
case ISD::SPONENTRY:
// These operations lie about being legal: when they claim to be legal,
// they should actually be custom-lowered.
Action = TLI.getOperationAction(Node->getOpcode(), Node->getValueType(0));

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@ -5050,6 +5050,10 @@ SelectionDAGBuilder::visitIntrinsicCall(const CallInst &I, unsigned Intrinsic) {
setValue(&I, DAG.getNode(ISD::ADDROFRETURNADDR, sdl,
TLI.getPointerTy(DAG.getDataLayout())));
return nullptr;
case Intrinsic::sponentry:
setValue(&I, DAG.getNode(ISD::SPONENTRY, sdl,
TLI.getPointerTy(DAG.getDataLayout())));
return nullptr;
case Intrinsic::frameaddress:
setValue(&I, DAG.getNode(ISD::FRAMEADDR, sdl,
TLI.getPointerTy(DAG.getDataLayout()),

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@ -124,6 +124,7 @@ std::string SDNode::getOperationName(const SelectionDAG *G) const {
case ISD::RETURNADDR: return "RETURNADDR";
case ISD::ADDROFRETURNADDR: return "ADDROFRETURNADDR";
case ISD::FRAMEADDR: return "FRAMEADDR";
case ISD::SPONENTRY: return "SPONENTRY";
case ISD::LOCAL_RECOVER: return "LOCAL_RECOVER";
case ISD::READ_REGISTER: return "READ_REGISTER";
case ISD::WRITE_REGISTER: return "WRITE_REGISTER";

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@ -3450,6 +3450,22 @@ bool AArch64FastISel::fastLowerIntrinsicCall(const IntrinsicInst *II) {
updateValueMap(II, SrcReg);
return true;
}
case Intrinsic::sponentry: {
MachineFrameInfo &MFI = FuncInfo.MF->getFrameInfo();
// SP = FP + Fixed Object + 16
MVT VT = TLI.getPointerTy(DL);
int FI = MFI.CreateFixedObject(4, 0, false);
unsigned ResultReg = createResultReg(TLI.getRegClassFor(VT));
BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DbgLoc,
TII.get(AArch64::ADDXri), ResultReg)
.addFrameIndex(FI)
.addImm(0)
.addImm(0);
updateValueMap(II, ResultReg);
return true;
}
case Intrinsic::memcpy:
case Intrinsic::memmove: {
const auto *MTI = cast<MemTransferInst>(II);

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@ -2863,6 +2863,8 @@ SDValue AArch64TargetLowering::LowerOperation(SDValue Op,
return LowerFP_EXTEND(Op, DAG);
case ISD::FRAMEADDR:
return LowerFRAMEADDR(Op, DAG);
case ISD::SPONENTRY:
return LowerSPONENTRY(Op, DAG);
case ISD::RETURNADDR:
return LowerRETURNADDR(Op, DAG);
case ISD::INSERT_VECTOR_ELT:
@ -5171,6 +5173,16 @@ SDValue AArch64TargetLowering::LowerFRAMEADDR(SDValue Op,
return FrameAddr;
}
SDValue AArch64TargetLowering::LowerSPONENTRY(SDValue Op,
SelectionDAG &DAG) const {
MachineFrameInfo &MFI = DAG.getMachineFunction().getFrameInfo();
EVT VT = getPointerTy(DAG.getDataLayout());
SDLoc DL(Op);
int FI = MFI.CreateFixedObject(4, 0, false);
return DAG.getFrameIndex(FI, VT);
}
// FIXME? Maybe this could be a TableGen attribute on some registers and
// this table could be generated automatically from RegInfo.
unsigned AArch64TargetLowering::getRegisterByName(const char* RegName, EVT VT,

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@ -617,6 +617,7 @@ private:
SDValue LowerVACOPY(SDValue Op, SelectionDAG &DAG) const;
SDValue LowerVAARG(SDValue Op, SelectionDAG &DAG) const;
SDValue LowerFRAMEADDR(SDValue Op, SelectionDAG &DAG) const;
SDValue LowerSPONENTRY(SDValue Op, SelectionDAG &DAG) const;
SDValue LowerRETURNADDR(SDValue Op, SelectionDAG &DAG) const;
SDValue LowerFLT_ROUNDS_(SDValue Op, SelectionDAG &DAG) const;
SDValue LowerINSERT_VECTOR_ELT(SDValue Op, SelectionDAG &DAG) const;

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@ -0,0 +1,104 @@
; RUN: llc -mtriple=aarch64-windows-msvc -disable-fp-elim %s -o - | FileCheck %s
; RUN: llc -mtriple=aarch64-windows-msvc -fast-isel -disable-fp-elim %s -o - | FileCheck %s
; RUN: llc -mtriple=aarch64-windows-msvc %s -o - | FileCheck %s --check-prefix=NOFP
; RUN: llc -mtriple=aarch64-windows-msvc -fast-isel %s -o - | FileCheck %s --check-prefix=NOFP
@env2 = common dso_local global [24 x i64]* null, align 8
define dso_local void @bar() {
%1 = call i8* @llvm.sponentry()
%2 = load [24 x i64]*, [24 x i64]** @env2, align 8
%3 = getelementptr inbounds [24 x i64], [24 x i64]* %2, i32 0, i32 0
%4 = bitcast i64* %3 to i8*
%5 = call i32 @_setjmpex(i8* %4, i8* %1) #2
ret void
}
; CHECK: bar:
; CHECK: mov x29, sp
; CHECK: add x1, x29, #16
; CEHCK: bl _setjmpex
; NOFP: str x30, [sp, #-16]!
; NOFP: add x1, sp, #16
define dso_local void @foo([24 x i64]*) {
%2 = alloca [24 x i64]*, align 8
%3 = alloca i32, align 4
%4 = alloca [100 x i32], align 4
store [24 x i64]* %0, [24 x i64]** %2, align 8
%5 = call i8* @llvm.sponentry()
%6 = load [24 x i64]*, [24 x i64]** %2, align 8
%7 = getelementptr inbounds [24 x i64], [24 x i64]* %6, i32 0, i32 0
%8 = bitcast i64* %7 to i8*
%9 = call i32 @_setjmpex(i8* %8, i8* %5)
store i32 %9, i32* %3, align 4
ret void
}
; CHECK: foo:
; CHECK: sub sp, sp, #448
; CHECK: add x29, sp, #432
; CHECK: add x1, x29, #16
; CEHCK: bl _setjmpex
; NOFP: sub sp, sp, #432
; NOFP: add x1, sp, #432
define dso_local void @var_args(i8*, ...) {
%2 = alloca i8*, align 8
%3 = alloca i8*, align 8
store i8* %0, i8** %2, align 8
%4 = bitcast i8** %3 to i8*
call void @llvm.va_start(i8* %4)
%5 = load i8*, i8** %3, align 8
%6 = getelementptr inbounds i8, i8* %5, i64 8
store i8* %6, i8** %3, align 8
%7 = bitcast i8* %5 to i32*
%8 = load i32, i32* %7, align 8
%9 = bitcast i8** %3 to i8*
call void @llvm.va_end(i8* %9)
%10 = call i8* @llvm.sponentry()
%11 = load [24 x i64]*, [24 x i64]** @env2, align 8
%12 = getelementptr inbounds [24 x i64], [24 x i64]* %11, i32 0, i32 0
%13 = bitcast i64* %12 to i8*
%14 = call i32 @_setjmpex(i8* %13, i8* %10) #3
ret void
}
; CHECK: var_args:
; CHECK: sub sp, sp, #96
; CHECK: add x29, sp, #16
; CHECK: add x1, x29, #80
; CEHCK: bl _setjmpex
; NOFP: sub sp, sp, #96
; NOFP: add x1, sp, #96
define dso_local void @manyargs(i64 %x1, i64 %x2, i64 %x3, i64 %x4, i64 %x5, i64 %x6, i64 %x7, i64 %x8, i64 %x9, i64 %x10) {
%1 = call i8* @llvm.sponentry()
%2 = load [24 x i64]*, [24 x i64]** @env2, align 8
%3 = getelementptr inbounds [24 x i64], [24 x i64]* %2, i32 0, i32 0
%4 = bitcast i64* %3 to i8*
%5 = call i32 @_setjmpex(i8* %4, i8* %1) #2
ret void
}
; CHECK: manyargs:
; CHECK: stp x29, x30, [sp, #-16]!
; CHECK: add x1, x29, #16
; NOFP: str x30, [sp, #-16]!
; NOFP: add x1, sp, #16
; Function Attrs: nounwind readnone
declare i8* @llvm.sponentry()
; Function Attrs: returns_twice
declare dso_local i32 @_setjmpex(i8*, i8*)
; Function Attrs: nounwind
declare void @llvm.va_start(i8*) #1
; Function Attrs: nounwind
declare void @llvm.va_end(i8*) #1