forked from OSchip/llvm-project
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7db3bfbd45
commit
88981ff168
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@ -2122,9 +2122,8 @@ def LDRD_POST: AI3ldstidx<0b1101, 0, 0, (outs GPR:$Rt, GPR:$Rt2, GPR:$Rn_wb),
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} // hasExtraDefRegAllocReq = 1
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} // mayLoad = 1, neverHasSideEffects = 1
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// LDRT, LDRBT, LDRSBT, LDRHT, LDRSHT are for disassembly only.
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// LDRT, LDRBT, LDRSBT, LDRHT, LDRSHT.
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let mayLoad = 1, neverHasSideEffects = 1 in {
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def LDRT_POST_REG : AI2ldstidx<1, 0, 0, (outs GPR:$Rt, GPR:$Rn_wb),
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(ins addr_offset_none:$addr, am2offset_reg:$offset),
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IndexModePost, LdFrm, IIC_iLoad_ru,
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