forked from OSchip/llvm-project
[llvm-mca] Add branch forms of ALU instructions to Cortex-A57 test
This commit is contained in:
parent
55ea017759
commit
885d3f4129
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@ -3,6 +3,7 @@
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.text
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adc r1, r2, #15
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adc pc, r2, #16
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adc r1, r2, #240
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adc r1, r2, #3840
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adc r1, r2, #61440
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@ -18,7 +19,9 @@
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adcseq r1, r2, #3840
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adceq r1, r2, #3840
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adc r4, r5, r6
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adc pc, r5, r6
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adc r4, r5, r6, lsl #1
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adc pc, r5, r6, lsl #4
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adc r4, r5, r6, lsl #31
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adc r4, r5, r6, lsr #1
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adc r4, r5, r6, lsr #31
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@ -27,8 +30,10 @@
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adc r4, r5, r6, asr #31
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adc r4, r5, r6, asr #32
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adc r4, r5, r6, ror #1
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adc pc, r5, r6, ror #2
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adc r4, r5, r6, ror #31
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adc r6, r7, r8, lsl r9
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adc pc, r7, r8, lsl r9
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adc r6, r7, r8, lsr r9
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adc r6, r7, r8, asr r9
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adc r6, r7, r8, ror r9
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@ -79,8 +84,10 @@
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adds r7, r8, #-2147483638
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adds r7, r8, #40, #2
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add r2, pc, #3
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and pc, pc, #8
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sub r2, pc, #3
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sub r1, pc, #0
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sub pc, r2, #8
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sub r1, pc, #301989888
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add r1, pc, #301989888
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and r10, r1, #15
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@ -128,6 +135,7 @@
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bic r6, r7, r8, ror r2
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bic r10, r1, r6, rrx
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bic r1, r1, #15
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bic pc, r1, #15
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bic r10, r10, r1
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bic r10, r10, r1, lsl #10
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bic r10, r10, r1, lsr #10
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@ -224,6 +232,7 @@
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eor r7, r8, #-2147483638
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eor r7, r8, #40, #2
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eor r4, r5, r6
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eor pc, r5, r6
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eor r4, r5, r6, lsl #5
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eor r4, r5, r6, lsr #5
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eor r4, r5, r6, lsr #5
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@ -267,6 +276,7 @@
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mls r2, r5, r6, r3
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mlsne r2, r5, r6, r3
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mov r3, #7
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mov pc, r1
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mov r4, #4080
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mov r5, #16711680
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mov sp, #35
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@ -277,6 +287,7 @@
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movw r9, #65535
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movw sp, #1193
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movs r3, #7
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movs pc, r3
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movs r11, #99
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movs r11, #240, #30
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moveq r4, #4080
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@ -285,6 +296,7 @@
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movs r2, r3
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moveq r2, r3
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movseq r2, r3
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movseq pc, r2
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movt r3, #7
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movt r6, #65535
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movt sp, #3397
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@ -328,6 +340,7 @@
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mulgt r5, r6, r7
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mulsle r5, r6, r7
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mvn r3, #7
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mvn pc, r8
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mvn r4, #4080
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mvn r5, #16711680
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mvn r7, #40, #2
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@ -336,6 +349,7 @@
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mvns r11, #240, #30
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mvns r11, #-2147483638
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mvneq r4, #4080
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mvneq pc, r9
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mvnseq r5, #16711680
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mvn r2, r3
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mvns r2, r3
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@ -860,6 +874,7 @@
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# CHECK: [1] [2] [3] [4] [5] [6] Instructions:
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# CHECK-NEXT: 1 1 0.50 adc r1, r2, #15
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# CHECK-NEXT: 1 1 0.50 adc pc, r2, #16
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# CHECK-NEXT: 1 1 0.50 adc r1, r2, #240
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# CHECK-NEXT: 1 1 0.50 adc r1, r2, #3840
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# CHECK-NEXT: 1 1 0.50 adc r1, r2, #61440
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@ -875,7 +890,9 @@
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# CHECK-NEXT: 1 1 0.50 adcseq r1, r2, #3840
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# CHECK-NEXT: 1 1 0.50 adceq r1, r2, #3840
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# CHECK-NEXT: 1 1 0.50 adc r4, r5, r6
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# CHECK-NEXT: 1 1 0.50 adc pc, r5, r6
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# CHECK-NEXT: 1 2 1.00 adc r4, r5, r6, lsl #1
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# CHECK-NEXT: 1 2 1.00 adc pc, r5, r6, lsl #4
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# CHECK-NEXT: 1 2 1.00 adc r4, r5, r6, lsl #31
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# CHECK-NEXT: 1 2 1.00 adc r4, r5, r6, lsr #1
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# CHECK-NEXT: 1 2 1.00 adc r4, r5, r6, lsr #31
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@ -884,6 +901,7 @@
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# CHECK-NEXT: 1 2 1.00 adc r4, r5, r6, asr #31
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# CHECK-NEXT: 1 2 1.00 adc r4, r5, r6, asr #32
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# CHECK-NEXT: 1 2 1.00 adc r4, r5, r6, ror #1
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# CHECK-NEXT: 1 2 1.00 adc pc, r5, r6, ror #2
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# CHECK-NEXT: 1 2 1.00 adc r4, r5, r6, ror #31
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# CHECK-NEXT: 1 2 1.00 adc r6, r7, r8, lsl r9
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# CHECK-NEXT: 1 2 1.00 adc r6, r7, r8, lsr r9
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@ -936,8 +954,10 @@
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# CHECK-NEXT: 1 1 0.50 adds r7, r8, #-2147483638
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# CHECK-NEXT: 1 1 0.50 adds r7, r8, #40, #2
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# CHECK-NEXT: 1 1 0.50 adr r2, #3
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# CHECK-NEXT: 1 1 0.50 and pc, pc, #8
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# CHECK-NEXT: 1 1 0.50 sub r2, pc, #3
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# CHECK-NEXT: 1 1 0.50 sub r1, pc, #0
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# CHECK-NEXT: 1 1 0.50 sub pc, r2, #8
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# CHECK-NEXT: 1 1 0.50 sub r1, pc, #301989888
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# CHECK-NEXT: 1 1 0.50 adr r1, #301989888
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# CHECK-NEXT: 1 1 0.50 and r10, r1, #15
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@ -985,6 +1005,7 @@
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# CHECK-NEXT: 1 2 1.00 bic r6, r7, r8, ror r2
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# CHECK-NEXT: 1 2 1.00 bic r10, r1, r6, rrx
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# CHECK-NEXT: 1 1 0.50 bic r1, r1, #15
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# CHECK-NEXT: 1 1 0.50 bic pc, r1, #15
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# CHECK-NEXT: 1 1 0.50 bic r10, r10, r1
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# CHECK-NEXT: 1 2 1.00 bic r10, r10, r1, lsl #10
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# CHECK-NEXT: 1 2 1.00 bic r10, r10, r1, lsr #10
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# CHECK-NEXT: 1 1 0.50 eor r7, r8, #-2147483638
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# CHECK-NEXT: 1 1 0.50 eor r7, r8, #40, #2
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# CHECK-NEXT: 1 1 0.50 eor r4, r5, r6
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# CHECK-NEXT: 1 1 0.50 eor pc, r5, r6
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# CHECK-NEXT: 1 2 1.00 eor r4, r5, r6, lsl #5
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# CHECK-NEXT: 1 2 1.00 eor r4, r5, r6, lsr #5
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# CHECK-NEXT: 1 2 1.00 eor r4, r5, r6, lsr #5
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@ -1124,6 +1146,7 @@
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# CHECK-NEXT: 1 3 1.00 mls r2, r5, r6, r3
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# CHECK-NEXT: 1 3 1.00 mlsne r2, r5, r6, r3
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# CHECK-NEXT: 1 1 0.50 mov r3, #7
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# CHECK-NEXT: 1 1 0.50 mov pc, r1
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# CHECK-NEXT: 1 1 0.50 mov r4, #4080
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# CHECK-NEXT: 1 1 0.50 mov r5, #16711680
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# CHECK-NEXT: 1 1 0.50 mov sp, #35
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# CHECK-NEXT: 1 1 0.50 movw r9, #65535
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# CHECK-NEXT: 1 1 0.50 movw sp, #1193
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# CHECK-NEXT: 1 1 0.50 movs r3, #7
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# CHECK-NEXT: 1 1 0.50 movs pc, r3
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# CHECK-NEXT: 1 1 0.50 movs r11, #99
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# CHECK-NEXT: 1 1 0.50 movs r11, #240, #30
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# CHECK-NEXT: 1 1 0.50 moveq r4, #4080
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# CHECK-NEXT: 1 1 0.50 movs r2, r3
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# CHECK-NEXT: 1 1 0.50 moveq r2, r3
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# CHECK-NEXT: 1 1 0.50 movseq r2, r3
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# CHECK-NEXT: 1 1 0.50 movseq pc, r2
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# CHECK-NEXT: 1 2 1.00 movt r3, #7
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# CHECK-NEXT: 1 2 1.00 movt r6, #65535
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# CHECK-NEXT: 1 2 1.00 movt sp, #3397
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@ -1185,6 +1210,7 @@
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# CHECK-NEXT: 1 3 1.00 mulgt r5, r6, r7
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# CHECK-NEXT: 1 3 1.00 mulsle r5, r6, r7
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# CHECK-NEXT: 1 1 0.50 mvn r3, #7
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# CHECK-NEXT: 1 1 0.50 mvn pc, r8
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# CHECK-NEXT: 1 1 0.50 mvn r4, #4080
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# CHECK-NEXT: 1 1 0.50 mvn r5, #16711680
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# CHECK-NEXT: 1 1 0.50 mvn r7, #40, #2
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@ -1193,6 +1219,7 @@
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# CHECK-NEXT: 1 1 0.50 mvns r11, #240, #30
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# CHECK-NEXT: 1 1 0.50 mvns r11, #-2147483638
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# CHECK-NEXT: 1 1 0.50 mvneq r4, #4080
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# CHECK-NEXT: 1 1 0.50 mvneq pc, r9
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# CHECK-NEXT: 1 1 0.50 mvnseq r5, #16711680
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# CHECK-NEXT: 1 1 0.50 mvn r2, r3
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# CHECK-NEXT: 1 1 0.50 mvns r2, r3
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@ -1719,11 +1746,12 @@
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# CHECK: Resource pressure per iteration:
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# CHECK-NEXT: [0] [1.0] [1.1] [2] [3] [4] [5] [6]
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# CHECK-NEXT: 8.00 139.00 139.00 53.00 522.00 12.00 - -
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# CHECK-NEXT: 8.00 144.50 144.50 53.00 524.00 12.00 - -
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# CHECK: Resource pressure by instruction:
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# CHECK-NEXT: [0] [1.0] [1.1] [2] [3] [4] [5] [6] Instructions:
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# CHECK-NEXT: - 0.50 0.50 - - - - - adc r1, r2, #15
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# CHECK-NEXT: - 0.50 0.50 - - - - - adc pc, r2, #16
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# CHECK-NEXT: - 0.50 0.50 - - - - - adc r1, r2, #240
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# CHECK-NEXT: - 0.50 0.50 - - - - - adc r1, r2, #3840
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# CHECK-NEXT: - 0.50 0.50 - - - - - adc r1, r2, #61440
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@ -1739,7 +1767,9 @@
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# CHECK-NEXT: - 0.50 0.50 - - - - - adcseq r1, r2, #3840
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# CHECK-NEXT: - 0.50 0.50 - - - - - adceq r1, r2, #3840
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# CHECK-NEXT: - 0.50 0.50 - - - - - adc r4, r5, r6
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# CHECK-NEXT: - 0.50 0.50 - - - - - adc pc, r5, r6
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# CHECK-NEXT: - - - - 1.00 - - - adc r4, r5, r6, lsl #1
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# CHECK-NEXT: - - - - 1.00 - - - adc pc, r5, r6, lsl #4
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# CHECK-NEXT: - - - - 1.00 - - - adc r4, r5, r6, lsl #31
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# CHECK-NEXT: - - - - 1.00 - - - adc r4, r5, r6, lsr #1
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# CHECK-NEXT: - - - - 1.00 - - - adc r4, r5, r6, lsr #31
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@ -1748,6 +1778,7 @@
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# CHECK-NEXT: - - - - 1.00 - - - adc r4, r5, r6, asr #31
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# CHECK-NEXT: - - - - 1.00 - - - adc r4, r5, r6, asr #32
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# CHECK-NEXT: - - - - 1.00 - - - adc r4, r5, r6, ror #1
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# CHECK-NEXT: - - - - 1.00 - - - adc pc, r5, r6, ror #2
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# CHECK-NEXT: - - - - 1.00 - - - adc r4, r5, r6, ror #31
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# CHECK-NEXT: - - - - 1.00 - - - adc r6, r7, r8, lsl r9
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# CHECK-NEXT: - - - - 1.00 - - - adc r6, r7, r8, lsr r9
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@ -1800,8 +1831,10 @@
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# CHECK-NEXT: - 0.50 0.50 - - - - - adds r7, r8, #-2147483638
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# CHECK-NEXT: - 0.50 0.50 - - - - - adds r7, r8, #40, #2
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# CHECK-NEXT: - 0.50 0.50 - - - - - adr r2, #3
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# CHECK-NEXT: - 0.50 0.50 - - - - - and pc, pc, #8
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# CHECK-NEXT: - 0.50 0.50 - - - - - sub r2, pc, #3
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# CHECK-NEXT: - 0.50 0.50 - - - - - sub r1, pc, #0
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# CHECK-NEXT: - 0.50 0.50 - - - - - sub pc, r2, #8
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# CHECK-NEXT: - 0.50 0.50 - - - - - sub r1, pc, #301989888
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# CHECK-NEXT: - 0.50 0.50 - - - - - adr r1, #301989888
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# CHECK-NEXT: - 0.50 0.50 - - - - - and r10, r1, #15
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@ -1849,6 +1882,7 @@
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# CHECK-NEXT: - - - - 1.00 - - - bic r6, r7, r8, ror r2
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# CHECK-NEXT: - - - - 1.00 - - - bic r10, r1, r6, rrx
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# CHECK-NEXT: - 0.50 0.50 - - - - - bic r1, r1, #15
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# CHECK-NEXT: - 0.50 0.50 - - - - - bic pc, r1, #15
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# CHECK-NEXT: - 0.50 0.50 - - - - - bic r10, r10, r1
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# CHECK-NEXT: - - - - 1.00 - - - bic r10, r10, r1, lsl #10
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# CHECK-NEXT: - - - - 1.00 - - - bic r10, r10, r1, lsr #10
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@ -1945,6 +1979,7 @@
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# CHECK-NEXT: - 0.50 0.50 - - - - - eor r7, r8, #-2147483638
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# CHECK-NEXT: - 0.50 0.50 - - - - - eor r7, r8, #40, #2
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# CHECK-NEXT: - 0.50 0.50 - - - - - eor r4, r5, r6
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# CHECK-NEXT: - 0.50 0.50 - - - - - eor pc, r5, r6
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# CHECK-NEXT: - - - - 1.00 - - - eor r4, r5, r6, lsl #5
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# CHECK-NEXT: - - - - 1.00 - - - eor r4, r5, r6, lsr #5
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# CHECK-NEXT: - - - - 1.00 - - - eor r4, r5, r6, lsr #5
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@ -1988,6 +2023,7 @@
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# CHECK-NEXT: - - - - 1.00 - - - mls r2, r5, r6, r3
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# CHECK-NEXT: - - - - 1.00 - - - mlsne r2, r5, r6, r3
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# CHECK-NEXT: - 0.50 0.50 - - - - - mov r3, #7
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# CHECK-NEXT: - 0.50 0.50 - - - - - mov pc, r1
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# CHECK-NEXT: - 0.50 0.50 - - - - - mov r4, #4080
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# CHECK-NEXT: - 0.50 0.50 - - - - - mov r5, #16711680
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# CHECK-NEXT: - 0.50 0.50 - - - - - mov sp, #35
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@ -1998,6 +2034,7 @@
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# CHECK-NEXT: - 0.50 0.50 - - - - - movw r9, #65535
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# CHECK-NEXT: - 0.50 0.50 - - - - - movw sp, #1193
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# CHECK-NEXT: - 0.50 0.50 - - - - - movs r3, #7
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# CHECK-NEXT: - 0.50 0.50 - - - - - movs pc, r3
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# CHECK-NEXT: - 0.50 0.50 - - - - - movs r11, #99
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# CHECK-NEXT: - 0.50 0.50 - - - - - movs r11, #240, #30
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# CHECK-NEXT: - 0.50 0.50 - - - - - moveq r4, #4080
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@ -2006,6 +2043,7 @@
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# CHECK-NEXT: - 0.50 0.50 - - - - - movs r2, r3
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# CHECK-NEXT: - 0.50 0.50 - - - - - moveq r2, r3
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# CHECK-NEXT: - 0.50 0.50 - - - - - movseq r2, r3
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# CHECK-NEXT: - 0.50 0.50 - - - - - movseq pc, r2
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# CHECK-NEXT: - - - - 1.00 - - - movt r3, #7
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# CHECK-NEXT: - - - - 1.00 - - - movt r6, #65535
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# CHECK-NEXT: - - - - 1.00 - - - movt sp, #3397
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@ -2049,6 +2087,7 @@
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# CHECK-NEXT: - - - - 1.00 - - - mulgt r5, r6, r7
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# CHECK-NEXT: - - - - 1.00 - - - mulsle r5, r6, r7
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# CHECK-NEXT: - 0.50 0.50 - - - - - mvn r3, #7
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# CHECK-NEXT: - 0.50 0.50 - - - - - mvn pc, r8
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# CHECK-NEXT: - 0.50 0.50 - - - - - mvn r4, #4080
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# CHECK-NEXT: - 0.50 0.50 - - - - - mvn r5, #16711680
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# CHECK-NEXT: - 0.50 0.50 - - - - - mvn r7, #40, #2
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@ -2057,6 +2096,7 @@
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# CHECK-NEXT: - 0.50 0.50 - - - - - mvns r11, #240, #30
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# CHECK-NEXT: - 0.50 0.50 - - - - - mvns r11, #-2147483638
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# CHECK-NEXT: - 0.50 0.50 - - - - - mvneq r4, #4080
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# CHECK-NEXT: - 0.50 0.50 - - - - - mvneq pc, r9
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# CHECK-NEXT: - 0.50 0.50 - - - - - mvnseq r5, #16711680
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# CHECK-NEXT: - 0.50 0.50 - - - - - mvn r2, r3
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# CHECK-NEXT: - 0.50 0.50 - - - - - mvns r2, r3
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