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Fix comment. 

llvm-svn: 100259
This commit is contained in:
Johnny Chen 2010-04-03 01:17:30 +00:00
parent 58e83eb50d
commit 884e66a545
1 changed files with 2 additions and 2 deletions
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4
llvm/lib/Target/ARM/Disassembler/ARMDisassemblerCore.cpp
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@ -478,7 +478,7 @@ static inline ARM_AM::AMSubMode getAMSubModeForBits(unsigned bits) {
/// followed by possible src(s).
///
/// The processing of the predicate, and the 'S' modifier bit, if MI modifies
/// the CPSR, is factored into ARMBasicMCBuilder's class method named
/// the CPSR, is factored into ARMBasicMCBuilder's method named
/// TryPredicateAndSBitModifier.
static bool DisassemblePseudo(MCInst &MI, unsigned Opcode, uint32_t insn,
@ -3159,7 +3159,7 @@ ARMAlgorithm *ARMAlgorithm::GetInstance(ARMFormat Format) {
/// The general idea is to set the Opcode for the MCInst, followed by adding
/// the appropriate MCOperands to the MCInst. ARM Basic MC Builder delegates
/// to the Algo (ARM Disassemble Algorithm) object to perform Format-specific
/// disassembly, followed by class method TryPredicateAndSBitModifier() to do
/// disassembly, followed by TryPredicateAndSBitModifier() to do
/// PredicateOperand and OptionalDefOperand which follow the Dst/Src Operands.
bool ARMBasicMCBuilder::BuildIt(MCInst &MI, uint32_t insn) {
// Stage 1 sets the Opcode.