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[Alignment][NFC] Use Align for TargetFrameLowering/Subtarget 

Summary:
This is patch is part of a series to introduce an Alignment type.
See this thread for context: http://lists.llvm.org/pipermail/llvm-dev/2019-July/133851.html
See this patch for the introduction of the type: https://reviews.llvm.org/D64790

Reviewers: courbet

Subscribers: jholewinski, arsenm, dschuff, jyknight, dylanmckay, sdardis, nemanjai, jvesely, nhaehnle, sbc100, jgravelle-google, hiraditya, aheejin, kbarton, fedor.sergeev, asb, rbar, johnrusso, simoncook, apazos, sabuasal, niosHD, jrtc27, MaskRay, zzheng, edward-jones, atanasyan, rogfer01, MartinMosbeck, brucehoult, the_o, PkmX, jocewei, jsji, Jim, lenary, s.egerton, pzheng, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D68993

llvm-svn: 375084
This commit is contained in:
Guillaume Chatelet 2019-10-17 07:49:39 +00:00
parent 943afb57aa
commit 882c43d703
35 changed files with 95 additions and 89 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

10
llvm/include/llvm/CodeGen/TargetFrameLowering.h
View File

@ -54,15 +54,15 @@ public:
};
private:
StackDirection StackDir;
unsigned StackAlignment;
Align StackAlignment;
unsigned TransientStackAlignment;
int LocalAreaOffset;
bool StackRealignable;
public:
TargetFrameLowering(StackDirection D, unsigned StackAl, int LAO,
TargetFrameLowering(StackDirection D, Align StackAl, int LAO,
unsigned TransAl = 1, bool StackReal = true)
: StackDir(D), StackAlignment(StackAl), TransientStackAlignment(TransAl),
LocalAreaOffset(LAO), StackRealignable(StackReal) {}
: StackDir(D), StackAlignment(StackAl), TransientStackAlignment(TransAl),
LocalAreaOffset(LAO), StackRealignable(StackReal) {}
virtual ~TargetFrameLowering();
@ -77,7 +77,7 @@ public:
/// stack pointer must be aligned on entry to a function. Typically, this
/// is the largest alignment for any data object in the target.
///
unsigned getStackAlignment() const { return StackAlignment; }
unsigned getStackAlignment() const { return StackAlignment.value(); }
/// alignSPAdjust - This method aligns the stack adjustment to the correct
/// alignment.

2
llvm/lib/Target/AArch64/AArch64FrameLowering.h
View File

@ -21,7 +21,7 @@ namespace llvm {
class AArch64FrameLowering : public TargetFrameLowering {
public:
explicit AArch64FrameLowering()
: TargetFrameLowering(StackGrowsDown, 16, 0, 16,
: TargetFrameLowering(StackGrowsDown, Align(16), 0, 16,
true /*StackRealignable*/) {}
void emitCalleeSavedFrameMoves(MachineBasicBlock &MBB,

6
llvm/lib/Target/AMDGPU/AMDGPUFrameLowering.cpp
View File

@ -13,9 +13,9 @@
#include "AMDGPUFrameLowering.h"
using namespace llvm;
AMDGPUFrameLowering::AMDGPUFrameLowering(StackDirection D, unsigned StackAl,
int LAO, unsigned TransAl)
: TargetFrameLowering(D, StackAl, LAO, TransAl) { }
AMDGPUFrameLowering::AMDGPUFrameLowering(StackDirection D, Align StackAl,
int LAO, unsigned TransAl)
: TargetFrameLowering(D, StackAl, LAO, TransAl) {}
AMDGPUFrameLowering::~AMDGPUFrameLowering() = default;

2
llvm/lib/Target/AMDGPU/AMDGPUFrameLowering.h
View File

@ -25,7 +25,7 @@ namespace llvm {
/// See TargetFrameInfo for more comments.
class AMDGPUFrameLowering : public TargetFrameLowering {
public:
AMDGPUFrameLowering(StackDirection D, unsigned StackAl, int LAO,
AMDGPUFrameLowering(StackDirection D, Align StackAl, int LAO,
unsigned TransAl = 1);
~AMDGPUFrameLowering() override;

8
llvm/lib/Target/AMDGPU/AMDGPUSubtarget.h
View File

@ -866,9 +866,7 @@ public:
// on the pointer value itself may rely on the alignment / known low bits of
// the pointer. Set this to something above the minimum to avoid needing
// dynamic realignment in common cases.
unsigned getStackAlignment() const {
return 16;
}
Align getStackAlignment() const { return Align(16); }
bool enableMachineScheduler() const override {
return true;
@ -1257,9 +1255,7 @@ public:
return Gen;
}
unsigned getStackAlignment() const {
return 4;
}
Align getStackAlignment() const { return Align(4); }
R600Subtarget &initializeSubtargetDependencies(const Triple &TT,
StringRef GPU, StringRef FS);

6
llvm/lib/Target/AMDGPU/R600FrameLowering.h
View File

@ -15,9 +15,9 @@ namespace llvm {
class R600FrameLowering : public AMDGPUFrameLowering {
public:
R600FrameLowering(StackDirection D, unsigned StackAl, int LAO,
unsigned TransAl = 1) :
AMDGPUFrameLowering(D, StackAl, LAO, TransAl) {}
R600FrameLowering(StackDirection D, Align StackAl, int LAO,
unsigned TransAl = 1)
: AMDGPUFrameLowering(D, StackAl, LAO, TransAl) {}
~R600FrameLowering() override;
void emitPrologue(MachineFunction &MF,

6
llvm/lib/Target/AMDGPU/SIFrameLowering.h
View File

@ -20,9 +20,9 @@ class GCNSubtarget;
class SIFrameLowering final : public AMDGPUFrameLowering {
public:
SIFrameLowering(StackDirection D, unsigned StackAl, int LAO,
unsigned TransAl = 1) :
AMDGPUFrameLowering(D, StackAl, LAO, TransAl) {}
SIFrameLowering(StackDirection D, Align StackAl, int LAO,
unsigned TransAl = 1)
: AMDGPUFrameLowering(D, StackAl, LAO, TransAl) {}
~SIFrameLowering() override = default;
void emitEntryFunctionPrologue(MachineFunction &MF,

14
llvm/lib/Target/AMDGPU/SIISelLowering.cpp
View File

@ -2816,7 +2816,7 @@ SDValue SITargetLowering::LowerCall(CallLoweringInfo &CLI,
int32_t Offset = LocMemOffset;
SDValue PtrOff = DAG.getConstant(Offset, DL, PtrVT);
unsigned Align = 0;
MaybeAlign Alignment;
if (IsTailCall) {
ISD::ArgFlagsTy Flags = Outs[realArgIdx].Flags;
@ -2824,8 +2824,10 @@ SDValue SITargetLowering::LowerCall(CallLoweringInfo &CLI,
Flags.getByValSize() : VA.getValVT().getStoreSize();
// FIXME: We can have better than the minimum byval required alignment.
Align = Flags.isByVal() ? Flags.getByValAlign() :
MinAlign(Subtarget->getStackAlignment(), Offset);
Alignment =
Flags.isByVal()
? MaybeAlign(Flags.getByValAlign())
: commonAlignment(Subtarget->getStackAlignment(), Offset);
Offset = Offset + FPDiff;
int FI = MFI.CreateFixedObject(OpSize, Offset, true);
@ -2844,7 +2846,8 @@ SDValue SITargetLowering::LowerCall(CallLoweringInfo &CLI,
} else {
DstAddr = PtrOff;
DstInfo = MachinePointerInfo::getStack(MF, LocMemOffset);
Align = MinAlign(Subtarget->getStackAlignment(), LocMemOffset);
Alignment =
commonAlignment(Subtarget->getStackAlignment(), LocMemOffset);
}
if (Outs[i].Flags.isByVal()) {
@ -2859,7 +2862,8 @@ SDValue SITargetLowering::LowerCall(CallLoweringInfo &CLI,
MemOpChains.push_back(Cpy);
} else {
SDValue Store = DAG.getStore(Chain, DL, Arg, DstAddr, DstInfo, Align);
SDValue Store = DAG.getStore(Chain, DL, Arg, DstAddr, DstInfo,
Alignment ? Alignment->value() : 0);
MemOpChains.push_back(Store);
}
}

4
llvm/lib/Target/ARC/ARCFrameLowering.h
View File

@ -27,8 +27,8 @@ class ARCInstrInfo;
class ARCFrameLowering : public TargetFrameLowering {
public:
ARCFrameLowering(const ARCSubtarget &st)
: TargetFrameLowering(TargetFrameLowering::StackGrowsDown, 4, 0), ST(st) {
}
: TargetFrameLowering(TargetFrameLowering::StackGrowsDown, Align(4), 0),
ST(st) {}
/// Insert Prologue into the function.
void emitPrologue(MachineFunction &MF, MachineBasicBlock &MBB) const override;

4
llvm/lib/Target/ARM/ARMSubtarget.cpp
View File

@ -205,9 +205,9 @@ void ARMSubtarget::initSubtargetFeatures(StringRef CPU, StringRef FS) {
NoARM = true;
if (isAAPCS_ABI())
stackAlignment = 8;
stackAlignment = Align(8);
if (isTargetNaCl() || isAAPCS16_ABI())
stackAlignment = 16;
stackAlignment = Align(16);
// FIXME: Completely disable sibcall for Thumb1 since ThumbRegisterInfo::
// emitEpilogue is not ready for them. Thumb tail calls also use t2B, as

4
llvm/lib/Target/ARM/ARMSubtarget.h
View File

@ -449,7 +449,7 @@ protected:
/// stackAlignment - The minimum alignment known to hold of the stack frame on
/// entry to the function and which must be maintained by every function.
unsigned stackAlignment = 4;
Align stackAlignment = Align(4);
/// CPUString - String name of used CPU.
std::string CPUString;
@ -816,7 +816,7 @@ public:
/// getStackAlignment - Returns the minimum alignment known to hold of the
/// stack frame on entry to the function and which must be maintained by every
/// function for this subtarget.
unsigned getStackAlignment() const { return stackAlignment; }
Align getStackAlignment() const { return stackAlignment; }
unsigned getMaxInterleaveFactor() const { return MaxInterleaveFactor; }

3
llvm/lib/Target/AVR/AVRFrameLowering.cpp
View File

@ -30,7 +30,8 @@
namespace llvm {
AVRFrameLowering::AVRFrameLowering()
: TargetFrameLowering(TargetFrameLowering::StackGrowsDown, 1, -2) {}
: TargetFrameLowering(TargetFrameLowering::StackGrowsDown, Align::None(),
-2) {}
bool AVRFrameLowering::canSimplifyCallFramePseudos(
const MachineFunction &MF) const {

2
llvm/lib/Target/BPF/BPFFrameLowering.h
View File

@ -21,7 +21,7 @@ class BPFSubtarget;
class BPFFrameLowering : public TargetFrameLowering {
public:
explicit BPFFrameLowering(const BPFSubtarget &sti)
: TargetFrameLowering(TargetFrameLowering::StackGrowsDown, 8, 0) {}
: TargetFrameLowering(TargetFrameLowering::StackGrowsDown, Align(8), 0) {}
void emitPrologue(MachineFunction &MF, MachineBasicBlock &MBB) const override;
void emitEpilogue(MachineFunction &MF, MachineBasicBlock &MBB) const override;

2
llvm/lib/Target/Hexagon/HexagonFrameLowering.h
View File

@ -30,7 +30,7 @@ class TargetRegisterClass;
class HexagonFrameLowering : public TargetFrameLowering {
public:
explicit HexagonFrameLowering()
: TargetFrameLowering(StackGrowsDown, 8, 0, 1, true) {}
: TargetFrameLowering(StackGrowsDown, Align(8), 0, 1, true) {}
// All of the prolog/epilog functionality, including saving and restoring
// callee-saved registers is handled in emitPrologue. This is to have the

2
llvm/lib/Target/Lanai/LanaiFrameLowering.h
View File

@ -31,7 +31,7 @@ protected:
public:
explicit LanaiFrameLowering(const LanaiSubtarget &Subtarget)
: TargetFrameLowering(StackGrowsDown,
/*StackAlignment=*/8,
/*StackAlignment=*/Align(8),
/*LocalAreaOffset=*/0),
STI(Subtarget) {}

3
llvm/lib/Target/MSP430/MSP430FrameLowering.h
View File

@ -22,7 +22,8 @@ protected:
public:
explicit MSP430FrameLowering()
: TargetFrameLowering(TargetFrameLowering::StackGrowsDown, 2, -2, 2) {}
: TargetFrameLowering(TargetFrameLowering::StackGrowsDown, Align(2), -2,
2) {}
/// emitProlog/emitEpilog - These methods insert prolog and epilog code into
/// the function.

2
llvm/lib/Target/Mips/MipsAsmPrinter.cpp
View File

@ -781,7 +781,7 @@ void MipsAsmPrinter::EmitStartOfAsmFile(Module &M) {
StringRef CPU = MIPS_MC::selectMipsCPU(TT, TM.getTargetCPU());
StringRef FS = TM.getTargetFeatureString();
const MipsTargetMachine &MTM = static_cast<const MipsTargetMachine &>(TM);
const MipsSubtarget STI(TT, CPU, FS, MTM.isLittleEndian(), MTM, 0);
const MipsSubtarget STI(TT, CPU, FS, MTM.isLittleEndian(), MTM, None);
bool IsABICalls = STI.isABICalls();
const MipsABIInfo &ABI = MTM.getABI();

5
llvm/lib/Target/Mips/MipsFrameLowering.h
View File

@ -24,8 +24,9 @@ protected:
const MipsSubtarget &STI;
public:
explicit MipsFrameLowering(const MipsSubtarget &sti, unsigned Alignment)
: TargetFrameLowering(StackGrowsDown, Alignment, 0, Alignment), STI(sti) {}
explicit MipsFrameLowering(const MipsSubtarget &sti, Align Alignment)
: TargetFrameLowering(StackGrowsDown, Alignment, 0, Alignment.value()),
STI(sti) {}
static const MipsFrameLowering *create(const MipsSubtarget &ST);

15
llvm/lib/Target/Mips/MipsSubtarget.cpp
View File

@ -69,7 +69,7 @@ void MipsSubtarget::anchor() {}
MipsSubtarget::MipsSubtarget(const Triple &TT, StringRef CPU, StringRef FS,
bool little, const MipsTargetMachine &TM,
unsigned StackAlignOverride)
MaybeAlign StackAlignOverride)
: MipsGenSubtargetInfo(TT, CPU, FS), MipsArchVersion(MipsDefault),
IsLittle(little), IsSoftFloat(false), IsSingleFloat(false), IsFPXX(false),
NoABICalls(false), Abs2008(false), IsFP64bit(false), UseOddSPReg(true),
@ -81,10 +81,9 @@ MipsSubtarget::MipsSubtarget(const Triple &TT, StringRef CPU, StringRef FS,
Os16(Mips_Os16), HasMSA(false), UseTCCInDIV(false), HasSym32(false),
HasEVA(false), DisableMadd4(false), HasMT(false), HasCRC(false),
HasVirt(false), HasGINV(false), UseIndirectJumpsHazard(false),
StackAlignOverride(StackAlignOverride),
TM(TM), TargetTriple(TT), TSInfo(),
InstrInfo(
MipsInstrInfo::create(initializeSubtargetDependencies(CPU, FS, TM))),
StackAlignOverride(StackAlignOverride), TM(TM), TargetTriple(TT),
TSInfo(), InstrInfo(MipsInstrInfo::create(
initializeSubtargetDependencies(CPU, FS, TM))),
FrameLowering(MipsFrameLowering::create(*this)),
TLInfo(MipsTargetLowering::create(TM, *this)) {
@ -248,12 +247,12 @@ MipsSubtarget::initializeSubtargetDependencies(StringRef CPU, StringRef FS,
InMips16HardFloat = true;
if (StackAlignOverride)
stackAlignment = StackAlignOverride;
stackAlignment = *StackAlignOverride;
else if (isABI_N32() || isABI_N64())
stackAlignment = 16;
stackAlignment = Align(16);
else {
assert(isABI_O32() && "Unknown ABI for stack alignment!");
stackAlignment = 8;
stackAlignment = Align(8);
}
return *this;

8
llvm/lib/Target/Mips/MipsSubtarget.h
View File

@ -194,10 +194,10 @@ class MipsSubtarget : public MipsGenSubtargetInfo {
/// The minimum alignment known to hold of the stack frame on
/// entry to the function and which must be maintained by every function.
unsigned stackAlignment;
Align stackAlignment;
/// The overridden stack alignment.
unsigned StackAlignOverride;
MaybeAlign StackAlignOverride;
InstrItineraryData InstrItins;
@ -230,7 +230,7 @@ public:
/// This constructor initializes the data members to match that
/// of the specified triple.
MipsSubtarget(const Triple &TT, StringRef CPU, StringRef FS, bool little,
const MipsTargetMachine &TM, unsigned StackAlignOverride);
const MipsTargetMachine &TM, MaybeAlign StackAlignOverride);
/// ParseSubtargetFeatures - Parses features string setting specified
/// subtarget options. Definition of function is auto generated by tblgen.
@ -349,7 +349,7 @@ public:
// really use them if in addition we are in mips16 mode
static bool useConstantIslands();
unsigned getStackAlignment() const { return stackAlignment; }
Align getStackAlignment() const { return stackAlignment; }
// Grab relocation model
Reloc::Model getRelocationModel() const;

16
llvm/lib/Target/Mips/MipsTargetMachine.cpp
View File

@ -119,12 +119,15 @@ MipsTargetMachine::MipsTargetMachine(const Target &T, const Triple &TT,
getEffectiveCodeModel(CM, CodeModel::Small), OL),
isLittle(isLittle), TLOF(std::make_unique<MipsTargetObjectFile>()),
ABI(MipsABIInfo::computeTargetABI(TT, CPU, Options.MCOptions)),
Subtarget(nullptr), DefaultSubtarget(TT, CPU, FS, isLittle, *this,
Options.StackAlignmentOverride),
Subtarget(nullptr),
DefaultSubtarget(TT, CPU, FS, isLittle, *this,
MaybeAlign(Options.StackAlignmentOverride)),
NoMips16Subtarget(TT, CPU, FS.empty() ? "-mips16" : FS.str() + ",-mips16",
isLittle, *this, Options.StackAlignmentOverride),
isLittle, *this,
MaybeAlign(Options.StackAlignmentOverride)),
Mips16Subtarget(TT, CPU, FS.empty() ? "+mips16" : FS.str() + ",+mips16",
isLittle, *this, Options.StackAlignmentOverride) {
isLittle, *this,
MaybeAlign(Options.StackAlignmentOverride)) {
Subtarget = &DefaultSubtarget;
initAsmInfo();
}
@ -196,8 +199,9 @@ MipsTargetMachine::getSubtargetImpl(const Function &F) const {
// creation will depend on the TM and the code generation flags on the
// function that reside in TargetOptions.
resetTargetOptions(F);
I = std::make_unique<MipsSubtarget>(TargetTriple, CPU, FS, isLittle, *this,
Options.StackAlignmentOverride);
I = std::make_unique<MipsSubtarget>(
TargetTriple, CPU, FS, isLittle, *this,
MaybeAlign(Options.StackAlignmentOverride));
}
return I.get();
}

2
llvm/lib/Target/NVPTX/NVPTXFrameLowering.cpp
View File

@ -25,7 +25,7 @@
using namespace llvm;
NVPTXFrameLowering::NVPTXFrameLowering()
: TargetFrameLowering(TargetFrameLowering::StackGrowsUp, 8, 0) {}
: TargetFrameLowering(TargetFrameLowering::StackGrowsUp, Align(8), 0) {}
bool NVPTXFrameLowering::hasFP(const MachineFunction &MF) const { return true; }

2
llvm/lib/Target/PowerPC/PPCSubtarget.cpp
View File

@ -60,7 +60,7 @@ PPCSubtarget::PPCSubtarget(const Triple &TT, const std::string &CPU,
InstrInfo(*this), TLInfo(TM, *this) {}
void PPCSubtarget::initializeEnvironment() {
StackAlignment = 16;
StackAlignment = Align(16);
DarwinDirective = PPC::DIR_NONE;
HasMFOCRF = false;
Has64BitSupport = false;

10
llvm/lib/Target/PowerPC/PPCSubtarget.h
View File

@ -78,7 +78,7 @@ protected:
/// stackAlignment - The minimum alignment known to hold of the stack frame on
/// entry to the function and which must be maintained by every function.
unsigned StackAlignment;
Align StackAlignment;
/// Selected instruction itineraries (one entry per itinerary class.)
InstrItineraryData InstrItins;
@ -166,7 +166,7 @@ public:
/// getStackAlignment - Returns the minimum alignment known to hold of the
/// stack frame on entry to the function and which must be maintained by every
/// function for this subtarget.
unsigned getStackAlignment() const { return StackAlignment; }
Align getStackAlignment() const { return StackAlignment; }
/// getDarwinDirective - Returns the -m directive specified for the cpu.
///
@ -281,11 +281,11 @@ public:
bool hasDirectMove() const { return HasDirectMove; }
bool isQPXStackUnaligned() const { return IsQPXStackUnaligned; }
unsigned getPlatformStackAlignment() const {
Align getPlatformStackAlignment() const {
if ((hasQPX() || isBGQ()) && !isQPXStackUnaligned())
return 32;
return Align(32);
return 16;
return Align(16);
}
// DarwinABI has a 224-byte red zone. PPC32 SVR4ABI(Non-DarwinABI) has no

2
llvm/lib/Target/RISCV/RISCVFrameLowering.h
View File

@ -22,7 +22,7 @@ class RISCVFrameLowering : public TargetFrameLowering {
public:
explicit RISCVFrameLowering(const RISCVSubtarget &STI)
: TargetFrameLowering(StackGrowsDown,
/*StackAlignment=*/16,
/*StackAlignment=*/Align(16),
/*LocalAreaOffset=*/0),
STI(STI) {}

3
llvm/lib/Target/Sparc/SparcFrameLowering.cpp
View File

@ -34,7 +34,8 @@ DisableLeafProc("disable-sparc-leaf-proc",
SparcFrameLowering::SparcFrameLowering(const SparcSubtarget &ST)
: TargetFrameLowering(TargetFrameLowering::StackGrowsDown,
ST.is64Bit() ? 16 : 8, 0, ST.is64Bit() ? 16 : 8) {}
ST.is64Bit() ? Align(16) : Align(8), 0,
ST.is64Bit() ? 16 : 8) {}
void SparcFrameLowering::emitSPAdjustment(MachineFunction &MF,
MachineBasicBlock &MBB,

2
llvm/lib/Target/SystemZ/SystemZFrameLowering.cpp
View File

@ -46,7 +46,7 @@ static const TargetFrameLowering::SpillSlot SpillOffsetTable[] = {
} // end anonymous namespace
SystemZFrameLowering::SystemZFrameLowering()
: TargetFrameLowering(TargetFrameLowering::StackGrowsDown, 8,
: TargetFrameLowering(TargetFrameLowering::StackGrowsDown, Align(8),
-SystemZMC::CallFrameSize, 8,
false /* StackRealignable */) {
// Create a mapping from register number to save slot offset.

2
llvm/lib/Target/WebAssembly/WebAssemblyFrameLowering.h
View File

@ -29,7 +29,7 @@ public:
static const size_t RedZoneSize = 128;
WebAssemblyFrameLowering()
: TargetFrameLowering(StackGrowsDown, /*StackAlignment=*/16,
: TargetFrameLowering(StackGrowsDown, /*StackAlignment=*/Align(16),
/*LocalAreaOffset=*/0,
/*TransientStackAlignment=*/16,
/*StackRealignable=*/true) {}

4
llvm/lib/Target/X86/X86FrameLowering.cpp
View File

@ -35,8 +35,8 @@
using namespace llvm;
X86FrameLowering::X86FrameLowering(const X86Subtarget &STI,
unsigned StackAlignOverride)
: TargetFrameLowering(StackGrowsDown, StackAlignOverride,
MaybeAlign StackAlignOverride)
: TargetFrameLowering(StackGrowsDown, StackAlignOverride.valueOrOne(),
STI.is64Bit() ? -8 : -4),
STI(STI), TII(*STI.getInstrInfo()), TRI(STI.getRegisterInfo()) {
// Cache a bunch of frame-related predicates for this subtarget.

2
llvm/lib/Target/X86/X86FrameLowering.h
View File

@ -25,7 +25,7 @@ class X86RegisterInfo;
class X86FrameLowering : public TargetFrameLowering {
public:
X86FrameLowering(const X86Subtarget &STI, unsigned StackAlignOverride);
X86FrameLowering(const X86Subtarget &STI, MaybeAlign StackAlignOverride);
// Cached subtarget predicates.

11
llvm/lib/Target/X86/X86Subtarget.cpp
View File

@ -288,10 +288,10 @@ void X86Subtarget::initSubtargetFeatures(StringRef CPU, StringRef FS) {
// Stack alignment is 16 bytes on Darwin, Linux, kFreeBSD and Solaris (both
// 32 and 64 bit) and for all 64-bit targets.
if (StackAlignOverride)
stackAlignment = StackAlignOverride;
stackAlignment = *StackAlignOverride;
else if (isTargetDarwin() || isTargetLinux() || isTargetSolaris() ||
isTargetKFreeBSD() || In64BitMode)
stackAlignment = 16;
stackAlignment = Align(16);
// Some CPUs have more overhead for gather. The specified overhead is relative
// to the Load operation. "2" is the number provided by Intel architects. This
@ -321,12 +321,11 @@ X86Subtarget &X86Subtarget::initializeSubtargetDependencies(StringRef CPU,
X86Subtarget::X86Subtarget(const Triple &TT, StringRef CPU, StringRef FS,
const X86TargetMachine &TM,
unsigned StackAlignOverride,
MaybeAlign StackAlignOverride,
unsigned PreferVectorWidthOverride,
unsigned RequiredVectorWidth)
: X86GenSubtargetInfo(TT, CPU, FS),
PICStyle(PICStyles::None), TM(TM), TargetTriple(TT),
StackAlignOverride(StackAlignOverride),
: X86GenSubtargetInfo(TT, CPU, FS), PICStyle(PICStyles::None), TM(TM),
TargetTriple(TT), StackAlignOverride(StackAlignOverride),
PreferVectorWidthOverride(PreferVectorWidthOverride),
RequiredVectorWidth(RequiredVectorWidth),
In64BitMode(TargetTriple.getArch() == Triple::x86_64),

8
llvm/lib/Target/X86/X86Subtarget.h
View File

@ -432,7 +432,7 @@ protected:
/// The minimum alignment known to hold of the stack frame on
/// entry to the function and which must be maintained by every function.
unsigned stackAlignment = 4;
Align stackAlignment = Align(4);
/// Max. memset / memcpy size that is turned into rep/movs, rep/stos ops.
///
@ -459,7 +459,7 @@ protected:
private:
/// Override the stack alignment.
unsigned StackAlignOverride;
MaybeAlign StackAlignOverride;
/// Preferred vector width from function attribute.
unsigned PreferVectorWidthOverride;
@ -496,7 +496,7 @@ public:
/// of the specified triple.
///
X86Subtarget(const Triple &TT, StringRef CPU, StringRef FS,
const X86TargetMachine &TM, unsigned StackAlignOverride,
const X86TargetMachine &TM, MaybeAlign StackAlignOverride,
unsigned PreferVectorWidthOverride,
unsigned RequiredVectorWidth);
@ -521,7 +521,7 @@ public:
/// Returns the minimum alignment known to hold of the
/// stack frame on entry to the function and which must be maintained by every
/// function for this subtarget.
unsigned getStackAlignment() const { return stackAlignment; }
Align getStackAlignment() const { return stackAlignment; }
/// Returns the maximum memset / memcpy size
/// that still makes it profitable to inline the call.

8
llvm/lib/Target/X86/X86TargetMachine.cpp
View File

@ -307,10 +307,10 @@ X86TargetMachine::getSubtargetImpl(const Function &F) const {
// creation will depend on the TM and the code generation flags on the
// function that reside in TargetOptions.
resetTargetOptions(F);
I = std::make_unique<X86Subtarget>(TargetTriple, CPU, FS, *this,
Options.StackAlignmentOverride,
PreferVectorWidthOverride,
RequiredVectorWidth);
I = std::make_unique<X86Subtarget>(
TargetTriple, CPU, FS, *this,
MaybeAlign(Options.StackAlignmentOverride), PreferVectorWidthOverride,
RequiredVectorWidth);
}
return I.get();
}

2
llvm/lib/Target/XCore/XCoreFrameLowering.cpp
View File

@ -211,7 +211,7 @@ static void RestoreSpillList(MachineBasicBlock &MBB,
//===----------------------------------------------------------------------===//
XCoreFrameLowering::XCoreFrameLowering(const XCoreSubtarget &sti)
: TargetFrameLowering(TargetFrameLowering::StackGrowsDown, 4, 0) {
: TargetFrameLowering(TargetFrameLowering::StackGrowsDown, Align(4), 0) {
// Do nothing
}

2
llvm/unittests/CodeGen/MachineInstrTest.cpp
View File

@ -35,7 +35,7 @@ public:
class BogusFrameLowering : public TargetFrameLowering {
public:
BogusFrameLowering()
: TargetFrameLowering(TargetFrameLowering::StackGrowsDown, 4, 4) {}
: TargetFrameLowering(TargetFrameLowering::StackGrowsDown, Align(4), 4) {}
void emitPrologue(MachineFunction &MF,
MachineBasicBlock &MBB) const override {}