forked from OSchip/llvm-project
Remove DEBUG_DECLARE, looks like we don't need it.
Also, DEBUG_VALUE has side effects. llvm-svn: 93498
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@ -482,15 +482,6 @@ def DEBUG_VALUE : Instruction {
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let InOperandList = (ops unknown:$value, i64imm:$offset, unknown:$meta);
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let InOperandList = (ops unknown:$value, i64imm:$offset, unknown:$meta);
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let AsmString = "DEBUG_VALUE";
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let AsmString = "DEBUG_VALUE";
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let Namespace = "TargetInstrInfo";
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let Namespace = "TargetInstrInfo";
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let neverHasSideEffects = 1;
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let isAsCheapAsAMove = 1;
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}
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def DEBUG_DECLARE : Instruction {
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let OutOperandList = (ops);
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let InOperandList = (ops unknown:$vbl, unknown:$meta);
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let AsmString = "DEBUG_DECLARE";
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let Namespace = "TargetInstrInfo";
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let neverHasSideEffects = 1;
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let isAsCheapAsAMove = 1;
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let isAsCheapAsAMove = 1;
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}
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}
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}
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}
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@ -91,10 +91,7 @@ public:
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COPY_TO_REGCLASS = 10,
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COPY_TO_REGCLASS = 10,
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// DEBUG_VALUE - a mapping of the llvm.dbg.value intrinsic
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// DEBUG_VALUE - a mapping of the llvm.dbg.value intrinsic
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DEBUG_VALUE = 11,
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DEBUG_VALUE = 11
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// DEBUG_DECLARE - a mapping of the llvm.dbg.declare intrinsic
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DEBUG_DECLARE = 12
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};
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};
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unsigned getNumOpcodes() const { return NumOpcodes; }
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unsigned getNumOpcodes() const { return NumOpcodes; }
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@ -35,8 +35,7 @@ void CodeEmitterGen::reverseBits(std::vector<Record*> &Insts) {
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R->getName() == "IMPLICIT_DEF" ||
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R->getName() == "IMPLICIT_DEF" ||
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R->getName() == "SUBREG_TO_REG" ||
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R->getName() == "SUBREG_TO_REG" ||
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R->getName() == "COPY_TO_REGCLASS" ||
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R->getName() == "COPY_TO_REGCLASS" ||
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R->getName() == "DEBUG_VALUE" ||
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R->getName() == "DEBUG_VALUE") continue;
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R->getName() == "DEBUG_DECLARE") continue;
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BitsInit *BI = R->getValueAsBitsInit("Inst");
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BitsInit *BI = R->getValueAsBitsInit("Inst");
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@ -114,8 +113,7 @@ void CodeEmitterGen::run(raw_ostream &o) {
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R->getName() == "IMPLICIT_DEF" ||
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R->getName() == "IMPLICIT_DEF" ||
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R->getName() == "SUBREG_TO_REG" ||
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R->getName() == "SUBREG_TO_REG" ||
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R->getName() == "COPY_TO_REGCLASS" ||
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R->getName() == "COPY_TO_REGCLASS" ||
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R->getName() == "DEBUG_VALUE" ||
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R->getName() == "DEBUG_VALUE") {
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R->getName() == "DEBUG_DECLARE") {
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o << " 0U,\n";
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o << " 0U,\n";
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continue;
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continue;
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}
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}
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@ -154,8 +152,7 @@ void CodeEmitterGen::run(raw_ostream &o) {
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InstName == "IMPLICIT_DEF" ||
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InstName == "IMPLICIT_DEF" ||
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InstName == "SUBREG_TO_REG" ||
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InstName == "SUBREG_TO_REG" ||
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InstName == "COPY_TO_REGCLASS" ||
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InstName == "COPY_TO_REGCLASS" ||
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InstName == "DEBUG_VALUE" ||
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InstName == "DEBUG_VALUE") continue;
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InstName == "DEBUG_DECLARE") continue;
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BitsInit *BI = R->getValueAsBitsInit("Inst");
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BitsInit *BI = R->getValueAsBitsInit("Inst");
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const std::vector<RecordVal> &Vals = R->getValues();
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const std::vector<RecordVal> &Vals = R->getValues();
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@ -342,11 +342,6 @@ getInstructionsByEnumValue(std::vector<const CodeGenInstruction*>
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throw "Could not find 'DEBUG_VALUE' instruction!";
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throw "Could not find 'DEBUG_VALUE' instruction!";
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const CodeGenInstruction *DEBUG_VALUE = &I->second;
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const CodeGenInstruction *DEBUG_VALUE = &I->second;
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I = getInstructions().find("DEBUG_DECLARE");
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if (I == Instructions.end())
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throw "Could not find 'DEBUG_DECLARE' instruction!";
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const CodeGenInstruction *DEBUG_DECLARE = &I->second;
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// Print out the rest of the instructions now.
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// Print out the rest of the instructions now.
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NumberedInstructions.push_back(PHI);
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NumberedInstructions.push_back(PHI);
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NumberedInstructions.push_back(INLINEASM);
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NumberedInstructions.push_back(INLINEASM);
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@ -360,7 +355,6 @@ getInstructionsByEnumValue(std::vector<const CodeGenInstruction*>
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NumberedInstructions.push_back(SUBREG_TO_REG);
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NumberedInstructions.push_back(SUBREG_TO_REG);
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NumberedInstructions.push_back(COPY_TO_REGCLASS);
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NumberedInstructions.push_back(COPY_TO_REGCLASS);
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NumberedInstructions.push_back(DEBUG_VALUE);
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NumberedInstructions.push_back(DEBUG_VALUE);
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NumberedInstructions.push_back(DEBUG_DECLARE);
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for (inst_iterator II = inst_begin(), E = inst_end(); II != E; ++II)
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for (inst_iterator II = inst_begin(), E = inst_end(); II != E; ++II)
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if (&II->second != PHI &&
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if (&II->second != PHI &&
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&II->second != INLINEASM &&
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&II->second != INLINEASM &&
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@ -373,8 +367,7 @@ getInstructionsByEnumValue(std::vector<const CodeGenInstruction*>
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&II->second != IMPLICIT_DEF &&
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&II->second != IMPLICIT_DEF &&
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&II->second != SUBREG_TO_REG &&
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&II->second != SUBREG_TO_REG &&
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&II->second != COPY_TO_REGCLASS &&
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&II->second != COPY_TO_REGCLASS &&
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&II->second != DEBUG_VALUE &&
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&II->second != DEBUG_VALUE)
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&II->second != DEBUG_DECLARE)
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NumberedInstructions.push_back(&II->second);
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NumberedInstructions.push_back(&II->second);
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}
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}
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@ -346,8 +346,7 @@ void InstrInfoEmitter::emitShiftedValue(Record *R, StringInit *Val,
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R->getName() != "IMPLICIT_DEF" &&
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R->getName() != "IMPLICIT_DEF" &&
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R->getName() != "SUBREG_TO_REG" &&
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R->getName() != "SUBREG_TO_REG" &&
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R->getName() != "COPY_TO_REGCLASS" &&
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R->getName() != "COPY_TO_REGCLASS" &&
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R->getName() != "DEBUG_VALUE" &&
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R->getName() != "DEBUG_VALUE")
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R->getName() != "DEBUG_DECLARE")
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throw R->getName() + " doesn't have a field named '" +
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throw R->getName() + " doesn't have a field named '" +
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Val->getValue() + "'!";
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Val->getValue() + "'!";
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return;
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return;
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