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AMDGPU/MemoryModel: Fix monotonic atomic loads 

Those should have glc bit set for system and agent synchronization scopes

llvm-svn: 324314
This commit is contained in:
Konstantin Zhuravlyov 2018-02-06 04:06:04 +00:00
parent 29c6f4833c
commit 8818d13ed2
2 changed files with 4 additions and 3 deletions
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3
llvm/lib/Target/AMDGPU/SIMemoryLegalizer.cpp
View File

@ -398,7 +398,8 @@ bool SIMemoryLegalizer::expandLoad(const SIMemOpInfo &MOI,
if (MOI.isAtomic()) {
if (MOI.getSSID() == SyncScope::System ||
MOI.getSSID() == MMI->getAgentSSID()) {
if (MOI.getOrdering() == AtomicOrdering::Acquire ||
if (MOI.getOrdering() == AtomicOrdering::Monotonic ||
MOI.getOrdering() == AtomicOrdering::Acquire ||
MOI.getOrdering() == AtomicOrdering::SequentiallyConsistent)
Changed |= enableGLCBit(MI);

4
llvm/test/CodeGen/AMDGPU/memory-legalizer-load.ll
View File

@ -21,7 +21,7 @@ entry:
; GCN-LABEL: {{^}}system_monotonic
; GCN-NOT: s_waitcnt vmcnt(0){{$}}
; GCN: flat_load_dword [[RET:v[0-9]+]], v[{{[0-9]+}}:{{[0-9]+}}]{{$}}
; GCN: flat_load_dword [[RET:v[0-9]+]], v[{{[0-9]+}}:{{[0-9]+}}] glc{{$}}
; GCN-NOT: s_waitcnt vmcnt(0){{$}}
; GCN-NOT: buffer_wbinvl1_vol
; GCN: flat_store_dword v{{\[[0-9]+:[0-9]+\]}}, [[RET]]
@ -133,7 +133,7 @@ entry:
; GCN-LABEL: {{^}}agent_monotonic
; GCN-NOT: s_waitcnt vmcnt(0){{$}}
; GCN: flat_load_dword [[RET:v[0-9]+]], v[{{[0-9]+}}:{{[0-9]+}}]{{$}}
; GCN: flat_load_dword [[RET:v[0-9]+]], v[{{[0-9]+}}:{{[0-9]+}}] glc{{$}}
; GCN-NOT: s_waitcnt vmcnt(0){{$}}
; GCN-NOT: buffer_wbinvl1_vol
; GCN: flat_store_dword v{{\[[0-9]+:[0-9]+\]}}, [[RET]]