forked from OSchip/llvm-project
Fix a bug in the soft-float handling of FCOPYSIGN that Duncan noticed
when working on legalizetypes. Both legalizetypes and legalizeops now produce hte same code for CodeGen/ARM/fcopysign.ll. llvm-svn: 53435
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@ -547,8 +547,11 @@ SDOperand ExpandFCOPYSIGNToBitwiseOps(SDNode *Node, MVT NVT,
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SignBit = DAG.getNode(ISD::SRL, SrcNVT, SignBit,
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DAG.getConstant(SizeDiff, TLI.getShiftAmountTy()));
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SignBit = DAG.getNode(ISD::TRUNCATE, NVT, SignBit);
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} else if (SizeDiff < 0)
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SignBit = DAG.getNode(ISD::SIGN_EXTEND, NVT, SignBit);
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} else if (SizeDiff < 0) {
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SignBit = DAG.getNode(ISD::ZERO_EXTEND, NVT, SignBit);
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SignBit = DAG.getNode(ISD::SHL, NVT, SignBit,
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DAG.getConstant(-SizeDiff, TLI.getShiftAmountTy()));
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}
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// Clear the sign bit of first operand.
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SDOperand Mask2 = (VT == MVT::f64)
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