forked from OSchip/llvm-project
[InstCombine] restrict icmp fold with 2 sdiv exact operands (PR32949)
This is the InstCombine counterpart to D32954. I added some comments about the code duplication in: rL302436 Alive-based verification: http://rise4fun.com/Alive/dPw This is a 2nd fix for the problem reported in: https://bugs.llvm.org/show_bug.cgi?id=32949 Differential Revision: https://reviews.llvm.org/D32970 llvm-svn: 303105
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@ -3068,16 +3068,23 @@ Instruction *InstCombiner::foldICmpBinOp(ICmpInst &I) {
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}
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}
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break;
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case Instruction::UDiv:
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case Instruction::LShr:
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if (I.isSigned())
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if (I.isSigned() || !BO0->isExact() || !BO1->isExact())
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break;
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LLVM_FALLTHROUGH;
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return new ICmpInst(Pred, BO0->getOperand(0), BO1->getOperand(0));
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case Instruction::SDiv:
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if (!I.isEquality() || !BO0->isExact() || !BO1->isExact())
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break;
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return new ICmpInst(Pred, BO0->getOperand(0), BO1->getOperand(0));
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case Instruction::AShr:
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if (!BO0->isExact() || !BO1->isExact())
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break;
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return new ICmpInst(Pred, BO0->getOperand(0), BO1->getOperand(0));
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case Instruction::Shl: {
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bool NUW = BO0->hasNoUnsignedWrap() && BO1->hasNoUnsignedWrap();
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bool NSW = BO0->hasNoSignedWrap() && BO1->hasNoSignedWrap();
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@ -695,11 +695,13 @@ define i1 @test48(i32 %X, i32 %Y, i32 %Z) {
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ret i1 %C
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}
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; FIXME: The above transform only works for equality predicates.
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; The above transform only works for equality predicates.
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define i1 @PR32949(i32 %X, i32 %Y, i32 %Z) {
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; CHECK-LABEL: @PR32949(
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; CHECK-NEXT: [[C:%.*]] = icmp sgt i32 %X, %Y
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; CHECK-NEXT: [[A:%.*]] = sdiv exact i32 %X, %Z
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; CHECK-NEXT: [[B:%.*]] = sdiv exact i32 %Y, %Z
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; CHECK-NEXT: [[C:%.*]] = icmp sgt i32 [[A]], [[B]]
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; CHECK-NEXT: ret i1 [[C]]
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;
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%A = sdiv exact i32 %X, %Z
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