forked from OSchip/llvm-project
Strength-reduce SmallVectors to arrays. NFCI.
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@ -245,9 +245,9 @@ void RocmInstallationDetector::detectDeviceLibrary() {
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// - ${ROCM_ROOT}/lib/*
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// - ${ROCM_ROOT}/lib/*
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// - ${ROCM_ROOT}/lib/bitcode/*
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// - ${ROCM_ROOT}/lib/bitcode/*
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// so try to detect these layouts.
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// so try to detect these layouts.
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static llvm::SmallVector<const char *, 2> SubDirsList[] = {
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static constexpr std::array<const char *, 2> SubDirsList[] = {
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{"amdgcn", "bitcode"},
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{"amdgcn", "bitcode"},
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{"lib"},
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{"lib", ""},
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{"lib", "bitcode"},
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{"lib", "bitcode"},
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};
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};
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@ -133,7 +133,7 @@ const DILocation *DILocation::getMergedLocation(const DILocation *LocA,
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}
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}
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Optional<unsigned> DILocation::encodeDiscriminator(unsigned BD, unsigned DF, unsigned CI) {
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Optional<unsigned> DILocation::encodeDiscriminator(unsigned BD, unsigned DF, unsigned CI) {
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SmallVector<unsigned, 3> Components = {BD, DF, CI};
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std::array<unsigned, 3> Components = {BD, DF, CI};
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uint64_t RemainingWork = 0U;
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uint64_t RemainingWork = 0U;
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// We use RemainingWork to figure out if we have no remaining components to
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// We use RemainingWork to figure out if we have no remaining components to
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// encode. For example: if BD != 0 but DF == 0 && CI == 0, we don't need to
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// encode. For example: if BD != 0 but DF == 0 && CI == 0, we don't need to
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@ -15710,8 +15710,8 @@ SDValue AArch64TargetLowering::LowerFixedLengthVectorSetccToSVE(
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auto Pg = getPredicateForFixedLengthVector(DAG, DL, InVT);
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auto Pg = getPredicateForFixedLengthVector(DAG, DL, InVT);
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EVT CmpVT = Pg.getValueType();
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EVT CmpVT = Pg.getValueType();
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SmallVector<SDValue, 4> CmpOps = {Pg, Op1, Op2, Op.getOperand(2)};
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auto Cmp = DAG.getNode(AArch64ISD::SETCC_MERGE_ZERO, DL, CmpVT,
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auto Cmp = DAG.getNode(AArch64ISD::SETCC_MERGE_ZERO, DL, CmpVT, CmpOps);
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{Pg, Op1, Op2, Op.getOperand(2)});
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EVT PromoteVT = ContainerVT.changeTypeToInteger();
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EVT PromoteVT = ContainerVT.changeTypeToInteger();
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auto Promote = DAG.getBoolExtOrTrunc(Cmp, DL, PromoteVT, InVT);
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auto Promote = DAG.getBoolExtOrTrunc(Cmp, DL, PromoteVT, InVT);
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@ -3156,7 +3156,7 @@ static bool mergeConditionalStoreToAddress(BasicBlock *PTB, BasicBlock *PFB,
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return true;
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return true;
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};
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};
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const SmallVector<StoreInst *, 2> FreeStores = {PStore, QStore};
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const std::array<StoreInst *, 2> FreeStores = {PStore, QStore};
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if (!MergeCondStoresAggressively &&
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if (!MergeCondStoresAggressively &&
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(!IsWorthwhile(PTB, FreeStores) || !IsWorthwhile(PFB, FreeStores) ||
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(!IsWorthwhile(PTB, FreeStores) || !IsWorthwhile(PFB, FreeStores) ||
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!IsWorthwhile(QTB, FreeStores) || !IsWorthwhile(QFB, FreeStores)))
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!IsWorthwhile(QTB, FreeStores) || !IsWorthwhile(QFB, FreeStores)))
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@ -377,11 +377,10 @@ fuseProducerOfDep(OpBuilder &b, LinalgOp consumer, unsigned consumerIdx,
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Optional<FusionInfo> mlir::linalg::fuseProducerOf(
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Optional<FusionInfo> mlir::linalg::fuseProducerOf(
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OpBuilder &b, LinalgOp consumer, unsigned consumerIdx,
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OpBuilder &b, LinalgOp consumer, unsigned consumerIdx,
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const LinalgDependenceGraph &graph, OperationFolder *folder) {
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const LinalgDependenceGraph &graph, OperationFolder *folder) {
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SmallVector<LinalgDependenceGraph::DependenceType, 4> deps = {
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for (auto dep : {
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LinalgDependenceGraph::DependenceType::RAW,
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LinalgDependenceGraph::DependenceType::RAW,
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LinalgDependenceGraph::DependenceType::WAW,
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LinalgDependenceGraph::DependenceType::WAW,
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};
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}) {
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for (auto dep : deps) {
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if (auto res =
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if (auto res =
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fuseProducerOfDep(b, consumer, consumerIdx, graph, folder, dep))
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fuseProducerOfDep(b, consumer, consumerIdx, graph, folder, dep))
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return res;
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return res;
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@ -2849,9 +2849,9 @@ static ParseResult parseCooperativeMatrixLoadNVOp(OpAsmParser &parser,
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parser.parseType(ptrType) || parser.parseKeywordType("as", elementType)) {
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parser.parseType(ptrType) || parser.parseKeywordType("as", elementType)) {
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return failure();
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return failure();
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}
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}
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SmallVector<Type, 3> OperandType = {ptrType, strideType, columnMajorType};
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if (parser.resolveOperands(operandInfo,
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if (parser.resolveOperands(operandInfo, OperandType, parser.getNameLoc(),
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{ptrType, strideType, columnMajorType},
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state.operands)) {
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parser.getNameLoc(), state.operands)) {
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return failure();
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return failure();
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}
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}
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@ -2904,10 +2904,9 @@ static ParseResult parseCooperativeMatrixStoreNVOp(OpAsmParser &parser,
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parser.parseType(elementType)) {
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parser.parseType(elementType)) {
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return failure();
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return failure();
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}
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}
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SmallVector<Type, 4> OperandType = {ptrType, elementType, strideType,
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if (parser.resolveOperands(
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columnMajorType};
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operandInfo, {ptrType, elementType, strideType, columnMajorType},
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if (parser.resolveOperands(operandInfo, OperandType, parser.getNameLoc(),
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parser.getNameLoc(), state.operands)) {
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state.operands)) {
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return failure();
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return failure();
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}
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}
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