forked from OSchip/llvm-project
Separate out BDCE's analysis into a separate DemandedBits analysis.
This allows other areas of the compiler to use BDCE's bit-tracking. NFCI. llvm-svn: 245039
This commit is contained in:
parent
1fdc177ccf
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87405c7f66
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//===-- llvm/Analysis/DemandedBits.h - Determine demanded bits --*- C++ -*-===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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// This pass implements a demanded bits analysis. A demanded bit is one that
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// contributes to a result; bits that are not demanded can be either zero or
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// one without affecting control or data flow. For example in this sequence:
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//
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// %1 = add i32 %x, %y
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// %2 = trunc i32 %1 to i16
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//
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// Only the lowest 16 bits of %1 are demanded; the rest are removed by the
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// trunc.
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//
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//===----------------------------------------------------------------------===//
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#ifndef LLVM_ANALYSIS_DEMANDED_BITS_H
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#define LLVM_ANALYSIS_DEMANDED_BITS_H
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#include "llvm/Pass.h"
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#include "llvm/ADT/APInt.h"
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#include "llvm/ADT/DenseMap.h"
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#include "llvm/ADT/SmallPtrSet.h"
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namespace llvm {
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class FunctionPass;
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class Function;
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class Instruction;
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class DominatorTree;
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class AssumptionCache;
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struct DemandedBits : public FunctionPass {
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static char ID; // Pass identification, replacement for typeid
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DemandedBits();
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bool runOnFunction(Function& F) override;
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void getAnalysisUsage(AnalysisUsage& AU) const override;
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/// Return the bits demanded from instruction I.
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APInt getDemandedBits(Instruction *I);
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/// Return true if, during analysis, I could not be reached.
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bool isInstructionDead(Instruction *I);
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private:
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void determineLiveOperandBits(const Instruction *UserI,
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const Instruction *I, unsigned OperandNo,
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const APInt &AOut, APInt &AB,
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APInt &KnownZero, APInt &KnownOne,
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APInt &KnownZero2, APInt &KnownOne2);
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AssumptionCache *AC;
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DominatorTree *DT;
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// The set of visited instructions (non-integer-typed only).
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SmallPtrSet<Instruction*, 128> Visited;
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DenseMap<Instruction *, APInt> AliveBits;
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};
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/// Create a demanded bits analysis pass.
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FunctionPass *createDemandedBitsPass();
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} // End llvm namespace
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#endif
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@ -303,6 +303,7 @@ void initializeDwarfEHPreparePass(PassRegistry&);
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void initializeFloat2IntPass(PassRegistry&);
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void initializeLoopDistributePass(PassRegistry&);
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void initializeSjLjEHPreparePass(PassRegistry&);
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void initializeDemandedBitsPass(PassRegistry&);
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}
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#endif
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@ -36,6 +36,7 @@ void llvm::initializeAnalysis(PassRegistry &Registry) {
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initializeCFLAliasAnalysisPass(Registry);
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initializeDependenceAnalysisPass(Registry);
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initializeDelinearizationPass(Registry);
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initializeDemandedBitsPass(Registry);
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initializeDivergenceAnalysisPass(Registry);
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initializeDominanceFrontierPass(Registry);
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initializeDomViewerPass(Registry);
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@ -18,6 +18,7 @@ add_llvm_library(LLVMAnalysis
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CodeMetrics.cpp
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ConstantFolding.cpp
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Delinearization.cpp
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DemandedBits.cpp
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DependenceAnalysis.cpp
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DivergenceAnalysis.cpp
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DomPrinter.cpp
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@ -0,0 +1,364 @@
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//===---- DemandedBits.cpp - Determine demanded bits -----------------------===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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// This pass implements a demanded bits analysis. A demanded bit is one that
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// contributes to a result; bits that are not demanded can be either zero or
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// one without affecting control or data flow. For example in this sequence:
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//
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// %1 = add i32 %x, %y
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// %2 = trunc i32 %1 to i16
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//
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// Only the lowest 16 bits of %1 are demanded; the rest are removed by the
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// trunc.
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//
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//===----------------------------------------------------------------------===//
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#include "llvm/Analysis/DemandedBits.h"
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#include "llvm/Transforms/Scalar.h"
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#include "llvm/ADT/DenseMap.h"
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#include "llvm/ADT/DepthFirstIterator.h"
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#include "llvm/ADT/SmallPtrSet.h"
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#include "llvm/ADT/SmallVector.h"
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#include "llvm/Analysis/AssumptionCache.h"
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#include "llvm/Analysis/ValueTracking.h"
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#include "llvm/IR/BasicBlock.h"
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#include "llvm/IR/CFG.h"
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#include "llvm/IR/DataLayout.h"
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#include "llvm/IR/Dominators.h"
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#include "llvm/IR/InstIterator.h"
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#include "llvm/IR/Instructions.h"
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#include "llvm/IR/IntrinsicInst.h"
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#include "llvm/IR/Module.h"
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#include "llvm/IR/Operator.h"
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#include "llvm/Pass.h"
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#include "llvm/Support/Debug.h"
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#include "llvm/Support/raw_ostream.h"
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using namespace llvm;
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#define DEBUG_TYPE "demanded-bits"
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char DemandedBits::ID = 0;
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INITIALIZE_PASS_BEGIN(DemandedBits, "demanded-bits", "Demanded bits analysis",
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false, false)
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INITIALIZE_PASS_DEPENDENCY(AssumptionCacheTracker)
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INITIALIZE_PASS_DEPENDENCY(DominatorTreeWrapperPass)
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INITIALIZE_PASS_END(DemandedBits, "demanded-bits", "Demanded bits analysis",
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false, false)
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DemandedBits::DemandedBits() : FunctionPass(ID) {
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initializeDemandedBitsPass(*PassRegistry::getPassRegistry());
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}
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void DemandedBits::getAnalysisUsage(AnalysisUsage& AU) const {
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AU.setPreservesCFG();
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AU.addRequired<AssumptionCacheTracker>();
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AU.addRequired<DominatorTreeWrapperPass>();
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AU.setPreservesAll();
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}
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static bool isAlwaysLive(Instruction *I) {
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return isa<TerminatorInst>(I) || isa<DbgInfoIntrinsic>(I) ||
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I->isEHPad() || I->mayHaveSideEffects();
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}
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void
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DemandedBits::determineLiveOperandBits(const Instruction *UserI,
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const Instruction *I, unsigned OperandNo,
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const APInt &AOut, APInt &AB,
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APInt &KnownZero, APInt &KnownOne,
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APInt &KnownZero2, APInt &KnownOne2) {
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unsigned BitWidth = AB.getBitWidth();
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// We're called once per operand, but for some instructions, we need to
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// compute known bits of both operands in order to determine the live bits of
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// either (when both operands are instructions themselves). We don't,
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// however, want to do this twice, so we cache the result in APInts that live
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// in the caller. For the two-relevant-operands case, both operand values are
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// provided here.
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auto ComputeKnownBits =
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[&](unsigned BitWidth, const Value *V1, const Value *V2) {
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const DataLayout &DL = I->getModule()->getDataLayout();
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KnownZero = APInt(BitWidth, 0);
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KnownOne = APInt(BitWidth, 0);
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computeKnownBits(const_cast<Value *>(V1), KnownZero, KnownOne, DL, 0,
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AC, UserI, DT);
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if (V2) {
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KnownZero2 = APInt(BitWidth, 0);
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KnownOne2 = APInt(BitWidth, 0);
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computeKnownBits(const_cast<Value *>(V2), KnownZero2, KnownOne2, DL,
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0, AC, UserI, DT);
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}
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};
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switch (UserI->getOpcode()) {
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default: break;
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case Instruction::Call:
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case Instruction::Invoke:
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if (const IntrinsicInst *II = dyn_cast<IntrinsicInst>(UserI))
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switch (II->getIntrinsicID()) {
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default: break;
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case Intrinsic::bswap:
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// The alive bits of the input are the swapped alive bits of
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// the output.
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AB = AOut.byteSwap();
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break;
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case Intrinsic::ctlz:
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if (OperandNo == 0) {
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// We need some output bits, so we need all bits of the
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// input to the left of, and including, the leftmost bit
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// known to be one.
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ComputeKnownBits(BitWidth, I, nullptr);
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AB = APInt::getHighBitsSet(BitWidth,
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std::min(BitWidth, KnownOne.countLeadingZeros()+1));
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}
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break;
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case Intrinsic::cttz:
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if (OperandNo == 0) {
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// We need some output bits, so we need all bits of the
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// input to the right of, and including, the rightmost bit
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// known to be one.
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ComputeKnownBits(BitWidth, I, nullptr);
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AB = APInt::getLowBitsSet(BitWidth,
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std::min(BitWidth, KnownOne.countTrailingZeros()+1));
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}
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break;
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}
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break;
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case Instruction::Add:
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case Instruction::Sub:
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// Find the highest live output bit. We don't need any more input
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// bits than that (adds, and thus subtracts, ripple only to the
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// left).
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AB = APInt::getLowBitsSet(BitWidth, AOut.getActiveBits());
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break;
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case Instruction::Shl:
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if (OperandNo == 0)
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if (ConstantInt *CI =
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dyn_cast<ConstantInt>(UserI->getOperand(1))) {
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uint64_t ShiftAmt = CI->getLimitedValue(BitWidth-1);
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AB = AOut.lshr(ShiftAmt);
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// If the shift is nuw/nsw, then the high bits are not dead
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// (because we've promised that they *must* be zero).
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const ShlOperator *S = cast<ShlOperator>(UserI);
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if (S->hasNoSignedWrap())
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AB |= APInt::getHighBitsSet(BitWidth, ShiftAmt+1);
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else if (S->hasNoUnsignedWrap())
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AB |= APInt::getHighBitsSet(BitWidth, ShiftAmt);
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}
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break;
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case Instruction::LShr:
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if (OperandNo == 0)
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if (ConstantInt *CI =
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dyn_cast<ConstantInt>(UserI->getOperand(1))) {
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uint64_t ShiftAmt = CI->getLimitedValue(BitWidth-1);
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AB = AOut.shl(ShiftAmt);
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// If the shift is exact, then the low bits are not dead
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// (they must be zero).
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if (cast<LShrOperator>(UserI)->isExact())
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AB |= APInt::getLowBitsSet(BitWidth, ShiftAmt);
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}
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break;
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case Instruction::AShr:
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if (OperandNo == 0)
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if (ConstantInt *CI =
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dyn_cast<ConstantInt>(UserI->getOperand(1))) {
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uint64_t ShiftAmt = CI->getLimitedValue(BitWidth-1);
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AB = AOut.shl(ShiftAmt);
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// Because the high input bit is replicated into the
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// high-order bits of the result, if we need any of those
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// bits, then we must keep the highest input bit.
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if ((AOut & APInt::getHighBitsSet(BitWidth, ShiftAmt))
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.getBoolValue())
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AB.setBit(BitWidth-1);
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// If the shift is exact, then the low bits are not dead
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// (they must be zero).
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if (cast<AShrOperator>(UserI)->isExact())
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AB |= APInt::getLowBitsSet(BitWidth, ShiftAmt);
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}
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break;
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case Instruction::And:
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AB = AOut;
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// For bits that are known zero, the corresponding bits in the
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// other operand are dead (unless they're both zero, in which
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// case they can't both be dead, so just mark the LHS bits as
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// dead).
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if (OperandNo == 0) {
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ComputeKnownBits(BitWidth, I, UserI->getOperand(1));
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AB &= ~KnownZero2;
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} else {
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if (!isa<Instruction>(UserI->getOperand(0)))
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ComputeKnownBits(BitWidth, UserI->getOperand(0), I);
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AB &= ~(KnownZero & ~KnownZero2);
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}
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break;
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case Instruction::Or:
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AB = AOut;
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// For bits that are known one, the corresponding bits in the
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// other operand are dead (unless they're both one, in which
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// case they can't both be dead, so just mark the LHS bits as
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// dead).
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if (OperandNo == 0) {
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ComputeKnownBits(BitWidth, I, UserI->getOperand(1));
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AB &= ~KnownOne2;
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} else {
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if (!isa<Instruction>(UserI->getOperand(0)))
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ComputeKnownBits(BitWidth, UserI->getOperand(0), I);
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AB &= ~(KnownOne & ~KnownOne2);
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}
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break;
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case Instruction::Xor:
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case Instruction::PHI:
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AB = AOut;
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break;
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case Instruction::Trunc:
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AB = AOut.zext(BitWidth);
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break;
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case Instruction::ZExt:
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AB = AOut.trunc(BitWidth);
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break;
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case Instruction::SExt:
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AB = AOut.trunc(BitWidth);
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// Because the high input bit is replicated into the
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// high-order bits of the result, if we need any of those
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// bits, then we must keep the highest input bit.
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if ((AOut & APInt::getHighBitsSet(AOut.getBitWidth(),
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AOut.getBitWidth() - BitWidth))
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.getBoolValue())
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AB.setBit(BitWidth-1);
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break;
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case Instruction::Select:
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if (OperandNo != 0)
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AB = AOut;
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break;
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}
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}
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bool DemandedBits::runOnFunction(Function& F) {
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AC = &getAnalysis<AssumptionCacheTracker>().getAssumptionCache(F);
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DT = &getAnalysis<DominatorTreeWrapperPass>().getDomTree();
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Visited.clear();
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AliveBits.clear();
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SmallVector<Instruction*, 128> Worklist;
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// Collect the set of "root" instructions that are known live.
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for (Instruction &I : instructions(F)) {
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if (!isAlwaysLive(&I))
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continue;
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DEBUG(dbgs() << "DemandedBits: Root: " << I << "\n");
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// For integer-valued instructions, set up an initial empty set of alive
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// bits and add the instruction to the work list. For other instructions
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// add their operands to the work list (for integer values operands, mark
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// all bits as live).
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if (IntegerType *IT = dyn_cast<IntegerType>(I.getType())) {
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if (!AliveBits.count(&I)) {
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AliveBits[&I] = APInt(IT->getBitWidth(), 0);
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Worklist.push_back(&I);
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}
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continue;
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}
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// Non-integer-typed instructions...
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for (Use &OI : I.operands()) {
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if (Instruction *J = dyn_cast<Instruction>(OI)) {
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if (IntegerType *IT = dyn_cast<IntegerType>(J->getType()))
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AliveBits[J] = APInt::getAllOnesValue(IT->getBitWidth());
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Worklist.push_back(J);
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}
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}
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// To save memory, we don't add I to the Visited set here. Instead, we
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// check isAlwaysLive on every instruction when searching for dead
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// instructions later (we need to check isAlwaysLive for the
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// integer-typed instructions anyway).
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}
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// Propagate liveness backwards to operands.
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while (!Worklist.empty()) {
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Instruction *UserI = Worklist.pop_back_val();
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DEBUG(dbgs() << "DemandedBits: Visiting: " << *UserI);
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APInt AOut;
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if (UserI->getType()->isIntegerTy()) {
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AOut = AliveBits[UserI];
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DEBUG(dbgs() << " Alive Out: " << AOut);
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}
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DEBUG(dbgs() << "\n");
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if (!UserI->getType()->isIntegerTy())
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Visited.insert(UserI);
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APInt KnownZero, KnownOne, KnownZero2, KnownOne2;
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// Compute the set of alive bits for each operand. These are anded into the
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// existing set, if any, and if that changes the set of alive bits, the
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// operand is added to the work-list.
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for (Use &OI : UserI->operands()) {
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if (Instruction *I = dyn_cast<Instruction>(OI)) {
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if (IntegerType *IT = dyn_cast<IntegerType>(I->getType())) {
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unsigned BitWidth = IT->getBitWidth();
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APInt AB = APInt::getAllOnesValue(BitWidth);
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if (UserI->getType()->isIntegerTy() && !AOut &&
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!isAlwaysLive(UserI)) {
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AB = APInt(BitWidth, 0);
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} else {
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// If all bits of the output are dead, then all bits of the input
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// Bits of each operand that are used to compute alive bits of the
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// output are alive, all others are dead.
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determineLiveOperandBits(UserI, I, OI.getOperandNo(), AOut, AB,
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KnownZero, KnownOne,
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KnownZero2, KnownOne2);
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}
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// If we've added to the set of alive bits (or the operand has not
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// been previously visited), then re-queue the operand to be visited
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// again.
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APInt ABPrev(BitWidth, 0);
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auto ABI = AliveBits.find(I);
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if (ABI != AliveBits.end())
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ABPrev = ABI->second;
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APInt ABNew = AB | ABPrev;
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if (ABNew != ABPrev || ABI == AliveBits.end()) {
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AliveBits[I] = std::move(ABNew);
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Worklist.push_back(I);
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}
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} else if (!Visited.count(I)) {
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Worklist.push_back(I);
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}
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}
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}
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}
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return false;
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}
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APInt DemandedBits::getDemandedBits(Instruction *I) {
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const DataLayout &DL = I->getParent()->getModule()->getDataLayout();
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if (AliveBits.count(I))
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return AliveBits[I];
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return APInt::getAllOnesValue(DL.getTypeSizeInBits(I->getType()));
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}
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bool DemandedBits::isInstructionDead(Instruction *I) {
|
||||
return !Visited.count(I) && AliveBits.find(I) == AliveBits.end() &&
|
||||
!isAlwaysLive(I);
|
||||
}
|
||||
|
||||
FunctionPass *llvm::createDemandedBitsPass() {
|
||||
return new DemandedBits();
|
||||
}
|
|
@ -15,26 +15,17 @@
|
|||
//===----------------------------------------------------------------------===//
|
||||
|
||||
#include "llvm/Transforms/Scalar.h"
|
||||
#include "llvm/ADT/DenseMap.h"
|
||||
#include "llvm/ADT/DepthFirstIterator.h"
|
||||
#include "llvm/ADT/SmallPtrSet.h"
|
||||
#include "llvm/ADT/SmallVector.h"
|
||||
#include "llvm/ADT/Statistic.h"
|
||||
#include "llvm/Analysis/AssumptionCache.h"
|
||||
#include "llvm/Analysis/ValueTracking.h"
|
||||
#include "llvm/IR/BasicBlock.h"
|
||||
#include "llvm/Analysis/DemandedBits.h"
|
||||
#include "llvm/IR/CFG.h"
|
||||
#include "llvm/IR/DataLayout.h"
|
||||
#include "llvm/IR/Dominators.h"
|
||||
#include "llvm/IR/InstIterator.h"
|
||||
#include "llvm/IR/Instructions.h"
|
||||
#include "llvm/IR/IntrinsicInst.h"
|
||||
#include "llvm/IR/Module.h"
|
||||
#include "llvm/IR/Operator.h"
|
||||
#include "llvm/Pass.h"
|
||||
#include "llvm/Support/Debug.h"
|
||||
#include "llvm/Support/raw_ostream.h"
|
||||
|
||||
using namespace llvm;
|
||||
|
||||
#define DEBUG_TYPE "bdce"
|
||||
|
@ -53,342 +44,41 @@ struct BDCE : public FunctionPass {
|
|||
|
||||
void getAnalysisUsage(AnalysisUsage& AU) const override {
|
||||
AU.setPreservesCFG();
|
||||
AU.addRequired<AssumptionCacheTracker>();
|
||||
AU.addRequired<DominatorTreeWrapperPass>();
|
||||
AU.addRequired<DemandedBits>();
|
||||
}
|
||||
|
||||
void determineLiveOperandBits(const Instruction *UserI,
|
||||
const Instruction *I, unsigned OperandNo,
|
||||
const APInt &AOut, APInt &AB,
|
||||
APInt &KnownZero, APInt &KnownOne,
|
||||
APInt &KnownZero2, APInt &KnownOne2);
|
||||
|
||||
AssumptionCache *AC;
|
||||
DominatorTree *DT;
|
||||
};
|
||||
}
|
||||
|
||||
char BDCE::ID = 0;
|
||||
INITIALIZE_PASS_BEGIN(BDCE, "bdce", "Bit-Tracking Dead Code Elimination",
|
||||
false, false)
|
||||
INITIALIZE_PASS_DEPENDENCY(AssumptionCacheTracker)
|
||||
INITIALIZE_PASS_DEPENDENCY(DominatorTreeWrapperPass)
|
||||
INITIALIZE_PASS_DEPENDENCY(DemandedBits)
|
||||
INITIALIZE_PASS_END(BDCE, "bdce", "Bit-Tracking Dead Code Elimination",
|
||||
false, false)
|
||||
|
||||
static bool isAlwaysLive(Instruction *I) {
|
||||
return isa<TerminatorInst>(I) || isa<DbgInfoIntrinsic>(I) || I->isEHPad() ||
|
||||
I->mayHaveSideEffects();
|
||||
}
|
||||
|
||||
void BDCE::determineLiveOperandBits(const Instruction *UserI,
|
||||
const Instruction *I, unsigned OperandNo,
|
||||
const APInt &AOut, APInt &AB,
|
||||
APInt &KnownZero, APInt &KnownOne,
|
||||
APInt &KnownZero2, APInt &KnownOne2) {
|
||||
unsigned BitWidth = AB.getBitWidth();
|
||||
|
||||
// We're called once per operand, but for some instructions, we need to
|
||||
// compute known bits of both operands in order to determine the live bits of
|
||||
// either (when both operands are instructions themselves). We don't,
|
||||
// however, want to do this twice, so we cache the result in APInts that live
|
||||
// in the caller. For the two-relevant-operands case, both operand values are
|
||||
// provided here.
|
||||
auto ComputeKnownBits =
|
||||
[&](unsigned BitWidth, const Value *V1, const Value *V2) {
|
||||
const DataLayout &DL = I->getModule()->getDataLayout();
|
||||
KnownZero = APInt(BitWidth, 0);
|
||||
KnownOne = APInt(BitWidth, 0);
|
||||
computeKnownBits(const_cast<Value *>(V1), KnownZero, KnownOne, DL, 0,
|
||||
AC, UserI, DT);
|
||||
|
||||
if (V2) {
|
||||
KnownZero2 = APInt(BitWidth, 0);
|
||||
KnownOne2 = APInt(BitWidth, 0);
|
||||
computeKnownBits(const_cast<Value *>(V2), KnownZero2, KnownOne2, DL,
|
||||
0, AC, UserI, DT);
|
||||
}
|
||||
};
|
||||
|
||||
switch (UserI->getOpcode()) {
|
||||
default: break;
|
||||
case Instruction::Call:
|
||||
case Instruction::Invoke:
|
||||
if (const IntrinsicInst *II = dyn_cast<IntrinsicInst>(UserI))
|
||||
switch (II->getIntrinsicID()) {
|
||||
default: break;
|
||||
case Intrinsic::bswap:
|
||||
// The alive bits of the input are the swapped alive bits of
|
||||
// the output.
|
||||
AB = AOut.byteSwap();
|
||||
break;
|
||||
case Intrinsic::ctlz:
|
||||
if (OperandNo == 0) {
|
||||
// We need some output bits, so we need all bits of the
|
||||
// input to the left of, and including, the leftmost bit
|
||||
// known to be one.
|
||||
ComputeKnownBits(BitWidth, I, nullptr);
|
||||
AB = APInt::getHighBitsSet(BitWidth,
|
||||
std::min(BitWidth, KnownOne.countLeadingZeros()+1));
|
||||
}
|
||||
break;
|
||||
case Intrinsic::cttz:
|
||||
if (OperandNo == 0) {
|
||||
// We need some output bits, so we need all bits of the
|
||||
// input to the right of, and including, the rightmost bit
|
||||
// known to be one.
|
||||
ComputeKnownBits(BitWidth, I, nullptr);
|
||||
AB = APInt::getLowBitsSet(BitWidth,
|
||||
std::min(BitWidth, KnownOne.countTrailingZeros()+1));
|
||||
}
|
||||
break;
|
||||
}
|
||||
break;
|
||||
case Instruction::Add:
|
||||
case Instruction::Sub:
|
||||
// Find the highest live output bit. We don't need any more input
|
||||
// bits than that (adds, and thus subtracts, ripple only to the
|
||||
// left).
|
||||
AB = APInt::getLowBitsSet(BitWidth, AOut.getActiveBits());
|
||||
break;
|
||||
case Instruction::Shl:
|
||||
if (OperandNo == 0)
|
||||
if (ConstantInt *CI =
|
||||
dyn_cast<ConstantInt>(UserI->getOperand(1))) {
|
||||
uint64_t ShiftAmt = CI->getLimitedValue(BitWidth-1);
|
||||
AB = AOut.lshr(ShiftAmt);
|
||||
|
||||
// If the shift is nuw/nsw, then the high bits are not dead
|
||||
// (because we've promised that they *must* be zero).
|
||||
const ShlOperator *S = cast<ShlOperator>(UserI);
|
||||
if (S->hasNoSignedWrap())
|
||||
AB |= APInt::getHighBitsSet(BitWidth, ShiftAmt+1);
|
||||
else if (S->hasNoUnsignedWrap())
|
||||
AB |= APInt::getHighBitsSet(BitWidth, ShiftAmt);
|
||||
}
|
||||
break;
|
||||
case Instruction::LShr:
|
||||
if (OperandNo == 0)
|
||||
if (ConstantInt *CI =
|
||||
dyn_cast<ConstantInt>(UserI->getOperand(1))) {
|
||||
uint64_t ShiftAmt = CI->getLimitedValue(BitWidth-1);
|
||||
AB = AOut.shl(ShiftAmt);
|
||||
|
||||
// If the shift is exact, then the low bits are not dead
|
||||
// (they must be zero).
|
||||
if (cast<LShrOperator>(UserI)->isExact())
|
||||
AB |= APInt::getLowBitsSet(BitWidth, ShiftAmt);
|
||||
}
|
||||
break;
|
||||
case Instruction::AShr:
|
||||
if (OperandNo == 0)
|
||||
if (ConstantInt *CI =
|
||||
dyn_cast<ConstantInt>(UserI->getOperand(1))) {
|
||||
uint64_t ShiftAmt = CI->getLimitedValue(BitWidth-1);
|
||||
AB = AOut.shl(ShiftAmt);
|
||||
// Because the high input bit is replicated into the
|
||||
// high-order bits of the result, if we need any of those
|
||||
// bits, then we must keep the highest input bit.
|
||||
if ((AOut & APInt::getHighBitsSet(BitWidth, ShiftAmt))
|
||||
.getBoolValue())
|
||||
AB.setBit(BitWidth-1);
|
||||
|
||||
// If the shift is exact, then the low bits are not dead
|
||||
// (they must be zero).
|
||||
if (cast<AShrOperator>(UserI)->isExact())
|
||||
AB |= APInt::getLowBitsSet(BitWidth, ShiftAmt);
|
||||
}
|
||||
break;
|
||||
case Instruction::And:
|
||||
AB = AOut;
|
||||
|
||||
// For bits that are known zero, the corresponding bits in the
|
||||
// other operand are dead (unless they're both zero, in which
|
||||
// case they can't both be dead, so just mark the LHS bits as
|
||||
// dead).
|
||||
if (OperandNo == 0) {
|
||||
ComputeKnownBits(BitWidth, I, UserI->getOperand(1));
|
||||
AB &= ~KnownZero2;
|
||||
} else {
|
||||
if (!isa<Instruction>(UserI->getOperand(0)))
|
||||
ComputeKnownBits(BitWidth, UserI->getOperand(0), I);
|
||||
AB &= ~(KnownZero & ~KnownZero2);
|
||||
}
|
||||
break;
|
||||
case Instruction::Or:
|
||||
AB = AOut;
|
||||
|
||||
// For bits that are known one, the corresponding bits in the
|
||||
// other operand are dead (unless they're both one, in which
|
||||
// case they can't both be dead, so just mark the LHS bits as
|
||||
// dead).
|
||||
if (OperandNo == 0) {
|
||||
ComputeKnownBits(BitWidth, I, UserI->getOperand(1));
|
||||
AB &= ~KnownOne2;
|
||||
} else {
|
||||
if (!isa<Instruction>(UserI->getOperand(0)))
|
||||
ComputeKnownBits(BitWidth, UserI->getOperand(0), I);
|
||||
AB &= ~(KnownOne & ~KnownOne2);
|
||||
}
|
||||
break;
|
||||
case Instruction::Xor:
|
||||
case Instruction::PHI:
|
||||
AB = AOut;
|
||||
break;
|
||||
case Instruction::Trunc:
|
||||
AB = AOut.zext(BitWidth);
|
||||
break;
|
||||
case Instruction::ZExt:
|
||||
AB = AOut.trunc(BitWidth);
|
||||
break;
|
||||
case Instruction::SExt:
|
||||
AB = AOut.trunc(BitWidth);
|
||||
// Because the high input bit is replicated into the
|
||||
// high-order bits of the result, if we need any of those
|
||||
// bits, then we must keep the highest input bit.
|
||||
if ((AOut & APInt::getHighBitsSet(AOut.getBitWidth(),
|
||||
AOut.getBitWidth() - BitWidth))
|
||||
.getBoolValue())
|
||||
AB.setBit(BitWidth-1);
|
||||
break;
|
||||
case Instruction::Select:
|
||||
if (OperandNo != 0)
|
||||
AB = AOut;
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
bool BDCE::runOnFunction(Function& F) {
|
||||
if (skipOptnoneFunction(F))
|
||||
return false;
|
||||
DemandedBits &DB = getAnalysis<DemandedBits>();
|
||||
|
||||
AC = &getAnalysis<AssumptionCacheTracker>().getAssumptionCache(F);
|
||||
DT = &getAnalysis<DominatorTreeWrapperPass>().getDomTree();
|
||||
|
||||
DenseMap<Instruction *, APInt> AliveBits;
|
||||
SmallVector<Instruction*, 128> Worklist;
|
||||
|
||||
// The set of visited instructions (non-integer-typed only).
|
||||
SmallPtrSet<Instruction*, 128> Visited;
|
||||
|
||||
// Collect the set of "root" instructions that are known live.
|
||||
for (Instruction &I : instructions(F)) {
|
||||
if (!isAlwaysLive(&I))
|
||||
continue;
|
||||
|
||||
DEBUG(dbgs() << "BDCE: Root: " << I << "\n");
|
||||
// For integer-valued instructions, set up an initial empty set of alive
|
||||
// bits and add the instruction to the work list. For other instructions
|
||||
// add their operands to the work list (for integer values operands, mark
|
||||
// all bits as live).
|
||||
if (IntegerType *IT = dyn_cast<IntegerType>(I.getType())) {
|
||||
if (!AliveBits.count(&I)) {
|
||||
AliveBits[&I] = APInt(IT->getBitWidth(), 0);
|
||||
Worklist.push_back(&I);
|
||||
}
|
||||
|
||||
continue;
|
||||
}
|
||||
|
||||
// Non-integer-typed instructions...
|
||||
for (Use &OI : I.operands()) {
|
||||
if (Instruction *J = dyn_cast<Instruction>(OI)) {
|
||||
if (IntegerType *IT = dyn_cast<IntegerType>(J->getType()))
|
||||
AliveBits[J] = APInt::getAllOnesValue(IT->getBitWidth());
|
||||
Worklist.push_back(J);
|
||||
}
|
||||
}
|
||||
// To save memory, we don't add I to the Visited set here. Instead, we
|
||||
// check isAlwaysLive on every instruction when searching for dead
|
||||
// instructions later (we need to check isAlwaysLive for the
|
||||
// integer-typed instructions anyway).
|
||||
}
|
||||
|
||||
// Propagate liveness backwards to operands.
|
||||
while (!Worklist.empty()) {
|
||||
Instruction *UserI = Worklist.pop_back_val();
|
||||
|
||||
DEBUG(dbgs() << "BDCE: Visiting: " << *UserI);
|
||||
APInt AOut;
|
||||
if (UserI->getType()->isIntegerTy()) {
|
||||
AOut = AliveBits[UserI];
|
||||
DEBUG(dbgs() << " Alive Out: " << AOut);
|
||||
}
|
||||
DEBUG(dbgs() << "\n");
|
||||
|
||||
if (!UserI->getType()->isIntegerTy())
|
||||
Visited.insert(UserI);
|
||||
|
||||
APInt KnownZero, KnownOne, KnownZero2, KnownOne2;
|
||||
// Compute the set of alive bits for each operand. These are anded into the
|
||||
// existing set, if any, and if that changes the set of alive bits, the
|
||||
// operand is added to the work-list.
|
||||
for (Use &OI : UserI->operands()) {
|
||||
if (Instruction *I = dyn_cast<Instruction>(OI)) {
|
||||
if (IntegerType *IT = dyn_cast<IntegerType>(I->getType())) {
|
||||
unsigned BitWidth = IT->getBitWidth();
|
||||
APInt AB = APInt::getAllOnesValue(BitWidth);
|
||||
if (UserI->getType()->isIntegerTy() && !AOut &&
|
||||
!isAlwaysLive(UserI)) {
|
||||
AB = APInt(BitWidth, 0);
|
||||
} else {
|
||||
// If all bits of the output are dead, then all bits of the input
|
||||
// Bits of each operand that are used to compute alive bits of the
|
||||
// output are alive, all others are dead.
|
||||
determineLiveOperandBits(UserI, I, OI.getOperandNo(), AOut, AB,
|
||||
KnownZero, KnownOne,
|
||||
KnownZero2, KnownOne2);
|
||||
}
|
||||
|
||||
// If we've added to the set of alive bits (or the operand has not
|
||||
// been previously visited), then re-queue the operand to be visited
|
||||
// again.
|
||||
APInt ABPrev(BitWidth, 0);
|
||||
auto ABI = AliveBits.find(I);
|
||||
if (ABI != AliveBits.end())
|
||||
ABPrev = ABI->second;
|
||||
|
||||
APInt ABNew = AB | ABPrev;
|
||||
if (ABNew != ABPrev || ABI == AliveBits.end()) {
|
||||
AliveBits[I] = std::move(ABNew);
|
||||
Worklist.push_back(I);
|
||||
}
|
||||
} else if (!Visited.count(I)) {
|
||||
Worklist.push_back(I);
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
bool Changed = false;
|
||||
// The inverse of the live set is the dead set. These are those instructions
|
||||
// which have no side effects and do not influence the control flow or return
|
||||
// value of the function, and may therefore be deleted safely.
|
||||
// NOTE: We reuse the Worklist vector here for memory efficiency.
|
||||
for (Instruction &I : instructions(F)) {
|
||||
// For live instructions that have all dead bits, first make them dead by
|
||||
// replacing all uses with something else. Then, if they don't need to
|
||||
// remain live (because they have side effects, etc.) we can remove them.
|
||||
if (I.getType()->isIntegerTy()) {
|
||||
auto ABI = AliveBits.find(&I);
|
||||
if (ABI != AliveBits.end()) {
|
||||
if (ABI->second.getBoolValue())
|
||||
continue;
|
||||
|
||||
DEBUG(dbgs() << "BDCE: Trivializing: " << I << " (all bits dead)\n");
|
||||
// FIXME: In theory we could substitute undef here instead of zero.
|
||||
// This should be reconsidered once we settle on the semantics of
|
||||
// undef, poison, etc.
|
||||
Value *Zero = ConstantInt::get(I.getType(), 0);
|
||||
++NumSimplified;
|
||||
I.replaceAllUsesWith(Zero);
|
||||
Changed = true;
|
||||
}
|
||||
} else if (Visited.count(&I)) {
|
||||
continue;
|
||||
if (I.getType()->isIntegerTy() &&
|
||||
!DB.getDemandedBits(&I).getBoolValue()) {
|
||||
// For live instructions that have all dead bits, first make them dead by
|
||||
// replacing all uses with something else. Then, if they don't need to
|
||||
// remain live (because they have side effects, etc.) we can remove them.
|
||||
DEBUG(dbgs() << "BDCE: Trivializing: " << I << " (all bits dead)\n");
|
||||
// FIXME: In theory we could substitute undef here instead of zero.
|
||||
// This should be reconsidered once we settle on the semantics of
|
||||
// undef, poison, etc.
|
||||
Value *Zero = ConstantInt::get(I.getType(), 0);
|
||||
++NumSimplified;
|
||||
I.replaceAllUsesWith(Zero);
|
||||
Changed = true;
|
||||
}
|
||||
|
||||
if (isAlwaysLive(&I))
|
||||
if (!DB.isInstructionDead(&I))
|
||||
continue;
|
||||
|
||||
Worklist.push_back(&I);
|
||||
|
|
Loading…
Reference in New Issue