forked from OSchip/llvm-project
[LoongArch] Implement branch analysis
This allows a number of optimisation passes to work. E.g. BranchFolding and MachineBlockPlacement. Differential Revision: https://reviews.llvm.org/D131316
This commit is contained in:
wanglei
Weining Lu
parent
f35cb7ba34
commit
8716513e65
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@ -113,3 +113,192 @@ void LoongArchInstrInfo::loadRegFromStackSlot(
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.addImm(0)
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.addMemOperand(MMO);
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}
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unsigned LoongArchInstrInfo::getInstSizeInBytes(const MachineInstr &MI) const {
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return MI.getDesc().getSize();
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}
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MachineBasicBlock *
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LoongArchInstrInfo::getBranchDestBlock(const MachineInstr &MI) const {
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assert(MI.getDesc().isBranch() && "Unexpected opcode!");
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// The branch target is always the last operand.
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return MI.getOperand(MI.getNumExplicitOperands() - 1).getMBB();
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}
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static void parseCondBranch(MachineInstr &LastInst, MachineBasicBlock *&Target,
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SmallVectorImpl<MachineOperand> &Cond) {
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// Block ends with fall-through condbranch.
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assert(LastInst.getDesc().isConditionalBranch() &&
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"Unknown conditional branch");
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int NumOp = LastInst.getNumExplicitOperands();
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Target = LastInst.getOperand(NumOp - 1).getMBB();
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Cond.push_back(MachineOperand::CreateImm(LastInst.getOpcode()));
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for (int i = 0; i < NumOp - 1; i++)
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Cond.push_back(LastInst.getOperand(i));
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}
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bool LoongArchInstrInfo::analyzeBranch(MachineBasicBlock &MBB,
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MachineBasicBlock *&TBB,
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MachineBasicBlock *&FBB,
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SmallVectorImpl<MachineOperand> &Cond,
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bool AllowModify) const {
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TBB = FBB = nullptr;
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Cond.clear();
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// If the block has no terminators, it just falls into the block after it.
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MachineBasicBlock::iterator I = MBB.getLastNonDebugInstr();
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if (I == MBB.end() || !isUnpredicatedTerminator(*I))
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return false;
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// Count the number of terminators and find the first unconditional or
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// indirect branch.
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MachineBasicBlock::iterator FirstUncondOrIndirectBr = MBB.end();
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int NumTerminators = 0;
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for (auto J = I.getReverse(); J != MBB.rend() && isUnpredicatedTerminator(*J);
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J++) {
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NumTerminators++;
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if (J->getDesc().isUnconditionalBranch() ||
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J->getDesc().isIndirectBranch()) {
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FirstUncondOrIndirectBr = J.getReverse();
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}
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}
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// If AllowModify is true, we can erase any terminators after
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// FirstUncondOrIndirectBR.
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if (AllowModify && FirstUncondOrIndirectBr != MBB.end()) {
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while (std::next(FirstUncondOrIndirectBr) != MBB.end()) {
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std::next(FirstUncondOrIndirectBr)->eraseFromParent();
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NumTerminators--;
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}
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I = FirstUncondOrIndirectBr;
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}
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// Handle a single unconditional branch.
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if (NumTerminators == 1 && I->getDesc().isUnconditionalBranch()) {
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TBB = getBranchDestBlock(*I);
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return false;
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}
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// Handle a single conditional branch.
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if (NumTerminators == 1 && I->getDesc().isConditionalBranch()) {
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parseCondBranch(*I, TBB, Cond);
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return false;
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}
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// Handle a conditional branch followed by an unconditional branch.
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if (NumTerminators == 2 && std::prev(I)->getDesc().isConditionalBranch() &&
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I->getDesc().isUnconditionalBranch()) {
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parseCondBranch(*std::prev(I), TBB, Cond);
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FBB = getBranchDestBlock(*I);
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return false;
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}
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// Otherwise, we can't handle this.
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return true;
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}
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unsigned LoongArchInstrInfo::removeBranch(MachineBasicBlock &MBB,
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int *BytesRemoved) const {
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if (BytesRemoved)
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*BytesRemoved = 0;
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MachineBasicBlock::iterator I = MBB.getLastNonDebugInstr();
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if (I == MBB.end())
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return 0;
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if (!I->getDesc().isBranch())
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return 0;
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// Remove the branch.
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if (BytesRemoved)
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*BytesRemoved += getInstSizeInBytes(*I);
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I->eraseFromParent();
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I = MBB.end();
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if (I == MBB.begin())
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return 1;
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--I;
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if (!I->getDesc().isConditionalBranch())
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return 1;
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// Remove the branch.
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if (BytesRemoved)
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*BytesRemoved += getInstSizeInBytes(*I);
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I->eraseFromParent();
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return 2;
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}
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// Inserts a branch into the end of the specific MachineBasicBlock, returning
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// the number of instructions inserted.
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unsigned LoongArchInstrInfo::insertBranch(
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MachineBasicBlock &MBB, MachineBasicBlock *TBB, MachineBasicBlock *FBB,
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ArrayRef<MachineOperand> Cond, const DebugLoc &DL, int *BytesAdded) const {
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if (BytesAdded)
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*BytesAdded = 0;
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// Shouldn't be a fall through.
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assert(TBB && "insertBranch must not be told to insert a fallthrough");
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assert(Cond.size() <= 3 && Cond.size() != 1 &&
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"LoongArch branch conditions have at most two components!");
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// Unconditional branch.
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if (Cond.empty()) {
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MachineInstr &MI = *BuildMI(&MBB, DL, get(LoongArch::PseudoBR)).addMBB(TBB);
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if (BytesAdded)
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*BytesAdded += getInstSizeInBytes(MI);
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return 1;
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}
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// Either a one or two-way conditional branch.
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MachineInstrBuilder MIB = BuildMI(&MBB, DL, get(Cond[0].getImm()));
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for (unsigned i = 1; i < Cond.size(); ++i)
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MIB.add(Cond[i]);
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MIB.addMBB(TBB);
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if (BytesAdded)
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*BytesAdded += getInstSizeInBytes(*MIB);
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// One-way conditional branch.
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if (!FBB)
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return 1;
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// Two-way conditional branch.
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MachineInstr &MI = *BuildMI(&MBB, DL, get(LoongArch::PseudoBR)).addMBB(FBB);
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if (BytesAdded)
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*BytesAdded += getInstSizeInBytes(MI);
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return 2;
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}
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static unsigned getOppositeBranchOpc(unsigned Opc) {
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switch (Opc) {
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default:
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llvm_unreachable("Unrecognized conditional branch");
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case LoongArch::BEQ:
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return LoongArch::BNE;
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case LoongArch::BNE:
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return LoongArch::BEQ;
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case LoongArch::BEQZ:
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return LoongArch::BNEZ;
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case LoongArch::BNEZ:
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return LoongArch::BEQZ;
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case LoongArch::BCEQZ:
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return LoongArch::BCNEZ;
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case LoongArch::BCNEZ:
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return LoongArch::BCEQZ;
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case LoongArch::BLT:
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return LoongArch::BGE;
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case LoongArch::BGE:
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return LoongArch::BLT;
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case LoongArch::BLTU:
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return LoongArch::BGEU;
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case LoongArch::BGEU:
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return LoongArch::BLTU;
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}
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}
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bool LoongArchInstrInfo::reverseBranchCondition(
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SmallVectorImpl<MachineOperand> &Cond) const {
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assert((Cond.size() && Cond.size() <= 3) && "Invalid branch condition!");
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Cond[0].setImm(getOppositeBranchOpc(Cond[0].getImm()));
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return false;
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}
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@ -40,6 +40,26 @@ public:
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MachineBasicBlock::iterator MBBI, Register DstReg,
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int FrameIndex, const TargetRegisterClass *RC,
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const TargetRegisterInfo *TRI) const override;
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unsigned getInstSizeInBytes(const MachineInstr &MI) const override;
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MachineBasicBlock *getBranchDestBlock(const MachineInstr &MI) const override;
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bool analyzeBranch(MachineBasicBlock &MBB, MachineBasicBlock *&TBB,
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MachineBasicBlock *&FBB,
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SmallVectorImpl<MachineOperand> &Cond,
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bool AllowModify) const override;
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unsigned removeBranch(MachineBasicBlock &MBB,
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int *BytesRemoved = nullptr) const override;
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unsigned insertBranch(MachineBasicBlock &MBB, MachineBasicBlock *TBB,
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MachineBasicBlock *FBB, ArrayRef<MachineOperand> Cond,
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const DebugLoc &dl,
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int *BytesAdded = nullptr) const override;
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bool
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reverseBranchCondition(SmallVectorImpl<MachineOperand> &Cond) const override;
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};
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} // end namespace llvm
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@ -0,0 +1,76 @@
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; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc --mtriple=loongarch64 < %s | FileCheck %s
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;; This test checks that LLVM can do basic stripping and reapplying of branches
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;; to basic blocks.
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declare void @test_true()
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declare void @test_false()
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;; !0 corresponds to a branch being taken, !1 to not being taken.
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!0 = !{!"branch_weights", i32 64, i32 4}
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!1 = !{!"branch_weights", i32 4, i32 64}
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define void @test_bcc_fallthrough_taken(i64 %in) nounwind {
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; CHECK-LABEL: test_bcc_fallthrough_taken:
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; CHECK: # %bb.0:
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; CHECK-NEXT: addi.d $sp, $sp, -16
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; CHECK-NEXT: st.d $ra, $sp, 8 # 8-byte Folded Spill
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; CHECK-NEXT: ori $a1, $zero, 42
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; CHECK-NEXT: bne $a0, $a1, .LBB0_3
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; CHECK-NEXT: # %bb.1: # %true
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; CHECK-NEXT: bl test_true
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; CHECK-NEXT: .LBB0_2: # %true
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; CHECK-NEXT: ld.d $ra, $sp, 8 # 8-byte Folded Reload
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; CHECK-NEXT: addi.d $sp, $sp, 16
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; CHECK-NEXT: jirl $zero, $ra, 0
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; CHECK-NEXT: .LBB0_3: # %false
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; CHECK-NEXT: bl test_false
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; CHECK-NEXT: b .LBB0_2
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%tst = icmp eq i64 %in, 42
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br i1 %tst, label %true, label %false, !prof !0
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;; Expected layout order is: Entry, TrueBlock, FalseBlock
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;; Entry->TrueBlock is the common path, which should be taken whenever the
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;; conditional branch is false.
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true:
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call void @test_true()
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ret void
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false:
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call void @test_false()
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ret void
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}
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define void @test_bcc_fallthrough_nottaken(i64 %in) nounwind {
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; CHECK-LABEL: test_bcc_fallthrough_nottaken:
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; CHECK: # %bb.0:
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; CHECK-NEXT: addi.d $sp, $sp, -16
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; CHECK-NEXT: st.d $ra, $sp, 8 # 8-byte Folded Spill
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; CHECK-NEXT: ori $a1, $zero, 42
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; CHECK-NEXT: beq $a0, $a1, .LBB1_1
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; CHECK-NEXT: # %bb.3: # %false
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; CHECK-NEXT: bl test_false
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; CHECK-NEXT: .LBB1_2: # %true
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; CHECK-NEXT: ld.d $ra, $sp, 8 # 8-byte Folded Reload
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; CHECK-NEXT: addi.d $sp, $sp, 16
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; CHECK-NEXT: jirl $zero, $ra, 0
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; CHECK-NEXT: .LBB1_1: # %true
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; CHECK-NEXT: bl test_true
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; CHECK-NEXT: b .LBB1_2
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%tst = icmp eq i64 %in, 42
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br i1 %tst, label %true, label %false, !prof !1
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;; Expected layout order is: Entry, FalseBlock, TrueBlock
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;; Entry->FalseBlock is the common path, which should be taken whenever the
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;; conditional branch is false.
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true:
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call void @test_true()
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ret void
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false:
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call void @test_false()
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ret void
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}
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@ -1,3 +1,4 @@
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; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc --mtriple=loongarch32 < %s | FileCheck %s --check-prefixes=ALL,LA32
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; RUN: llc --mtriple=loongarch64 < %s | FileCheck %s --check-prefixes=ALL,LA64
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@ -18,8 +19,7 @@ define void @foo_br_eq(i32 %a, ptr %b) nounwind {
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; LA32: # %bb.0:
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; LA32-NEXT: ld.w $a2, $a1, 0
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; LA32-NEXT: beq $a2, $a0, .LBB1_2
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; LA32-NEXT: b .LBB1_1
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; LA32-NEXT: .LBB1_1: # %test
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; LA32-NEXT: # %bb.1: # %test
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; LA32-NEXT: ld.w $a0, $a1, 0
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; LA32-NEXT: .LBB1_2: # %end
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; LA32-NEXT: jirl $zero, $ra, 0
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@ -29,8 +29,7 @@ define void @foo_br_eq(i32 %a, ptr %b) nounwind {
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; LA64-NEXT: ld.wu $a2, $a1, 0
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; LA64-NEXT: bstrpick.d $a0, $a0, 31, 0
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; LA64-NEXT: beq $a2, $a0, .LBB1_2
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; LA64-NEXT: b .LBB1_1
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; LA64-NEXT: .LBB1_1: # %test
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; LA64-NEXT: # %bb.1: # %test
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; LA64-NEXT: ld.w $a0, $a1, 0
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; LA64-NEXT: .LBB1_2: # %end
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; LA64-NEXT: jirl $zero, $ra, 0
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@ -50,8 +49,7 @@ define void @foo_br_ne(i32 %a, ptr %b) nounwind {
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; LA32: # %bb.0:
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; LA32-NEXT: ld.w $a2, $a1, 0
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; LA32-NEXT: bne $a2, $a0, .LBB2_2
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; LA32-NEXT: b .LBB2_1
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; LA32-NEXT: .LBB2_1: # %test
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; LA32-NEXT: # %bb.1: # %test
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; LA32-NEXT: ld.w $a0, $a1, 0
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; LA32-NEXT: .LBB2_2: # %end
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; LA32-NEXT: jirl $zero, $ra, 0
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@ -61,8 +59,7 @@ define void @foo_br_ne(i32 %a, ptr %b) nounwind {
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; LA64-NEXT: ld.wu $a2, $a1, 0
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; LA64-NEXT: bstrpick.d $a0, $a0, 31, 0
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; LA64-NEXT: bne $a2, $a0, .LBB2_2
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; LA64-NEXT: b .LBB2_1
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; LA64-NEXT: .LBB2_1: # %test
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; LA64-NEXT: # %bb.1: # %test
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; LA64-NEXT: ld.w $a0, $a1, 0
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; LA64-NEXT: .LBB2_2: # %end
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; LA64-NEXT: jirl $zero, $ra, 0
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@ -82,8 +79,7 @@ define void @foo_br_slt(i32 %a, ptr %b) nounwind {
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; LA32: # %bb.0:
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; LA32-NEXT: ld.w $a2, $a1, 0
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; LA32-NEXT: blt $a2, $a0, .LBB3_2
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; LA32-NEXT: b .LBB3_1
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; LA32-NEXT: .LBB3_1: # %test
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; LA32-NEXT: # %bb.1: # %test
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; LA32-NEXT: ld.w $a0, $a1, 0
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; LA32-NEXT: .LBB3_2: # %end
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; LA32-NEXT: jirl $zero, $ra, 0
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@ -93,8 +89,7 @@ define void @foo_br_slt(i32 %a, ptr %b) nounwind {
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; LA64-NEXT: ld.w $a2, $a1, 0
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; LA64-NEXT: addi.w $a0, $a0, 0
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; LA64-NEXT: blt $a2, $a0, .LBB3_2
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; LA64-NEXT: b .LBB3_1
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; LA64-NEXT: .LBB3_1: # %test
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; LA64-NEXT: # %bb.1: # %test
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; LA64-NEXT: ld.w $a0, $a1, 0
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; LA64-NEXT: .LBB3_2: # %end
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; LA64-NEXT: jirl $zero, $ra, 0
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@ -114,8 +109,7 @@ define void @foo_br_sge(i32 %a, ptr %b) nounwind {
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; LA32: # %bb.0:
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; LA32-NEXT: ld.w $a2, $a1, 0
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; LA32-NEXT: bge $a2, $a0, .LBB4_2
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; LA32-NEXT: b .LBB4_1
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; LA32-NEXT: .LBB4_1: # %test
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; LA32-NEXT: # %bb.1: # %test
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; LA32-NEXT: ld.w $a0, $a1, 0
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; LA32-NEXT: .LBB4_2: # %end
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; LA32-NEXT: jirl $zero, $ra, 0
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@ -125,8 +119,7 @@ define void @foo_br_sge(i32 %a, ptr %b) nounwind {
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; LA64-NEXT: ld.w $a2, $a1, 0
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; LA64-NEXT: addi.w $a0, $a0, 0
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; LA64-NEXT: bge $a2, $a0, .LBB4_2
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; LA64-NEXT: b .LBB4_1
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; LA64-NEXT: .LBB4_1: # %test
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; LA64-NEXT: # %bb.1: # %test
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; LA64-NEXT: ld.w $a0, $a1, 0
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; LA64-NEXT: .LBB4_2: # %end
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; LA64-NEXT: jirl $zero, $ra, 0
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@ -146,8 +139,7 @@ define void @foo_br_ult(i32 %a, ptr %b) nounwind {
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; LA32: # %bb.0:
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; LA32-NEXT: ld.w $a2, $a1, 0
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; LA32-NEXT: bltu $a2, $a0, .LBB5_2
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; LA32-NEXT: b .LBB5_1
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; LA32-NEXT: .LBB5_1: # %test
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; LA32-NEXT: # %bb.1: # %test
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; LA32-NEXT: ld.w $a0, $a1, 0
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; LA32-NEXT: .LBB5_2: # %end
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; LA32-NEXT: jirl $zero, $ra, 0
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@ -157,8 +149,7 @@ define void @foo_br_ult(i32 %a, ptr %b) nounwind {
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; LA64-NEXT: ld.wu $a2, $a1, 0
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; LA64-NEXT: bstrpick.d $a0, $a0, 31, 0
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; LA64-NEXT: bltu $a2, $a0, .LBB5_2
|
||||
; LA64-NEXT: b .LBB5_1
|
||||
; LA64-NEXT: .LBB5_1: # %test
|
||||
; LA64-NEXT: # %bb.1: # %test
|
||||
; LA64-NEXT: ld.w $a0, $a1, 0
|
||||
; LA64-NEXT: .LBB5_2: # %end
|
||||
; LA64-NEXT: jirl $zero, $ra, 0
|
||||
|
|
@ -178,8 +169,7 @@ define void @foo_br_uge(i32 %a, ptr %b) nounwind {
|
|||
; LA32: # %bb.0:
|
||||
; LA32-NEXT: ld.w $a2, $a1, 0
|
||||
; LA32-NEXT: bgeu $a2, $a0, .LBB6_2
|
||||
; LA32-NEXT: b .LBB6_1
|
||||
; LA32-NEXT: .LBB6_1: # %test
|
||||
; LA32-NEXT: # %bb.1: # %test
|
||||
; LA32-NEXT: ld.w $a0, $a1, 0
|
||||
; LA32-NEXT: .LBB6_2: # %end
|
||||
; LA32-NEXT: jirl $zero, $ra, 0
|
||||
|
|
@ -189,8 +179,7 @@ define void @foo_br_uge(i32 %a, ptr %b) nounwind {
|
|||
; LA64-NEXT: ld.wu $a2, $a1, 0
|
||||
; LA64-NEXT: bstrpick.d $a0, $a0, 31, 0
|
||||
; LA64-NEXT: bgeu $a2, $a0, .LBB6_2
|
||||
; LA64-NEXT: b .LBB6_1
|
||||
; LA64-NEXT: .LBB6_1: # %test
|
||||
; LA64-NEXT: # %bb.1: # %test
|
||||
; LA64-NEXT: ld.w $a0, $a1, 0
|
||||
; LA64-NEXT: .LBB6_2: # %end
|
||||
; LA64-NEXT: jirl $zero, $ra, 0
|
||||
|
|
@ -211,8 +200,7 @@ define void @foo_br_sgt(i32 %a, ptr %b) nounwind {
|
|||
; LA32: # %bb.0:
|
||||
; LA32-NEXT: ld.w $a2, $a1, 0
|
||||
; LA32-NEXT: blt $a0, $a2, .LBB7_2
|
||||
; LA32-NEXT: b .LBB7_1
|
||||
; LA32-NEXT: .LBB7_1: # %test
|
||||
; LA32-NEXT: # %bb.1: # %test
|
||||
; LA32-NEXT: ld.w $a0, $a1, 0
|
||||
; LA32-NEXT: .LBB7_2: # %end
|
||||
; LA32-NEXT: jirl $zero, $ra, 0
|
||||
|
|
@ -222,8 +210,7 @@ define void @foo_br_sgt(i32 %a, ptr %b) nounwind {
|
|||
; LA64-NEXT: ld.w $a2, $a1, 0
|
||||
; LA64-NEXT: addi.w $a0, $a0, 0
|
||||
; LA64-NEXT: blt $a0, $a2, .LBB7_2
|
||||
; LA64-NEXT: b .LBB7_1
|
||||
; LA64-NEXT: .LBB7_1: # %test
|
||||
; LA64-NEXT: # %bb.1: # %test
|
||||
; LA64-NEXT: ld.w $a0, $a1, 0
|
||||
; LA64-NEXT: .LBB7_2: # %end
|
||||
; LA64-NEXT: jirl $zero, $ra, 0
|
||||
|
|
@ -243,8 +230,7 @@ define void @foo_br_sle(i32 %a, ptr %b) nounwind {
|
|||
; LA32: # %bb.0:
|
||||
; LA32-NEXT: ld.w $a2, $a1, 0
|
||||
; LA32-NEXT: bge $a0, $a2, .LBB8_2
|
||||
; LA32-NEXT: b .LBB8_1
|
||||
; LA32-NEXT: .LBB8_1: # %test
|
||||
; LA32-NEXT: # %bb.1: # %test
|
||||
; LA32-NEXT: ld.w $a0, $a1, 0
|
||||
; LA32-NEXT: .LBB8_2: # %end
|
||||
; LA32-NEXT: jirl $zero, $ra, 0
|
||||
|
|
@ -254,8 +240,7 @@ define void @foo_br_sle(i32 %a, ptr %b) nounwind {
|
|||
; LA64-NEXT: ld.w $a2, $a1, 0
|
||||
; LA64-NEXT: addi.w $a0, $a0, 0
|
||||
; LA64-NEXT: bge $a0, $a2, .LBB8_2
|
||||
; LA64-NEXT: b .LBB8_1
|
||||
; LA64-NEXT: .LBB8_1: # %test
|
||||
; LA64-NEXT: # %bb.1: # %test
|
||||
; LA64-NEXT: ld.w $a0, $a1, 0
|
||||
; LA64-NEXT: .LBB8_2: # %end
|
||||
; LA64-NEXT: jirl $zero, $ra, 0
|
||||
|
|
@ -275,8 +260,7 @@ define void @foo_br_ugt(i32 %a, ptr %b) nounwind {
|
|||
; LA32: # %bb.0:
|
||||
; LA32-NEXT: ld.w $a2, $a1, 0
|
||||
; LA32-NEXT: bltu $a0, $a2, .LBB9_2
|
||||
; LA32-NEXT: b .LBB9_1
|
||||
; LA32-NEXT: .LBB9_1: # %test
|
||||
; LA32-NEXT: # %bb.1: # %test
|
||||
; LA32-NEXT: ld.w $a0, $a1, 0
|
||||
; LA32-NEXT: .LBB9_2: # %end
|
||||
; LA32-NEXT: jirl $zero, $ra, 0
|
||||
|
|
@ -286,8 +270,7 @@ define void @foo_br_ugt(i32 %a, ptr %b) nounwind {
|
|||
; LA64-NEXT: ld.wu $a2, $a1, 0
|
||||
; LA64-NEXT: bstrpick.d $a0, $a0, 31, 0
|
||||
; LA64-NEXT: bltu $a0, $a2, .LBB9_2
|
||||
; LA64-NEXT: b .LBB9_1
|
||||
; LA64-NEXT: .LBB9_1: # %test
|
||||
; LA64-NEXT: # %bb.1: # %test
|
||||
; LA64-NEXT: ld.w $a0, $a1, 0
|
||||
; LA64-NEXT: .LBB9_2: # %end
|
||||
; LA64-NEXT: jirl $zero, $ra, 0
|
||||
|
|
@ -307,8 +290,7 @@ define void @foo_br_ule(i32 %a, ptr %b) nounwind {
|
|||
; LA32: # %bb.0:
|
||||
; LA32-NEXT: ld.w $a2, $a1, 0
|
||||
; LA32-NEXT: bgeu $a0, $a2, .LBB10_2
|
||||
; LA32-NEXT: b .LBB10_1
|
||||
; LA32-NEXT: .LBB10_1: # %test
|
||||
; LA32-NEXT: # %bb.1: # %test
|
||||
; LA32-NEXT: ld.w $a0, $a1, 0
|
||||
; LA32-NEXT: .LBB10_2: # %end
|
||||
; LA32-NEXT: jirl $zero, $ra, 0
|
||||
|
|
@ -318,8 +300,7 @@ define void @foo_br_ule(i32 %a, ptr %b) nounwind {
|
|||
; LA64-NEXT: ld.wu $a2, $a1, 0
|
||||
; LA64-NEXT: bstrpick.d $a0, $a0, 31, 0
|
||||
; LA64-NEXT: bgeu $a0, $a2, .LBB10_2
|
||||
; LA64-NEXT: b .LBB10_1
|
||||
; LA64-NEXT: .LBB10_1: # %test
|
||||
; LA64-NEXT: # %bb.1: # %test
|
||||
; LA64-NEXT: ld.w $a0, $a1, 0
|
||||
; LA64-NEXT: .LBB10_2: # %end
|
||||
; LA64-NEXT: jirl $zero, $ra, 0
|
||||
|
|
@ -342,8 +323,7 @@ define void @foo_br_cc(ptr %a, i1 %cc) nounwind {
|
|||
; ALL-NEXT: ld.w $a2, $a0, 0
|
||||
; ALL-NEXT: andi $a1, $a1, 1
|
||||
; ALL-NEXT: bnez $a1, .LBB11_2
|
||||
; ALL-NEXT: b .LBB11_1
|
||||
; ALL-NEXT: .LBB11_1: # %test
|
||||
; ALL-NEXT: # %bb.1: # %test
|
||||
; ALL-NEXT: ld.w $a0, $a0, 0
|
||||
; ALL-NEXT: .LBB11_2: # %end
|
||||
; ALL-NEXT: jirl $zero, $ra, 0
|
||||
|
|
|
|||
|
|
@ -74,24 +74,16 @@ attributes #0 = { noredzone nounwind ssp uwtable "frame-pointer"="all" }
|
|||
; CHECK-NEXT: .cfi_def_cfa 22, 0
|
||||
; CHECK-NEXT: st.w $zero, $fp, -16
|
||||
; CHECK-NEXT: st.w $zero, $fp, -12
|
||||
; CHECK-NEXT: bnez $zero, .LBB0_2
|
||||
; CHECK-NEXT: b .LBB0_1
|
||||
; CHECK-NEXT: .LBB0_2:
|
||||
; CHECK-NEXT: beqz $zero, .LBB0_1
|
||||
; CHECK-NEXT: # %bb.2:
|
||||
; CHECK-NEXT: ori $a0, $zero, 1
|
||||
; CHECK-NEXT: st.w $a0, $fp, -24
|
||||
; CHECK-NEXT: .LBB0_3:
|
||||
; CHECK-NEXT: ld.w $a0, $fp, -16
|
||||
; CHECK-NEXT: bne $a0, $zero, .LBB0_5
|
||||
; CHECK-NEXT: b .LBB0_4
|
||||
; CHECK-NEXT: beq $a0, $zero, .LBB0_4
|
||||
; CHECK-NEXT: .LBB0_5:
|
||||
; CHECK-NEXT: ori $a0, $zero, 1
|
||||
; CHECK-NEXT: st.w $a0, $fp, -24
|
||||
; CHECK-NEXT: .LBB0_6:
|
||||
; CHECK-NEXT: move $a0, $zero
|
||||
; CHECK-NEXT: ld.w $fp, $sp, 24 # 4-byte Folded Reload
|
||||
; CHECK-NEXT: ld.w $ra, $sp, 28 # 4-byte Folded Reload
|
||||
; CHECK-NEXT: addi.w $sp, $sp, 32
|
||||
; CHECK-NEXT: jirl $zero, $ra, 0
|
||||
; CHECK-NEXT: b .LBB0_6
|
||||
; CHECK-NEXT: .LBB0_1:
|
||||
; CHECK-NEXT: ori $a0, $zero, 2
|
||||
; CHECK-NEXT: st.w $a0, $fp, -20
|
||||
|
|
@ -101,7 +93,8 @@ attributes #0 = { noredzone nounwind ssp uwtable "frame-pointer"="all" }
|
|||
; CHECK-NEXT: st.w $a0, $fp, -24
|
||||
; CHECK-NEXT: ori $a0, $zero, 4
|
||||
; CHECK-NEXT: st.w $a0, $fp, -28
|
||||
; CHECK-NEXT: b .LBB0_3
|
||||
; CHECK-NEXT: ld.w $a0, $fp, -16
|
||||
; CHECK-NEXT: bne $a0, $zero, .LBB0_5
|
||||
; CHECK-NEXT: .LBB0_4:
|
||||
; CHECK-NEXT: ori $a0, $zero, 2
|
||||
; CHECK-NEXT: st.w $a0, $fp, -20
|
||||
|
|
@ -111,7 +104,12 @@ attributes #0 = { noredzone nounwind ssp uwtable "frame-pointer"="all" }
|
|||
; CHECK-NEXT: st.w $a0, $fp, -24
|
||||
; CHECK-NEXT: ori $a0, $zero, 4
|
||||
; CHECK-NEXT: st.w $a0, $fp, -28
|
||||
; CHECK-NEXT: b .LBB0_6
|
||||
; CHECK-NEXT: .LBB0_6:
|
||||
; CHECK-NEXT: move $a0, $zero
|
||||
; CHECK-NEXT: ld.w $fp, $sp, 24 # 4-byte Folded Reload
|
||||
; CHECK-NEXT: ld.w $ra, $sp, 28 # 4-byte Folded Reload
|
||||
; CHECK-NEXT: addi.w $sp, $sp, 32
|
||||
; CHECK-NEXT: jirl $zero, $ra, 0
|
||||
;
|
||||
; CHECK-LABEL: main:
|
||||
; CHECK: # %bb.0:
|
||||
|
|
|
|||
|
|
@ -15,24 +15,16 @@ define dso_local i32 @check_boundaries() #0 {
|
|||
; CHECK-NEXT: .cfi_def_cfa 22, 0
|
||||
; CHECK-NEXT: st.w $zero, $fp, -16
|
||||
; CHECK-NEXT: st.w $zero, $fp, -12
|
||||
; CHECK-NEXT: bnez $zero, .LBB0_2
|
||||
; CHECK-NEXT: b .LBB0_1
|
||||
; CHECK-NEXT: .LBB0_2:
|
||||
; CHECK-NEXT: beqz $zero, .LBB0_1
|
||||
; CHECK-NEXT: # %bb.2:
|
||||
; CHECK-NEXT: ori $a0, $zero, 1
|
||||
; CHECK-NEXT: st.w $a0, $fp, -24
|
||||
; CHECK-NEXT: .LBB0_3:
|
||||
; CHECK-NEXT: ld.w $a0, $fp, -16
|
||||
; CHECK-NEXT: bne $a0, $zero, .LBB0_5
|
||||
; CHECK-NEXT: b .LBB0_4
|
||||
; CHECK-NEXT: beq $a0, $zero, .LBB0_4
|
||||
; CHECK-NEXT: .LBB0_5:
|
||||
; CHECK-NEXT: ori $a0, $zero, 1
|
||||
; CHECK-NEXT: st.w $a0, $fp, -24
|
||||
; CHECK-NEXT: .LBB0_6:
|
||||
; CHECK-NEXT: move $a0, $zero
|
||||
; CHECK-NEXT: ld.w $fp, $sp, 24 # 4-byte Folded Reload
|
||||
; CHECK-NEXT: ld.w $ra, $sp, 28 # 4-byte Folded Reload
|
||||
; CHECK-NEXT: addi.w $sp, $sp, 32
|
||||
; CHECK-NEXT: jirl $zero, $ra, 0
|
||||
; CHECK-NEXT: b .LBB0_6
|
||||
; CHECK-NEXT: .LBB0_1:
|
||||
; CHECK-NEXT: ori $a0, $zero, 2
|
||||
; CHECK-NEXT: st.w $a0, $fp, -20
|
||||
|
|
@ -42,7 +34,8 @@ define dso_local i32 @check_boundaries() #0 {
|
|||
; CHECK-NEXT: st.w $a0, $fp, -24
|
||||
; CHECK-NEXT: ori $a0, $zero, 4
|
||||
; CHECK-NEXT: st.w $a0, $fp, -28
|
||||
; CHECK-NEXT: b .LBB0_3
|
||||
; CHECK-NEXT: ld.w $a0, $fp, -16
|
||||
; CHECK-NEXT: bne $a0, $zero, .LBB0_5
|
||||
; CHECK-NEXT: .LBB0_4:
|
||||
; CHECK-NEXT: ori $a0, $zero, 2
|
||||
; CHECK-NEXT: st.w $a0, $fp, -20
|
||||
|
|
@ -52,7 +45,12 @@ define dso_local i32 @check_boundaries() #0 {
|
|||
; CHECK-NEXT: st.w $a0, $fp, -24
|
||||
; CHECK-NEXT: ori $a0, $zero, 4
|
||||
; CHECK-NEXT: st.w $a0, $fp, -28
|
||||
; CHECK-NEXT: b .LBB0_6
|
||||
; CHECK-NEXT: .LBB0_6:
|
||||
; CHECK-NEXT: move $a0, $zero
|
||||
; CHECK-NEXT: ld.w $fp, $sp, 24 # 4-byte Folded Reload
|
||||
; CHECK-NEXT: ld.w $ra, $sp, 28 # 4-byte Folded Reload
|
||||
; CHECK-NEXT: addi.w $sp, $sp, 32
|
||||
; CHECK-NEXT: jirl $zero, $ra, 0
|
||||
%1 = alloca i32, align 4
|
||||
%2 = alloca i32, align 4
|
||||
%3 = alloca i32, align 4
|
||||
|
|
|
|||
Loading…
Reference in New Issue