forked from OSchip/llvm-project
[X86] SimplifyDemandedVectorEltsForTargetNode - Move SUBV_BROADCAST narrowing handling. NFCI.
Move the narrowing of SUBV_BROADCAST to where we handle all the other opcodes. llvm-svn: 366660
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@ -34062,25 +34062,6 @@ bool X86TargetLowering::SimplifyDemandedVectorEltsForTargetNode(
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return true;
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break;
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}
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case X86ISD::SUBV_BROADCAST: {
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// Reduce size of broadcast if we don't need the upper half.
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unsigned HalfElts = NumElts / 2;
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if (DemandedElts.extractBits(HalfElts, HalfElts).isNullValue()) {
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SDValue Src = Op.getOperand(0);
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MVT SrcVT = Src.getSimpleValueType();
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SDValue Half = Src;
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if (SrcVT.getVectorNumElements() != HalfElts) {
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MVT HalfVT = MVT::getVectorVT(SrcVT.getScalarType(), HalfElts);
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Half = TLO.DAG.getNode(X86ISD::SUBV_BROADCAST, SDLoc(Op), HalfVT, Src);
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}
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return TLO.CombineTo(Op, insertSubVector(TLO.DAG.getUNDEF(VT), Half, 0,
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TLO.DAG, SDLoc(Op),
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Half.getValueSizeInBits()));
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}
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break;
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}
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case X86ISD::VPERMV: {
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SDValue Mask = Op.getOperand(0);
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APInt MaskUndef, MaskZero;
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@ -34134,6 +34115,19 @@ bool X86TargetLowering::SimplifyDemandedVectorEltsForTargetNode(
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SDValue Insert =
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insertSubVector(UndefVec, ExtOp, 0, TLO.DAG, DL, ExtSizeInBits);
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return TLO.CombineTo(Op, Insert);
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}
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// Subvector broadcast.
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case X86ISD::SUBV_BROADCAST: {
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SDLoc DL(Op);
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SDValue Ext = Op.getOperand(0);
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if (Ext.getValueSizeInBits() != ExtSizeInBits) {
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MVT ExtSVT = Ext.getSimpleValueType().getScalarType();
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MVT ExtVT =
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MVT::getVectorVT(ExtSVT, ExtSizeInBits / ExtSVT.getSizeInBits());
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Ext = TLO.DAG.getNode(X86ISD::SUBV_BROADCAST, DL, ExtVT, Ext);
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}
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return TLO.CombineTo(Op, insertSubVector(TLO.DAG.getUNDEF(VT), Ext, 0,
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TLO.DAG, DL, ExtSizeInBits));
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}
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// Byte shifts by immediate.
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case X86ISD::VSHLDQ:
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