forked from OSchip/llvm-project
[VE][NFC] Clean VEISelLowering.cpp
Clean the order of setOperationActions and others. Differential Revision: https://reviews.llvm.org/D89203
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@ -635,23 +635,27 @@ VETargetLowering::VETargetLowering(const TargetMachine &TM,
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addRegisterClass(MVT::f128, &VE::F128RegClass);
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/// Load & Store {
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for (MVT FPVT : MVT::fp_valuetypes()) {
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for (MVT OtherFPVT : MVT::fp_valuetypes()) {
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// Turn FP extload into load/fpextend
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setLoadExtAction(ISD::EXTLOAD, FPVT, OtherFPVT, Expand);
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// Turn FP truncstore into trunc + store.
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setTruncStoreAction(FPVT, OtherFPVT, Expand);
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}
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}
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// VE doesn't have i1 sign extending load
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// VE doesn't have i1 sign extending load.
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for (MVT VT : MVT::integer_valuetypes()) {
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setLoadExtAction(ISD::SEXTLOAD, VT, MVT::i1, Promote);
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setLoadExtAction(ISD::ZEXTLOAD, VT, MVT::i1, Promote);
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setLoadExtAction(ISD::EXTLOAD, VT, MVT::i1, Promote);
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setTruncStoreAction(VT, MVT::i1, Expand);
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}
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// VE doesn't have floating point extload/truncstore, so expand them.
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for (MVT FPVT : MVT::fp_valuetypes()) {
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for (MVT OtherFPVT : MVT::fp_valuetypes()) {
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setLoadExtAction(ISD::EXTLOAD, FPVT, OtherFPVT, Expand);
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setTruncStoreAction(FPVT, OtherFPVT, Expand);
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}
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}
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// VE doesn't have fp128 load/store, so expand them in custom lower.
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setOperationAction(ISD::LOAD, MVT::f128, Custom);
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setOperationAction(ISD::STORE, MVT::f128, Custom);
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/// } Load & Store
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// Custom legalize address nodes into LO/HI parts.
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@ -735,10 +739,6 @@ VETargetLowering::VETargetLowering(const TargetMachine &TM,
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// VE doesn't have fdiv of f128.
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setOperationAction(ISD::FDIV, MVT::f128, Expand);
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// VE doesn't have load/store of f128, so use custom-lowering.
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setOperationAction(ISD::LOAD, MVT::f128, Custom);
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setOperationAction(ISD::STORE, MVT::f128, Custom);
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for (MVT FPVT : {MVT::f32, MVT::f64}) {
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// f32 and f64 uses ConstantFP. f128 uses ConstantPool.
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setOperationAction(ISD::ConstantFP, FPVT, Legal);
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