forked from OSchip/llvm-project
give X86Operand a ctor and start passing SMLoc's into it.
llvm-svn: 93532
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b324e66f4c
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@ -74,7 +74,7 @@ namespace {
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/// X86Operand - Instances of this class represent a parsed X86 machine
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/// instruction.
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struct X86Operand : public MCParsedAsmOperand {
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enum {
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enum KindTy {
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Token,
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Register,
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Immediate,
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@ -106,6 +106,14 @@ struct X86Operand : public MCParsedAsmOperand {
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} Mem;
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};
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X86Operand(KindTy K, SMLoc Start = SMLoc(), SMLoc End = SMLoc())
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: Kind(K), StartLoc(Start), EndLoc(End) {}
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/// getStartLoc - Get the location of the first token of this operand.
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SMLoc getStartLoc() const { return StartLoc; }
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/// getEndLoc - Get the location of the last token of this operand.
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SMLoc getEndLoc() const { return EndLoc; }
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StringRef getToken() const {
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assert(Kind == Token && "Invalid access!");
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return StringRef(Tok.Data, Tok.Length);
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@ -194,25 +202,20 @@ struct X86Operand : public MCParsedAsmOperand {
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}
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static X86Operand *CreateToken(StringRef Str) {
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X86Operand *Res = new X86Operand();
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Res->Kind = Token;
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X86Operand *Res = new X86Operand(Token);
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Res->Tok.Data = Str.data();
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Res->Tok.Length = Str.size();
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return Res;
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}
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static X86Operand *CreateReg(unsigned RegNo, SMLoc StartLoc, SMLoc EndLoc) {
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X86Operand *Res = new X86Operand();
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Res->Kind = Register;
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X86Operand *Res = new X86Operand(Register, StartLoc, EndLoc);
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Res->Reg.RegNo = RegNo;
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Res->StartLoc = StartLoc;
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Res->EndLoc = EndLoc;
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return Res;
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}
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static X86Operand *CreateImm(const MCExpr *Val) {
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X86Operand *Res = new X86Operand();
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Res->Kind = Immediate;
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X86Operand *Res = new X86Operand(Immediate);
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Res->Imm.Val = Val;
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return Res;
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}
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@ -226,8 +229,7 @@ struct X86Operand : public MCParsedAsmOperand {
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// The scale should always be one of {1,2,4,8}.
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assert(((Scale == 1 || Scale == 2 || Scale == 4 || Scale == 8)) &&
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"Invalid scale!");
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X86Operand *Res = new X86Operand();
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Res->Kind = Memory;
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X86Operand *Res = new X86Operand(Memory);
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Res->Mem.SegReg = SegReg;
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Res->Mem.Disp = Disp;
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Res->Mem.BaseReg = BaseReg;
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