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[mips] Transfer kill flag to the newly created operand. 

llvm-svn: 192662
This commit is contained in:
Akira Hatanaka 2013-10-15 01:06:30 +00:00
parent 8368b3b3df
commit 86c3c794fa
3 changed files with 29 additions and 7 deletions
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6
llvm/lib/Target/Mips/MipsISelLowering.cpp
View File

@ -768,13 +768,17 @@ static MachineBasicBlock *expandPseudoDIV(MachineInstr *MI,
// Insert instruction "teq $divisor_reg, $zero, 7".
MachineBasicBlock::iterator I(MI);
MachineInstrBuilder MIB;
MachineOperand &Divisor = MI->getOperand(2);
MIB = BuildMI(MBB, llvm::next(I), MI->getDebugLoc(), TII.get(Mips::TEQ))
.addOperand(MI->getOperand(2)).addReg(Mips::ZERO).addImm(7);
.addReg(Divisor.getReg(), getKillRegState(Divisor.isKill()))
.addReg(Mips::ZERO).addImm(7);
// Use the 32-bit sub-register if this is a 64-bit division.
if (Is64Bit)
MIB->getOperand(0).setSubReg(Mips::sub_32);
// Clear Divisor's kill flag.
Divisor.setIsKill(false);
return &MBB;
}

14
llvm/test/CodeGen/Mips/divrem.ll
View File

@ -1,4 +1,5 @@
; RUN: llc -march=mips < %s | FileCheck %s -check-prefix=TRAP
; RUN: llc -march=mips -verify-machineinstrs < %s |\
; RUN: FileCheck %s -check-prefix=TRAP
; RUN: llc -march=mips -mno-check-zero-division < %s |\
; RUN: FileCheck %s -check-prefix=NOCHECK
@ -11,6 +12,9 @@
; NOCHECK-NOT: teq
; NOCHECK: .end sdiv1
@g0 = common global i32 0, align 4
@g1 = common global i32 0, align 4
define i32 @sdiv1(i32 %a0, i32 %a1) nounwind readnone {
entry:
%div = sdiv i32 %a0, %a1
@ -67,3 +71,11 @@ entry:
%div = udiv i32 %a0, %a1
ret i32 %div
}
define i32 @killFlags() {
entry:
%0 = load i32* @g0, align 4
%1 = load i32* @g1, align 4
%div = sdiv i32 %0, %1
ret i32 %div
}

16
llvm/test/CodeGen/Mips/mips64instrs.ll
View File

@ -1,4 +1,7 @@
; RUN: llc -march=mips64el -mcpu=mips64 < %s | FileCheck %s
; RUN: llc -march=mips64el -mcpu=mips64 -verify-machineinstrs < %s | FileCheck %s
@gll0 = common global i64 0, align 8
@gll1 = common global i64 0, align 8
define i64 @f0(i64 %a0, i64 %a1) nounwind readnone {
entry:
@ -90,17 +93,21 @@ entry:
; CHECK: ddiv $zero, ${{[0-9]+}}, $[[R0:[0-9]+]]
; CHECK: teq $[[R0]], $zero, 7
; CHECK: mflo
%div = sdiv i64 %a, %b
%0 = load i64* @gll0, align 8
%1 = load i64* @gll1, align 8
%div = sdiv i64 %0, %1
ret i64 %div
}
define i64 @f15(i64 %a, i64 %b) nounwind readnone {
define i64 @f15() nounwind readnone {
entry:
; CHECK-LABEL: f15:
; CHECK: ddivu $zero, ${{[0-9]+}}, $[[R0:[0-9]+]]
; CHECK: teq $[[R0]], $zero, 7
; CHECK: mflo
%div = udiv i64 %a, %b
%0 = load i64* @gll0, align 8
%1 = load i64* @gll1, align 8
%div = udiv i64 %0, %1
ret i64 %div
}
@ -148,4 +155,3 @@ entry:
%neg = xor i64 %or, -1
ret i64 %neg
}