[X86] Add the AVX512 SET0 pseudos to foldMemoryOperandImpl since they are marked for CanFoldAsLoad.

I don't really know how to test this.

llvm-svn: 275044
This commit is contained in:
Craig Topper 2016-07-11 05:36:41 +00:00
parent 9a17d7ac6e
commit 8674849d6e
2 changed files with 14 additions and 3 deletions

View File

@ -413,13 +413,13 @@ def : Pat<(v64i8 (bitconvert (v16f32 VR512:$src))), (v64i8 VR512:$src)>;
// We set canFoldAsLoad because this can be converted to a constant-pool // We set canFoldAsLoad because this can be converted to a constant-pool
// load of an all-zeros value if folding it would be beneficial. // load of an all-zeros value if folding it would be beneficial.
let isReMaterializable = 1, isAsCheapAsAMove = 1, canFoldAsLoad = 1, let isReMaterializable = 1, isAsCheapAsAMove = 1, canFoldAsLoad = 1,
isPseudo = 1, Predicates = [HasAVX512] in { isPseudo = 1, Predicates = [HasAVX512], SchedRW = [WriteZero] in {
def AVX512_512_SET0 : I<0, Pseudo, (outs VR512:$dst), (ins), "", def AVX512_512_SET0 : I<0, Pseudo, (outs VR512:$dst), (ins), "",
[(set VR512:$dst, (v16i32 immAllZerosV))]>; [(set VR512:$dst, (v16i32 immAllZerosV))]>;
} }
let isReMaterializable = 1, isAsCheapAsAMove = 1, canFoldAsLoad = 1, let isReMaterializable = 1, isAsCheapAsAMove = 1, canFoldAsLoad = 1,
isPseudo = 1, Predicates = [HasVLX] in { isPseudo = 1, Predicates = [HasVLX], SchedRW = [WriteZero] in {
def AVX512_128_SET0 : I<0, Pseudo, (outs VR128X:$dst), (ins), "", def AVX512_128_SET0 : I<0, Pseudo, (outs VR128X:$dst), (ins), "",
[(set VR128X:$dst, (v4i32 immAllZerosV))]>; [(set VR128X:$dst, (v4i32 immAllZerosV))]>;
def AVX512_256_SET0 : I<0, Pseudo, (outs VR256X:$dst), (ins), "", def AVX512_256_SET0 : I<0, Pseudo, (outs VR256X:$dst), (ins), "",

View File

@ -6230,12 +6230,17 @@ MachineInstr *X86InstrInfo::foldMemoryOperandImpl(
Alignment = (*LoadMI.memoperands_begin())->getAlignment(); Alignment = (*LoadMI.memoperands_begin())->getAlignment();
else else
switch (LoadMI.getOpcode()) { switch (LoadMI.getOpcode()) {
case X86::AVX512_512_SET0:
Alignment = 64;
break;
case X86::AVX2_SETALLONES: case X86::AVX2_SETALLONES:
case X86::AVX_SET0: case X86::AVX_SET0:
case X86::AVX512_256_SET0:
Alignment = 32; Alignment = 32;
break; break;
case X86::V_SET0: case X86::V_SET0:
case X86::V_SETALLONES: case X86::V_SETALLONES:
case X86::AVX512_128_SET0:
Alignment = 16; Alignment = 16;
break; break;
case X86::FsFLD0SD: case X86::FsFLD0SD:
@ -6273,6 +6278,9 @@ MachineInstr *X86InstrInfo::foldMemoryOperandImpl(
case X86::V_SETALLONES: case X86::V_SETALLONES:
case X86::AVX2_SETALLONES: case X86::AVX2_SETALLONES:
case X86::AVX_SET0: case X86::AVX_SET0:
case X86::AVX512_128_SET0:
case X86::AVX512_256_SET0:
case X86::AVX512_512_SET0:
case X86::FsFLD0SD: case X86::FsFLD0SD:
case X86::FsFLD0SS: { case X86::FsFLD0SS: {
// Folding a V_SET0 or V_SETALLONES as a load, to ease register pressure. // Folding a V_SET0 or V_SETALLONES as a load, to ease register pressure.
@ -6304,7 +6312,10 @@ MachineInstr *X86InstrInfo::foldMemoryOperandImpl(
Ty = Type::getFloatTy(MF.getFunction()->getContext()); Ty = Type::getFloatTy(MF.getFunction()->getContext());
else if (Opc == X86::FsFLD0SD) else if (Opc == X86::FsFLD0SD)
Ty = Type::getDoubleTy(MF.getFunction()->getContext()); Ty = Type::getDoubleTy(MF.getFunction()->getContext());
else if (Opc == X86::AVX2_SETALLONES || Opc == X86::AVX_SET0) else if (Opc == X86::AVX512_512_SET0)
Ty = VectorType::get(Type::getInt32Ty(MF.getFunction()->getContext()),16);
else if (Opc == X86::AVX2_SETALLONES || Opc == X86::AVX_SET0 ||
Opc == X86::AVX512_256_SET0)
Ty = VectorType::get(Type::getInt32Ty(MF.getFunction()->getContext()), 8); Ty = VectorType::get(Type::getInt32Ty(MF.getFunction()->getContext()), 8);
else else
Ty = VectorType::get(Type::getInt32Ty(MF.getFunction()->getContext()), 4); Ty = VectorType::get(Type::getInt32Ty(MF.getFunction()->getContext()), 4);