From 86673ba836ff6416d3637a32652b8897f3467bf2 Mon Sep 17 00:00:00 2001
From: Matt Arsenault <Matthew.Arsenault@amd.com>
Date: Tue, 25 Mar 2014 16:50:55 +0000
Subject: [PATCH] R600: Add failing testcase for <3 x i32> stores.

This is supposed to have the same store size and alignment as <4 x i32>,
but currently is split into a 64-bit and 32-bit store.

llvm-svn: 204729
---
 llvm/test/CodeGen/R600/store-v3i32.ll                | 12 ++++++++++++
 .../CodeGen/R600/{store-v3.ll => store-v3i64.ll}     |  0
 2 files changed, 12 insertions(+)
 create mode 100644 llvm/test/CodeGen/R600/store-v3i32.ll
 rename llvm/test/CodeGen/R600/{store-v3.ll => store-v3i64.ll} (100%)

diff --git a/llvm/test/CodeGen/R600/store-v3i32.ll b/llvm/test/CodeGen/R600/store-v3i32.ll
new file mode 100644
index 000000000000..33578035daa2
--- /dev/null
+++ b/llvm/test/CodeGen/R600/store-v3i32.ll
@@ -0,0 +1,12 @@
+; XFAIL: *
+; RUN: llc -verify-machineinstrs -march=r600 -mcpu=SI < %s | FileCheck -check-prefix=SI %s
+
+; 3 vectors have the same size and alignment as 4 vectors, so this
+; should be done in a single store.
+
+; SI-LABEL: @store_v3i32:
+; SI: BUFFER_STORE_DWORDX4
+define void @store_v3i32(<3 x i32> addrspace(1)* %out, <3 x i32> %a) nounwind {
+  store <3 x i32> %a, <3 x i32> addrspace(1)* %out, align 16
+  ret void
+}
diff --git a/llvm/test/CodeGen/R600/store-v3.ll b/llvm/test/CodeGen/R600/store-v3i64.ll
similarity index 100%
rename from llvm/test/CodeGen/R600/store-v3.ll
rename to llvm/test/CodeGen/R600/store-v3i64.ll