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Kill off old (TargetMachine level, not Target level) match quality functions. 

llvm-svn: 75780
This commit is contained in:
Daniel Dunbar 2009-07-15 12:26:05 +00:00
parent 9dbdf228d0
commit 863e587d27
23 changed files with 0 additions and 360 deletions
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13
llvm/include/llvm/Target/TargetMachine.h
View File

@ -120,19 +120,6 @@ protected: // Can only create subclasses.
public:
virtual ~TargetMachine();
/// getModuleMatchQuality - This static method should be implemented by
/// targets to indicate how closely they match the specified module. This is
/// used by the LLC tool to determine which target to use when an explicit
/// -march option is not specified. If a target returns zero, it will never
/// be chosen without an explicit -march option.
static unsigned getModuleMatchQuality(const Module &) { return 0; }
/// getJITMatchQuality - This static method should be implemented by targets
/// that provide JIT capabilities to indicate how suitable they are for
/// execution on the current host. If a value of 0 is returned, the target
/// will not be used unless an explicit -march option is used.
static unsigned getJITMatchQuality() { return 0; }
const Target &getTarget() const { return TheTarget; }
// Interfaces to the major aspects of target machine information:

55
llvm/lib/Target/ARM/ARMTargetMachine.cpp
View File

@ -48,35 +48,6 @@ extern "C" void LLVMInitializeARMTarget() { }
// No assembler printer by default
ARMBaseTargetMachine::AsmPrinterCtorFn ARMBaseTargetMachine::AsmPrinterCtor = 0;
/// ThumbTargetMachine - Create an Thumb architecture model.
///
unsigned ThumbTargetMachine::getJITMatchQuality() {
#if defined(__thumb__)
return 10;
#endif
return 0;
}
unsigned ThumbTargetMachine::getModuleMatchQuality(const Module &M) {
std::string TT = M.getTargetTriple();
// Match thumb-foo-bar, as well as things like thumbv5blah-*
if (TT.size() >= 6 &&
(TT.substr(0, 6) == "thumb-" || TT.substr(0, 6) == "thumbv"))
return 20;
// If the target triple is something non-thumb, we don't match.
if (!TT.empty()) return 0;
if (M.getEndianness() == Module::LittleEndian &&
M.getPointerSize() == Module::Pointer32)
return 10; // Weak match
else if (M.getEndianness() != Module::AnyEndianness ||
M.getPointerSize() != Module::AnyPointerSize)
return 0; // Match for some other target
return getJITMatchQuality()/2;
}
/// TargetMachine ctor - Create an ARM architecture model.
///
ARMBaseTargetMachine::ARMBaseTargetMachine(const Target &T,
@ -116,32 +87,6 @@ ThumbTargetMachine::ThumbTargetMachine(const Target &T, const Module &M,
InstrInfo = new Thumb1InstrInfo(Subtarget);
}
unsigned ARMTargetMachine::getJITMatchQuality() {
#if defined(__arm__)
return 10;
#endif
return 0;
}
unsigned ARMTargetMachine::getModuleMatchQuality(const Module &M) {
std::string TT = M.getTargetTriple();
// Match arm-foo-bar, as well as things like armv5blah-*
if (TT.size() >= 4 &&
(TT.substr(0, 4) == "arm-" || TT.substr(0, 4) == "armv"))
return 20;
// If the target triple is something non-arm, we don't match.
if (!TT.empty()) return 0;
if (M.getEndianness() == Module::LittleEndian &&
M.getPointerSize() == Module::Pointer32)
return 10; // Weak match
else if (M.getEndianness() != Module::AnyEndianness ||
M.getPointerSize() != Module::AnyPointerSize)
return 0; // Match for some other target
return getJITMatchQuality()/2;
}
const TargetAsmInfo *ARMBaseTargetMachine::createTargetAsmInfo() const {
switch (Subtarget.TargetType) {

3
llvm/lib/Target/ARM/ARMTargetMachine.h
View File

@ -61,9 +61,6 @@ public:
AsmPrinterCtor = F;
}
static unsigned getModuleMatchQuality(const Module &M);
static unsigned getJITMatchQuality();
virtual const TargetAsmInfo *createTargetAsmInfo() const;
// Pass Pipeline Configuration

27
llvm/lib/Target/Alpha/AlphaTargetMachine.cpp
View File

@ -36,33 +36,6 @@ const TargetAsmInfo *AlphaTargetMachine::createTargetAsmInfo() const {
return new AlphaTargetAsmInfo(*this);
}
unsigned AlphaTargetMachine::getModuleMatchQuality(const Module &M) {
// We strongly match "alpha*".
std::string TT = M.getTargetTriple();
if (TT.size() >= 5 && TT[0] == 'a' && TT[1] == 'l' && TT[2] == 'p' &&
TT[3] == 'h' && TT[4] == 'a')
return 20;
// If the target triple is something non-alpha, we don't match.
if (!TT.empty()) return 0;
if (M.getEndianness() == Module::LittleEndian &&
M.getPointerSize() == Module::Pointer64)
return 10; // Weak match
else if (M.getEndianness() != Module::AnyEndianness ||
M.getPointerSize() != Module::AnyPointerSize)
return 0; // Match for some other target
return getJITMatchQuality()/2;
}
unsigned AlphaTargetMachine::getJITMatchQuality() {
#ifdef __alpha
return 10;
#else
return 0;
#endif
}
AlphaTargetMachine::AlphaTargetMachine(const Target &T, const Module &M,
const std::string &FS)
: LLVMTargetMachine(T),

3
llvm/lib/Target/Alpha/AlphaTargetMachine.h
View File

@ -61,9 +61,6 @@ public:
return &JITInfo;
}
static unsigned getJITMatchQuality();
static unsigned getModuleMatchQuality(const Module &M);
// Pass Pipeline Configuration
virtual bool addInstSelector(PassManagerBase &PM, CodeGenOpt::Level OptLevel);
virtual bool addPreEmitPass(PassManagerBase &PM, CodeGenOpt::Level OptLevel);

4
llvm/lib/Target/CBackend/CTargetMachine.h
View File

@ -30,10 +30,6 @@ struct CTargetMachine : public TargetMachine {
formatted_raw_ostream &Out,
CodeGenFileType FileType,
CodeGenOpt::Level OptLevel);
// This class always works, but must be requested explicitly on
// llc command line.
static unsigned getModuleMatchQuality(const Module &M) { return 0; }
virtual const TargetData *getTargetData() const { return &DataLayout; }
};

14
llvm/lib/Target/CellSPU/SPUTargetMachine.cpp
View File

@ -48,20 +48,6 @@ SPUTargetMachine::createTargetAsmInfo() const
return new SPULinuxTargetAsmInfo(*this);
}
unsigned
SPUTargetMachine::getModuleMatchQuality(const Module &M)
{
// We strongly match "spu-*" or "cellspu-*".
std::string TT = M.getTargetTriple();
if ((TT.size() == 3 && std::string(TT.begin(), TT.begin()+3) == "spu")
|| (TT.size() == 7 && std::string(TT.begin(), TT.begin()+7) == "cellspu")
|| (TT.size() >= 4 && std::string(TT.begin(), TT.begin()+4) == "spu-")
|| (TT.size() >= 8 && std::string(TT.begin(), TT.begin()+8) == "cellspu-"))
return 20;
return 0; // No match at all...
}
SPUTargetMachine::SPUTargetMachine(const Target &T, const Module &M,
const std::string &FS)
: LLVMTargetMachine(T),

6
llvm/lib/Target/CellSPU/SPUTargetMachine.h
View File

@ -66,12 +66,6 @@ public:
virtual TargetJITInfo *getJITInfo() {
return NULL;
}
//! Module match function
/*!
Module matching function called by TargetMachineRegistry().
*/
static unsigned getModuleMatchQuality(const Module &M);
virtual SPUTargetLowering *getTargetLowering() const {
return const_cast<SPUTargetLowering*>(&TLInfo);

3
llvm/lib/Target/CppBackend/CPPTargetMachine.h
View File

@ -33,9 +33,6 @@ struct CPPTargetMachine : public TargetMachine {
CodeGenFileType FileType,
CodeGenOpt::Level OptLevel);
// This class always works, but shouldn't be the default in most cases.
static unsigned getModuleMatchQuality(const Module &M) { return 1; }
virtual const TargetData *getTargetData() const { return &DataLayout; }
};

26
llvm/lib/Target/IA64/IA64TargetMachine.cpp
View File

@ -34,32 +34,6 @@ const TargetAsmInfo *IA64TargetMachine::createTargetAsmInfo() const {
return new IA64TargetAsmInfo(*this);
}
unsigned IA64TargetMachine::getModuleMatchQuality(const Module &M) {
// we match [iI][aA]*64
bool seenIA64=false;
std::string TT = M.getTargetTriple();
if (TT.size() >= 4) {
if( (TT[0]=='i' || TT[0]=='I') &&
(TT[1]=='a' || TT[1]=='A') ) {
for(unsigned int i=2; i<(TT.size()-1); i++)
if(TT[i]=='6' && TT[i+1]=='4')
seenIA64=true;
}
if (seenIA64)
return 20; // strong match
}
// If the target triple is something non-ia64, we don't match.
if (!TT.empty()) return 0;
#if defined(__ia64__) || defined(__IA64__)
return 5;
#else
return 0;
#endif
}
/// IA64TargetMachine ctor - Create an LP64 architecture model
///
IA64TargetMachine::IA64TargetMachine(const Target &T, const Module &M,

2
llvm/lib/Target/IA64/IA64TargetMachine.h
View File

@ -55,8 +55,6 @@ public:
}
virtual const TargetData *getTargetData() const { return &DataLayout; }
static unsigned getModuleMatchQuality(const Module &M);
// Pass Pipeline Configuration
virtual bool addInstSelector(PassManagerBase &PM, CodeGenOpt::Level OptLevel);
virtual bool addPreEmitPass(PassManagerBase &PM, CodeGenOpt::Level OptLevel);

11
llvm/lib/Target/MSP430/MSP430TargetMachine.cpp
View File

@ -69,14 +69,3 @@ bool MSP430TargetMachine::addAssemblyEmitter(PassManagerBase &PM,
return false;
}
unsigned MSP430TargetMachine::getModuleMatchQuality(const Module &M) {
std::string TT = M.getTargetTriple();
// We strongly match msp430
if (TT.size() >= 6 && TT[0] == 'm' && TT[1] == 's' && TT[2] == 'p' &&
TT[3] == '4' && TT[4] == '3' && TT[5] == '0')
return 20;
return 0;
}

1
llvm/lib/Target/MSP430/MSP430TargetMachine.h
View File

@ -60,7 +60,6 @@ public:
virtual bool addAssemblyEmitter(PassManagerBase &PM,
CodeGenOpt::Level OptLevel, bool Verbose,
formatted_raw_ostream &Out);
static unsigned getModuleMatchQuality(const Module &M);
}; // MSP430TargetMachine.
} // end namespace llvm

35
llvm/lib/Target/Mips/MipsTargetMachine.cpp
View File

@ -79,41 +79,6 @@ MipselTargetMachine::
MipselTargetMachine(const Target &T, const Module &M, const std::string &FS) :
MipsTargetMachine(T, M, FS, true) {}
// return 0 and must specify -march to gen MIPS code.
unsigned MipsTargetMachine::
getModuleMatchQuality(const Module &M)
{
// We strongly match "mips*-*".
std::string TT = M.getTargetTriple();
if (TT.size() >= 5 && std::string(TT.begin(), TT.begin()+5) == "mips-")
return 20;
if (TT.size() >= 13 && std::string(TT.begin(),
TT.begin()+13) == "mipsallegrex-")
return 20;
return 0;
}
// return 0 and must specify -march to gen MIPSEL code.
unsigned MipselTargetMachine::
getModuleMatchQuality(const Module &M)
{
// We strongly match "mips*el-*".
std::string TT = M.getTargetTriple();
if (TT.size() >= 7 && std::string(TT.begin(), TT.begin()+7) == "mipsel-")
return 20;
if (TT.size() >= 15 && std::string(TT.begin(),
TT.begin()+15) == "mipsallegrexel-")
return 20;
if (TT.size() == 3 && std::string(TT.begin(), TT.begin()+3) == "psp")
return 20;
return 0;
}
// Install an instruction selector pass using
// the ISelDag to gen Mips code.
bool MipsTargetMachine::

2
llvm/lib/Target/Mips/MipsTargetMachine.h
View File

@ -67,8 +67,6 @@ namespace llvm {
return const_cast<MipsTargetLowering*>(&TLInfo);
}
static unsigned getModuleMatchQuality(const Module &M);
// Pass Pipeline Configuration
virtual bool addInstSelector(PassManagerBase &PM,
CodeGenOpt::Level OptLevel);

51
llvm/lib/Target/PowerPC/PPCTargetMachine.cpp
View File

@ -51,57 +51,6 @@ const TargetAsmInfo *PPCTargetMachine::createTargetAsmInfo() const {
return new PPCLinuxTargetAsmInfo(*this);
}
unsigned PPC32TargetMachine::getJITMatchQuality() {
#if defined(__POWERPC__) || defined (__ppc__) || defined(_POWER) || defined(__PPC__)
if (sizeof(void*) == 4)
return 10;
#endif
return 0;
}
unsigned PPC64TargetMachine::getJITMatchQuality() {
#if defined(__POWERPC__) || defined (__ppc__) || defined(_POWER) || defined(__PPC__)
if (sizeof(void*) == 8)
return 10;
#endif
return 0;
}
unsigned PPC32TargetMachine::getModuleMatchQuality(const Module &M) {
// We strongly match "powerpc-*".
std::string TT = M.getTargetTriple();
if (TT.size() >= 8 && std::string(TT.begin(), TT.begin()+8) == "powerpc-")
return 20;
// If the target triple is something non-powerpc, we don't match.
if (!TT.empty()) return 0;
if (M.getEndianness() == Module::BigEndian &&
M.getPointerSize() == Module::Pointer32)
return 10; // Weak match
else if (M.getEndianness() != Module::AnyEndianness ||
M.getPointerSize() != Module::AnyPointerSize)
return 0; // Match for some other target
return getJITMatchQuality()/2;
}
unsigned PPC64TargetMachine::getModuleMatchQuality(const Module &M) {
// We strongly match "powerpc64-*".
std::string TT = M.getTargetTriple();
if (TT.size() >= 10 && std::string(TT.begin(), TT.begin()+10) == "powerpc64-")
return 20;
if (M.getEndianness() == Module::BigEndian &&
M.getPointerSize() == Module::Pointer64)
return 10; // Weak match
else if (M.getEndianness() != Module::AnyEndianness ||
M.getPointerSize() != Module::AnyPointerSize)
return 0; // Match for some other target
return getJITMatchQuality()/2;
}
PPCTargetMachine::PPCTargetMachine(const Target&T, const Module &M,
const std::string &FS, bool is64Bit)
: LLVMTargetMachine(T),

6
llvm/lib/Target/PowerPC/PPCTargetMachine.h
View File

@ -105,9 +105,6 @@ public:
class PPC32TargetMachine : public PPCTargetMachine {
public:
PPC32TargetMachine(const Target &T, const Module &M, const std::string &FS);
static unsigned getJITMatchQuality();
static unsigned getModuleMatchQuality(const Module &M);
};
/// PPC64TargetMachine - PowerPC 64-bit target machine.
@ -115,9 +112,6 @@ public:
class PPC64TargetMachine : public PPCTargetMachine {
public:
PPC64TargetMachine(const Target &T, const Module &M, const std::string &FS);
static unsigned getJITMatchQuality();
static unsigned getModuleMatchQuality(const Module &M);
};
} // end namespace llvm

26
llvm/lib/Target/Sparc/SparcTargetMachine.cpp
View File

@ -44,32 +44,6 @@ SparcTargetMachine::SparcTargetMachine(const Target &T, const Module &M,
FrameInfo(TargetFrameInfo::StackGrowsDown, 8, 0) {
}
unsigned SparcTargetMachine::getModuleMatchQuality(const Module &M) {
std::string TT = M.getTargetTriple();
if (TT.size() >= 6 && std::string(TT.begin(), TT.begin()+6) == "sparc-")
return 20;
// If the target triple is something non-sparc, we don't match.
if (!TT.empty()) return 0;
if (M.getEndianness() == Module::BigEndian &&
M.getPointerSize() == Module::Pointer32)
#ifdef __sparc__
return 20; // BE/32 ==> Prefer sparc on sparc
#else
return 5; // BE/32 ==> Prefer ppc elsewhere
#endif
else if (M.getEndianness() != Module::AnyEndianness ||
M.getPointerSize() != Module::AnyPointerSize)
return 0; // Match for some other target
#if defined(__sparc__)
return 10;
#else
return 0;
#endif
}
bool SparcTargetMachine::addInstSelector(PassManagerBase &PM,
CodeGenOpt::Level OptLevel) {
PM.add(createSparcISelDag(*this));

1
llvm/lib/Target/Sparc/SparcTargetMachine.h
View File

@ -55,7 +55,6 @@ public:
return const_cast<SparcTargetLowering*>(&TLInfo);
}
virtual const TargetData *getTargetData() const { return &DataLayout; }
static unsigned getModuleMatchQuality(const Module &M);
// Pass Pipeline Configuration
virtual bool addInstSelector(PassManagerBase &PM, CodeGenOpt::Level OptLevel);

58
llvm/lib/Target/X86/X86TargetMachine.cpp
View File

@ -66,64 +66,6 @@ const TargetAsmInfo *X86TargetMachine::createTargetAsmInfo() const {
}
}
unsigned X86_32TargetMachine::getJITMatchQuality() {
#if defined(i386) || defined(__i386__) || defined(__x86__) || defined(_M_IX86)
return 10;
#endif
return 0;
}
unsigned X86_64TargetMachine::getJITMatchQuality() {
#if defined(__x86_64__) || defined(_M_AMD64)
return 10;
#endif
return 0;
}
unsigned X86_32TargetMachine::getModuleMatchQuality(const Module &M) {
// We strongly match "i[3-9]86-*".
std::string TT = M.getTargetTriple();
if (TT.size() >= 5 && TT[0] == 'i' && TT[2] == '8' && TT[3] == '6' &&
TT[4] == '-' && TT[1] - '3' < 6)
return 20;
// If the target triple is something non-X86, we don't match.
if (!TT.empty()) return 0;
if (M.getEndianness() == Module::LittleEndian &&
M.getPointerSize() == Module::Pointer32)
return 10; // Weak match
else if (M.getEndianness() != Module::AnyEndianness ||
M.getPointerSize() != Module::AnyPointerSize)
return 0; // Match for some other target
return getJITMatchQuality()/2;
}
unsigned X86_64TargetMachine::getModuleMatchQuality(const Module &M) {
// We strongly match "x86_64-*".
std::string TT = M.getTargetTriple();
if (TT.size() >= 7 && TT[0] == 'x' && TT[1] == '8' && TT[2] == '6' &&
TT[3] == '_' && TT[4] == '6' && TT[5] == '4' && TT[6] == '-')
return 20;
// We strongly match "amd64-*".
if (TT.size() >= 6 && TT[0] == 'a' && TT[1] == 'm' && TT[2] == 'd' &&
TT[3] == '6' && TT[4] == '4' && TT[5] == '-')
return 20;
// If the target triple is something non-X86-64, we don't match.
if (!TT.empty()) return 0;
if (M.getEndianness() == Module::LittleEndian &&
M.getPointerSize() == Module::Pointer64)
return 10; // Weak match
else if (M.getEndianness() != Module::AnyEndianness ||
M.getPointerSize() != Module::AnyPointerSize)
return 0; // Match for some other target
return getJITMatchQuality()/2;
}
X86_32TargetMachine::X86_32TargetMachine(const Target &T, const Module &M,
const std::string &FS)
: X86TargetMachine(T, M, FS, false) {

3
llvm/lib/Target/X86/X86TargetMachine.h
View File

@ -67,9 +67,6 @@ public:
return Subtarget.isTargetELF() ? &ELFWriterInfo : 0;
}
static unsigned getModuleMatchQuality(const Module &M);
static unsigned getJITMatchQuality();
static void registerAsmPrinter(AsmPrinterCtorFn F) {
AsmPrinterCtor = F;
}

9
llvm/lib/Target/XCore/XCoreTargetMachine.cpp
View File

@ -52,15 +52,6 @@ XCoreTargetMachine::XCoreTargetMachine(const Target &T, const Module &M,
TLInfo(*this) {
}
unsigned XCoreTargetMachine::getModuleMatchQuality(const Module &M) {
std::string TT = M.getTargetTriple();
if (TT.size() >= 6 && std::string(TT.begin(), TT.begin()+6) == "xcore-")
return 20;
// Otherwise we don't match.
return 0;
}
bool XCoreTargetMachine::addInstSelector(PassManagerBase &PM,
CodeGenOpt::Level OptLevel) {
PM.add(createXCoreISelDag(*this));

1
llvm/lib/Target/XCore/XCoreTargetMachine.h
View File

@ -49,7 +49,6 @@ public:
return &InstrInfo.getRegisterInfo();
}
virtual const TargetData *getTargetData() const { return &DataLayout; }
static unsigned getModuleMatchQuality(const Module &M);
// Pass Pipeline Configuration
virtual bool addInstSelector(PassManagerBase &PM, CodeGenOpt::Level OptLevel);