[DAGCombiner] Fix a crash visiting `AND` nodes.

Instead of asserting that the shift count is != 0 we just bail out
as it's not profitable trying to optimize a node which will be
removed anyway.

Differential Revision:  https://reviews.llvm.org/D26098

llvm-svn: 285480
This commit is contained in:
Davide Italiano 2016-10-28 23:55:32 +00:00
parent 6695ba0440
commit 86168b23cf
2 changed files with 26 additions and 1 deletions

View File

@ -3046,6 +3046,11 @@ SDValue DAGCombiner::visitANDLike(SDValue N0, SDValue N1,
unsigned Size = VT.getSizeInBits();
const APInt &AndMask = CAnd->getAPIntValue();
unsigned ShiftBits = CShift->getZExtValue();
// Bail out, this node will probably disappear anyway.
if (ShiftBits == 0)
return SDValue();
unsigned MaskBits = AndMask.countTrailingOnes();
EVT HalfVT = EVT::getIntegerVT(*DAG.getContext(), Size / 2);
@ -3064,7 +3069,7 @@ SDValue DAGCombiner::visitANDLike(SDValue N0, SDValue N1,
// extended to handle extensions mixed in.
SDValue SL(N0);
assert(ShiftBits != 0 && MaskBits <= Size);
assert(MaskBits <= Size);
// Extracting the highest bit of the low half.
EVT ShiftVT = TLI.getShiftAmountTy(HalfVT, DAG.getDataLayout());

View File

@ -0,0 +1,20 @@
.text
.file "/home/davide/work/llvm/test/CodeGen/X86/visitand-shift.ll"
.globl patatino
.p2align 4, 0x90
.type patatino,@function
patatino: # @patatino
.cfi_startproc
# BB#0:
# implicit-def: %RAX
movzwl (%rax), %ecx
movl %ecx, %eax
# implicit-def: %RDX
movq %rax, (%rdx)
retq
.Lfunc_end0:
.size patatino, .Lfunc_end0-patatino
.cfi_endproc
.section ".note.GNU-stack","",@progbits