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[ms-inline asm] Remove the Inline Asm Non-Standard Dialect attribute. This 

implementation does not co-exist well with how the sideeffect and alignstack
attributes are handled.

llvm-svn: 163173
This commit is contained in:
Chad Rosier 2012-09-04 22:23:54 +00:00
parent d7086fb347
commit 85fff2ac11
2 changed files with 16 additions and 20 deletions
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4
clang/lib/CodeGen/CGStmt.cpp
View File

@ -1619,10 +1619,6 @@ void CodeGenFunction::EmitAsmStmt(const AsmStmt &S) {
llvm::CallInst *Result = Builder.CreateCall(IA, Args);
Result->addAttribute(~0, llvm::Attribute::NoUnwind);
// Add the inline asm non-standard dialect attribute on MS-style inline asms.
if (isa<MSAsmStmt>(&S))
Result->addAttribute(~0, llvm::Attribute::IANSDialect);
// Slap the source location of the inline asm into a !srcloc metadata on the
// call. FIXME: Handle metadata for MS-style inline asms.
if (const GCCAsmStmt *gccAsmStmt = dyn_cast<GCCAsmStmt>(&S))

32
clang/test/CodeGen/ms-inline-asm.c
View File

@ -2,16 +2,16 @@
void t1() {
// CHECK: @t1
// CHECK: call void asm sideeffect "", "~{dirflag},~{fpsr},~{flags}"() nounwind ia_nsdialect
// CHECK: call void asm sideeffect "", "~{dirflag},~{fpsr},~{flags}"() nounwind
// CHECK: ret void
__asm {}
}
void t2() {
// CHECK: @t2
// CHECK: call void asm sideeffect "nop", "~{dirflag},~{fpsr},~{flags}"() nounwind ia_nsdialect
// CHECK: call void asm sideeffect "nop", "~{dirflag},~{fpsr},~{flags}"() nounwind ia_nsdialect
// CHECK: call void asm sideeffect "nop", "~{dirflag},~{fpsr},~{flags}"() nounwind ia_nsdialect
// CHECK: call void asm sideeffect "nop", "~{dirflag},~{fpsr},~{flags}"() nounwind
// CHECK: call void asm sideeffect "nop", "~{dirflag},~{fpsr},~{flags}"() nounwind
// CHECK: call void asm sideeffect "nop", "~{dirflag},~{fpsr},~{flags}"() nounwind
// CHECK: ret void
__asm nop
__asm nop
@ -20,15 +20,15 @@ void t2() {
void t3() {
// CHECK: @t3
// CHECK: call void asm sideeffect "nop\0Anop\0Anop", "~{dirflag},~{fpsr},~{flags}"() nounwind ia_nsdialect
// CHECK: call void asm sideeffect "nop\0Anop\0Anop", "~{dirflag},~{fpsr},~{flags}"() nounwind
// CHECK: ret void
__asm nop __asm nop __asm nop
}
void t4(void) {
// CHECK: @t4
// CHECK: call void asm sideeffect "mov ebx, eax", "~{ebx},~{dirflag},~{fpsr},~{flags}"() nounwind ia_nsdialect
// CHECK: call void asm sideeffect "mov ecx, ebx", "~{ecx},~{dirflag},~{fpsr},~{flags}"() nounwind ia_nsdialect
// CHECK: call void asm sideeffect "mov ebx, eax", "~{ebx},~{dirflag},~{fpsr},~{flags}"() nounwind
// CHECK: call void asm sideeffect "mov ecx, ebx", "~{ecx},~{dirflag},~{fpsr},~{flags}"() nounwind
// CHECK: ret void
__asm mov ebx, eax
__asm mov ecx, ebx
@ -36,7 +36,7 @@ void t4(void) {
void t5(void) {
// CHECK: @t5
// CHECK: call void asm sideeffect "mov ebx, eax\0Amov ecx, ebx", "~{ebx},~{ecx},~{dirflag},~{fpsr},~{flags}"() nounwind ia_nsdialect
// CHECK: call void asm sideeffect "mov ebx, eax\0Amov ecx, ebx", "~{ebx},~{ecx},~{dirflag},~{fpsr},~{flags}"() nounwind
// CHECK: ret void
__asm mov ebx, eax __asm mov ecx, ebx
}
@ -44,7 +44,7 @@ void t5(void) {
void t6(void) {
__asm int 0x2c
// CHECK: t6
// CHECK: call void asm sideeffect "int 0x2c", "~{dirflag},~{fpsr},~{flags}"() nounwind ia_nsdialect
// CHECK: call void asm sideeffect "int 0x2c", "~{dirflag},~{fpsr},~{flags}"() nounwind
}
void t7() {
@ -53,8 +53,8 @@ void t7() {
}
__asm {}
// CHECK: t7
// CHECK: call void asm sideeffect "int 0x2c", "~{dirflag},~{fpsr},~{flags}"() nounwind ia_nsdialect
// CHECK: call void asm sideeffect "", "~{dirflag},~{fpsr},~{flags}"() nounwind ia_nsdialect
// CHECK: call void asm sideeffect "int 0x2c", "~{dirflag},~{fpsr},~{flags}"() nounwind
// CHECK: call void asm sideeffect "", "~{dirflag},~{fpsr},~{flags}"() nounwind
}
int t8() {
__asm int 3 ; } comments for single-line asm
@ -62,9 +62,9 @@ int t8() {
__asm int 4
return 10;
// CHECK: t8
// CHECK: call void asm sideeffect "int 3", "~{dirflag},~{fpsr},~{flags}"() nounwind ia_nsdialect
// CHECK: call void asm sideeffect "", "~{dirflag},~{fpsr},~{flags}"() nounwind ia_nsdialect
// CHECK: call void asm sideeffect "int 4", "~{dirflag},~{fpsr},~{flags}"() nounwind ia_nsdialect
// CHECK: call void asm sideeffect "int 3", "~{dirflag},~{fpsr},~{flags}"() nounwind
// CHECK: call void asm sideeffect "", "~{dirflag},~{fpsr},~{flags}"() nounwind
// CHECK: call void asm sideeffect "int 4", "~{dirflag},~{fpsr},~{flags}"() nounwind
// CHECK: ret i32 10
}
void t9() {
@ -74,7 +74,7 @@ void t9() {
pop ebx
}
// CHECK: t9
// CHECK: call void asm sideeffect "push ebx\0Amov ebx, 0x07\0Apop ebx", "~{ebx},~{dirflag},~{fpsr},~{flags}"() nounwind ia_nsdialect
// CHECK: call void asm sideeffect "push ebx\0Amov ebx, 0x07\0Apop ebx", "~{ebx},~{dirflag},~{fpsr},~{flags}"() nounwind
}
unsigned t10(void) {
@ -88,7 +88,7 @@ unsigned t10(void) {
// CHECK: [[I:%[a-zA-Z0-9]+]] = alloca i32, align 4
// CHECK: [[J:%[a-zA-Z0-9]+]] = alloca i32, align 4
// CHECK: store i32 1, i32* [[I]], align 4
// CHECK: call i32 asm sideeffect "mov eax, i\0Amov j, eax", "=r,r,~{eax},~{dirflag},~{fpsr},~{flags}"(i32 %{{.*}}) nounwind ia_nsdialect
// CHECK: call i32 asm sideeffect "mov eax, i\0Amov j, eax", "=r,r,~{eax},~{dirflag},~{fpsr},~{flags}"(i32 %{{.*}}) nounwind
// CHECK: [[RET:%[a-zA-Z0-9]+]] = load i32* [[J]], align 4
// CHECK: ret i32 [[RET]]
}