[SelectionDAG] Move extension type for ConstantSDNode from getCopyToRegs to HandlePHINodesInSuccessorBlocks.

D122053 set the ExtendType for ConstantSDNodes in getCopyToRegs to
ZERO_EXTEND to match assumptions in ComputePHILiveOutRegInfo. PHIs
are probably not the only way ConstantSDNodeNodes can get to
getCopyToRegs.

This patch adds an ExtendType parameter to CopyValueToVirtualRegister and
has HandlePHINodesInSuccessorBlocks pass ISD::ZERO_EXTEND for ConstantInts.
This way we only affect ConstantSDNodes for PHIs.

Reviewed By: RKSimon

Differential Revision: https://reviews.llvm.org/D122171
This commit is contained in:
Craig Topper 2022-03-30 11:24:01 -07:00
parent 15c4239dff
commit 85eae45520
2 changed files with 16 additions and 12 deletions

View File

@ -918,10 +918,7 @@ void RegsForValue::getCopyToRegs(SDValue Val, SelectionDAG &DAG,
CallConv.getValue(), RegVTs[Value])
: RegVTs[Value];
// We need to zero extend constants that are liveout to match assumptions
// in FunctionLoweringInfo::ComputePHILiveOutRegInfo.
if (ExtendKind == ISD::ANY_EXTEND &&
(TLI.isZExtFree(Val, RegisterVT) || isa<ConstantSDNode>(Val)))
if (ExtendKind == ISD::ANY_EXTEND && TLI.isZExtFree(Val, RegisterVT))
ExtendKind = ISD::ZERO_EXTEND;
getCopyToParts(DAG, dl, Val.getValue(Val.getResNo() + Value), &Parts[Part],
@ -10011,8 +10008,9 @@ SDValue TargetLowering::LowerOperation(SDValue Op, SelectionDAG &DAG) const {
llvm_unreachable("LowerOperation not implemented for this target!");
}
void
SelectionDAGBuilder::CopyValueToVirtualRegister(const Value *V, unsigned Reg) {
void SelectionDAGBuilder::CopyValueToVirtualRegister(const Value *V,
unsigned Reg,
ISD::NodeType ExtendType) {
SDValue Op = getNonRegisterValue(V);
assert((Op.getOpcode() != ISD::CopyFromReg ||
cast<RegisterSDNode>(Op.getOperand(1))->getReg() != Reg) &&
@ -10027,10 +10025,11 @@ SelectionDAGBuilder::CopyValueToVirtualRegister(const Value *V, unsigned Reg) {
None); // This is not an ABI copy.
SDValue Chain = DAG.getEntryNode();
ISD::NodeType ExtendType = ISD::ANY_EXTEND;
auto PreferredExtendIt = FuncInfo.PreferredExtendType.find(V);
if (PreferredExtendIt != FuncInfo.PreferredExtendType.end())
ExtendType = PreferredExtendIt->second;
if (ExtendType == ISD::ANY_EXTEND) {
auto PreferredExtendIt = FuncInfo.PreferredExtendType.find(V);
if (PreferredExtendIt != FuncInfo.PreferredExtendType.end())
ExtendType = PreferredExtendIt->second;
}
RFV.getCopyToRegs(Op, DAG, getCurSDLoc(), Chain, nullptr, V, ExtendType);
PendingExports.push_back(Chain);
}
@ -10640,7 +10639,11 @@ SelectionDAGBuilder::HandlePHINodesInSuccessorBlocks(const BasicBlock *LLVMBB) {
unsigned &RegOut = ConstantsOut[C];
if (RegOut == 0) {
RegOut = FuncInfo.CreateRegs(C);
CopyValueToVirtualRegister(C, RegOut);
// We need to zero extend ConstantInt phi operands to match
// assumptions in FunctionLoweringInfo::ComputePHILiveOutRegInfo.
ISD::NodeType ExtendType =
isa<ConstantInt>(PHIOp) ? ISD::ZERO_EXTEND : ISD::ANY_EXTEND;
CopyValueToVirtualRegister(C, RegOut, ExtendType);
}
Reg = RegOut;
} else {

View File

@ -284,7 +284,8 @@ public:
return CurInst ? CurInst->getDebugLoc() : DebugLoc();
}
void CopyValueToVirtualRegister(const Value *V, unsigned Reg);
void CopyValueToVirtualRegister(const Value *V, unsigned Reg,
ISD::NodeType ExtendType = ISD::ANY_EXTEND);
void visit(const Instruction &I);