forked from OSchip/llvm-project
[SelectionDAG] Move extension type for ConstantSDNode from getCopyToRegs to HandlePHINodesInSuccessorBlocks.
D122053 set the ExtendType for ConstantSDNodes in getCopyToRegs to ZERO_EXTEND to match assumptions in ComputePHILiveOutRegInfo. PHIs are probably not the only way ConstantSDNodeNodes can get to getCopyToRegs. This patch adds an ExtendType parameter to CopyValueToVirtualRegister and has HandlePHINodesInSuccessorBlocks pass ISD::ZERO_EXTEND for ConstantInts. This way we only affect ConstantSDNodes for PHIs. Reviewed By: RKSimon Differential Revision: https://reviews.llvm.org/D122171
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@ -918,10 +918,7 @@ void RegsForValue::getCopyToRegs(SDValue Val, SelectionDAG &DAG,
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CallConv.getValue(), RegVTs[Value])
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: RegVTs[Value];
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// We need to zero extend constants that are liveout to match assumptions
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// in FunctionLoweringInfo::ComputePHILiveOutRegInfo.
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if (ExtendKind == ISD::ANY_EXTEND &&
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(TLI.isZExtFree(Val, RegisterVT) || isa<ConstantSDNode>(Val)))
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if (ExtendKind == ISD::ANY_EXTEND && TLI.isZExtFree(Val, RegisterVT))
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ExtendKind = ISD::ZERO_EXTEND;
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getCopyToParts(DAG, dl, Val.getValue(Val.getResNo() + Value), &Parts[Part],
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@ -10011,8 +10008,9 @@ SDValue TargetLowering::LowerOperation(SDValue Op, SelectionDAG &DAG) const {
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llvm_unreachable("LowerOperation not implemented for this target!");
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}
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void
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SelectionDAGBuilder::CopyValueToVirtualRegister(const Value *V, unsigned Reg) {
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void SelectionDAGBuilder::CopyValueToVirtualRegister(const Value *V,
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unsigned Reg,
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ISD::NodeType ExtendType) {
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SDValue Op = getNonRegisterValue(V);
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assert((Op.getOpcode() != ISD::CopyFromReg ||
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cast<RegisterSDNode>(Op.getOperand(1))->getReg() != Reg) &&
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@ -10027,10 +10025,11 @@ SelectionDAGBuilder::CopyValueToVirtualRegister(const Value *V, unsigned Reg) {
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None); // This is not an ABI copy.
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SDValue Chain = DAG.getEntryNode();
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ISD::NodeType ExtendType = ISD::ANY_EXTEND;
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auto PreferredExtendIt = FuncInfo.PreferredExtendType.find(V);
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if (PreferredExtendIt != FuncInfo.PreferredExtendType.end())
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ExtendType = PreferredExtendIt->second;
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if (ExtendType == ISD::ANY_EXTEND) {
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auto PreferredExtendIt = FuncInfo.PreferredExtendType.find(V);
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if (PreferredExtendIt != FuncInfo.PreferredExtendType.end())
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ExtendType = PreferredExtendIt->second;
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}
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RFV.getCopyToRegs(Op, DAG, getCurSDLoc(), Chain, nullptr, V, ExtendType);
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PendingExports.push_back(Chain);
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}
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@ -10640,7 +10639,11 @@ SelectionDAGBuilder::HandlePHINodesInSuccessorBlocks(const BasicBlock *LLVMBB) {
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unsigned &RegOut = ConstantsOut[C];
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if (RegOut == 0) {
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RegOut = FuncInfo.CreateRegs(C);
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CopyValueToVirtualRegister(C, RegOut);
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// We need to zero extend ConstantInt phi operands to match
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// assumptions in FunctionLoweringInfo::ComputePHILiveOutRegInfo.
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ISD::NodeType ExtendType =
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isa<ConstantInt>(PHIOp) ? ISD::ZERO_EXTEND : ISD::ANY_EXTEND;
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CopyValueToVirtualRegister(C, RegOut, ExtendType);
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}
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Reg = RegOut;
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} else {
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@ -284,7 +284,8 @@ public:
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return CurInst ? CurInst->getDebugLoc() : DebugLoc();
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}
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void CopyValueToVirtualRegister(const Value *V, unsigned Reg);
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void CopyValueToVirtualRegister(const Value *V, unsigned Reg,
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ISD::NodeType ExtendType = ISD::ANY_EXTEND);
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void visit(const Instruction &I);
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