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[PPCInstPrinter] Change B to print the target address in hexadecimal form 

Follow-up of D76591 and D76907
This commit is contained in:
Fangrui Song 2020-04-01 22:09:28 -07:00
parent 410cfc478f
commit 85adce3d73
12 changed files with 32 additions and 31 deletions
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4
lld/test/ELF/ppc32-call-stub-nopic.s
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@ -47,8 +47,8 @@
## These instructions are referenced by .plt entries.
# CHECK: 10010200 <.glink>:
# CHECK-NEXT: b .+8
# CHECK-NEXT: b .+4
# CHECK-NEXT: b 0x10010208
# CHECK-NEXT: b 0x10010208
## PLTresolve
## Operands of lis & lwz: .got+4 = 0x10020070+4 = 65536*4098+700

9
lld/test/ELF/ppc32-call-stub-pic.s
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@ -107,11 +107,10 @@
# HEX: 0x0004036c 00010294 00010298 0001029c
## These instructions are referenced by .plt entries.
# PIE: 00010294 <.glink>:
# SHARED: 000102b4 <.glink>:
# CHECK-NEXT: b .+12
# CHECK-NEXT: b .+8
# CHECK-NEXT: b .+4
# CHECK: [[#%x,GLINK:]] <.glink>:
# CHECK-NEXT: b 0x[[#%x,GLINK+12]]
# CHECK-NEXT: b 0x[[#%x,GLINK+12]]
# CHECK-NEXT: b 0x[[#%x,GLINK+12]]
## PLTresolve
## Operand of addi: 0x100a8-.glink = 24

6
lld/test/ELF/ppc32-canonical-plt.s
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@ -57,9 +57,9 @@
# CHECK-NEXT: bctr
## The 3 b instructions are referenced by .plt entries.
# CHECK-NEXT: 1001025c: b .+12
# CHECK-NEXT: b .+8
# CHECK-NEXT: b .+4
# CHECK-NEXT: 1001025c: b 0x10010268
# CHECK-NEXT: b 0x10010268
# CHECK-NEXT: b 0x10010268
## PLTresolve of 64 bytes is at the end.
## Operands of addis & addi: -0x1001025c = 65536*-4097-604

8
lld/test/ELF/ppc32-local-branch.s
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@ -7,10 +7,10 @@
## R_PPC_REL24 and R_PPC_PLTREL24 are converted to PC relative relocations if the
## symbol is non-preemptable. The addend of R_PPC_PLTREL24 should be ignored.
# CHECK: <_start>:
# CHECK-NEXT: b .+12
# CHECK-NEXT: b .+8
# CHECK-NEXT: b .+4
# CHECK: [[#%x,ADDR:]] <_start>:
# CHECK-NEXT: b 0x[[#%x,ADDR+12]]
# CHECK-NEXT: b 0x[[#%x,ADDR+12]]
# CHECK-NEXT: b 0x[[#%x,ADDR+12]]
# CHECK-EMPTY:
# CHECK-NEXT: <foo>:

6
lld/test/ELF/ppc32-reloc-rel.s
View File

@ -13,7 +13,7 @@
b 1f
1:
# CHECK-LABEL: section .R_PPC_REL24:
# CHECK: b .+4
# CHECK: b 0x100100bc
.section .R_PPC_REL32,"ax",@progbits
.long 1f - .
@ -25,10 +25,10 @@
b 1f@PLT+32768
1:
# CHECK-LABEL: section .R_PPC_PLTREL24:
# CHECK: b .+4
# CHECK: b 0x100100c4
.section .R_PPC_LOCAL24PC,"ax",@progbits
b 1f@local
1:
# CHECK-LABEL: section .R_PPC_LOCAL24PC:
# CHECK: b .+4
# CHECK: b 0x100100c8

6
lld/test/ELF/ppc64-call-reach.s
View File

@ -59,15 +59,15 @@ test:
# thunks.
# CHECK-LABEL: test
# CHECK: 10010014: bl 0x12010010
# CHECK: 10010024: b .+33554428
# CHECK: 10010024: b 0x12010020
# NEGOFFSET-LABEL: test
# NEGOFFSET: 10010014: bl 0xe010014
# NEGOFFSET: 10010024: b .+33554432
# NEGOFFSET: 10010024: b 0xe010024
# THUNK-LABEL: <test>:
# THUNK: 10010014: bl 0x10010028
# THUNK: 10010024: b .+20
# THUNK: 10010024: b 0x10010038
# .branch_lt[0]
# THUNK-LABEL: <__long_branch_callee>:

2
lld/test/ELF/ppc64-reloc-rel.s
View File

@ -34,7 +34,7 @@ rel16:
.section .R_PPC64_REL24,"ax",@progbits
b rel16
# CHECK-LABEL: Disassembly of section .R_PPC64_REL24:
# CHECK: b .+67108840
# CHECK: 100101b0: b 0x10010198
.section .REL32_AND_REL64,"ax",@progbits
.cfi_startproc

2
lld/test/ELF/ppc64-toc-restore.s
View File

@ -52,7 +52,7 @@ _diff_object:
noretbranch:
b bar_local
// CHECK-LABEL: <noretbranch>:
// CHECK: 100102e0: b .+67108832
// CHECK-NEXT: 100102e0: b 0x100102c0
// CHECK-EMPTY:
// This should come last to check the end-of-buffer condition.

6
llvm/lib/Target/PowerPC/Disassembler/PPCDisassembler.cpp
View File

@ -67,9 +67,9 @@ static DecodeStatus decodeCondBrTarget(MCInst &Inst, unsigned Imm,
return MCDisassembler::Success;
}
static DecodeStatus DecodePCRel24BranchTarget(MCInst &Inst, unsigned Imm,
uint64_t Addr,
const void *Decoder) {
static DecodeStatus decodeDirectBrTarget(MCInst &Inst, unsigned Imm,
uint64_t /*Address*/,
const void * /*Decoder*/) {
int32_t Offset = SignExtend32<24>(Imm);
Inst.addOperand(MCOperand::createImm(Offset));
return MCDisassembler::Success;

4
llvm/lib/Target/PowerPC/PPCInstrInfo.td
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@ -750,7 +750,9 @@ def PPCDirectBrAsmOperand : AsmOperandClass {
def directbrtarget : Operand<OtherVT> {
let PrintMethod = "printBranchOperand";
let EncoderMethod = "getDirectBrEncoding";
let DecoderMethod = "decodeDirectBrTarget";
let ParserMatchClass = PPCDirectBrAsmOperand;
let OperandType = "OPERAND_PCREL";
}
def absdirectbrtarget : Operand<OtherVT> {
let PrintMethod = "printAbsBranchOperand";
@ -776,7 +778,7 @@ def abscondbrtarget : Operand<OtherVT> {
def calltarget : Operand<iPTR> {
let PrintMethod = "printBranchOperand";
let EncoderMethod = "getDirectBrEncoding";
let DecoderMethod = "DecodePCRel24BranchTarget";
let DecoderMethod = "decodeDirectBrTarget";
let ParserMatchClass = PPCDirectBrAsmOperand;
let OperandType = "OPERAND_PCREL";
}

4
llvm/test/CodeGen/PowerPC/alignlongjumptest.mir
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@ -71,12 +71,12 @@ body: |
# Check for the long branch.
# CHECK-LE: 08 00 82 4{{[01]}} b{{[tf]}} 2, 0xc
# CHECK-LE-NEXT: fc 7f 00 48 b .+32764
# CHECK-LE-NEXT: fc 7f 00 48 b 0x8004
# CHECK-LE-DAG: paddi 3, 3, 13, 0
# CHECK-LE-DAG: paddi 3, 3, 21, 0
# CHECK-LE: blr
# CHECK-BE: 4{{[01]}} 82 00 08 b{{[tf]}} 2, 0xc
# CHECK-BE-NEXT: 48 00 7f fc b .+32764
# CHECK-BE-NEXT: 48 00 7f fc b 0x8004
# CHECK-BE-DAG: paddi 3, 3, 13, 0
# CHECK-BE-DAG: paddi 3, 3, 21, 0
# CHECK-BE: blr

6
llvm/test/tools/llvm-objdump/ELF/PowerPC/branch-offset.s
View File

@ -19,9 +19,9 @@ bl:
bl .+4
# CHECK-LABEL: <b>:
# CHECK-NEXT: b .+67108860
# CHECK-NEXT: b .+0
# CHECK-NEXT: b .+4
# CHECK-NEXT: b 0x8
# CHECK-NEXT: b 0x10
# CHECK-NEXT: b 0x18
b:
b .-4