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R600/SI: remove some more unused code 

This is a candidate for the stable branch.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Tom Stellard <thomas.stellard@amd.com>
llvm-svn: 175350
This commit is contained in:
Christian Konig 2013-02-16 11:27:56 +00:00
parent d886099f13
commit 8590c1e371
2 changed files with 0 additions and 52 deletions
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45
llvm/lib/Target/R600/AMDGPUCodeEmitter.h
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@ -1,45 +0,0 @@
//===-- AMDGPUCodeEmitter.h - AMDGPU Code Emitter interface -----------------===//
//
// The LLVM Compiler Infrastructure
//
// This file is distributed under the University of Illinois Open Source
// License. See LICENSE.TXT for details.
//
//===----------------------------------------------------------------------===//
//
/// \file
/// \brief CodeEmitter interface for R600 and SI codegen.
//
//===----------------------------------------------------------------------===//
#ifndef AMDGPUCODEEMITTER_H
#define AMDGPUCODEEMITTER_H
namespace llvm {
class AMDGPUCodeEmitter {
public:
uint64_t getBinaryCodeForInstr(const MachineInstr &MI) const;
virtual uint64_t getMachineOpValue(const MachineInstr &MI,
const MachineOperand &MO) const { return 0; }
virtual unsigned GPR4AlignEncode(const MachineInstr &MI,
unsigned OpNo) const {
return 0;
}
virtual unsigned GPR2AlignEncode(const MachineInstr &MI,
unsigned OpNo) const {
return 0;
}
virtual uint64_t VOPPostEncode(const MachineInstr &MI,
uint64_t Value) const {
return Value;
}
virtual uint64_t i32LiteralEncode(const MachineInstr &MI,
unsigned OpNo) const {
return 0;
}
};
} // End namespace llvm
#endif // AMDGPUCODEEMITTER_H

7
llvm/lib/Target/R600/MCTargetDesc/AMDGPUMCCodeEmitter.h
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@ -42,13 +42,6 @@ public:
SmallVectorImpl<MCFixup> &Fixups) const {
return 0;
}
virtual uint64_t VOPPostEncode(const MCInst &MI, uint64_t Value) const {
return Value;
}
virtual uint64_t i32LiteralEncode(const MCInst &MI, unsigned OpNo,
SmallVectorImpl<MCFixup> &Fixups) const {
return 0;
}
};
} // End namespace llvm