forked from OSchip/llvm-project
X86: Don't fold spills into SSE operations if the stack is unaligned.
Regalloc can emit unaligned spills nowadays, but we can't fold the spills into SSE ops if we can't guarantee alignment. PR12250. llvm-svn: 192064
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@ -4166,6 +4166,10 @@ MachineInstr* X86InstrInfo::foldMemoryOperandImpl(MachineFunction &MF,
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const MachineFrameInfo *MFI = MF.getFrameInfo();
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unsigned Size = MFI->getObjectSize(FrameIndex);
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unsigned Alignment = MFI->getObjectAlignment(FrameIndex);
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// If the function stack isn't realigned we don't want to fold instructions
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// that need increased alignment.
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if (!RI.needsStackRealignment(MF))
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Alignment = std::min(Alignment, TM.getFrameLowering()->getStackAlignment());
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if (Ops.size() == 2 && Ops[0] == 0 && Ops[1] == 1) {
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unsigned NewOpc = 0;
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unsigned RCSize = 0;
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@ -0,0 +1,49 @@
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; RUN: llc -mtriple=i386-unknown-freebsd -mattr=sse2 -stack-alignment=4 -relocation-model=pic < %s | FileCheck %s -check-prefix=UNALIGNED
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; RUN: llc -mtriple=i386-unknown-freebsd -mattr=sse2 -stack-alignment=16 -relocation-model=pic < %s | FileCheck %s -check-prefix=ALIGNED
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; RUN: llc -mtriple=i386-unknown-freebsd -mattr=sse2 -stack-alignment=4 -force-align-stack -relocation-model=pic < %s | FileCheck %s -check-prefix=FORCEALIGNED
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@arr = internal unnamed_addr global [32 x i32] zeroinitializer, align 16
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; PR12250
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define i32 @test1() {
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vector.ph:
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br label %vector.body
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vector.body:
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%index = phi i32 [ 0, %vector.ph ], [ %index.next, %vector.body ]
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%0 = getelementptr inbounds [32 x i32]* @arr, i32 0, i32 %index
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%1 = bitcast i32* %0 to <4 x i32>*
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%wide.load = load <4 x i32>* %1, align 16
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%2 = add nsw <4 x i32> %wide.load, <i32 10, i32 10, i32 10, i32 10>
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%3 = xor <4 x i32> %2, <i32 123345, i32 123345, i32 123345, i32 123345>
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%4 = add nsw <4 x i32> %3, <i32 112, i32 112, i32 112, i32 112>
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%5 = xor <4 x i32> %4, <i32 543345, i32 543345, i32 543345, i32 543345>
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%6 = add nsw <4 x i32> %5, <i32 73, i32 73, i32 73, i32 73>
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%7 = xor <4 x i32> %6, <i32 345987, i32 345987, i32 345987, i32 345987>
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%8 = add nsw <4 x i32> %7, <i32 48, i32 48, i32 48, i32 48>
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%9 = xor <4 x i32> %8, <i32 123987, i32 123987, i32 123987, i32 123987>
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store <4 x i32> %9, <4 x i32>* %1, align 16
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%index.next = add i32 %index, 4
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%10 = icmp eq i32 %index.next, 32
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br i1 %10, label %middle.block, label %vector.body
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middle.block:
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ret i32 0
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; We can't fold the spill into a padd unless the stack is aligned. Just spilling
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; doesn't force stack realignment though
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; UNALIGNED-LABEL: @test1
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; UNALIGNED-NOT: andl $-{{..}}, %esp
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; UNALIGNED: movdqu {{.*}} # 16-byte Folded Spill
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; UNALIGNED-NOT: paddd {{.*}} # 16-byte Folded Reload
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; ALIGNED-LABEL: @test1
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; ALIGNED-NOT: andl $-{{..}}, %esp
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; ALIGNED: movdqa {{.*}} # 16-byte Spill
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; ALIGNED: paddd {{.*}} # 16-byte Folded Reload
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; FORCEALIGNED-LABEL: @test1
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; FORCEALIGNED: andl $-{{..}}, %esp
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; FORCEALIGNED: movdqa {{.*}} # 16-byte Spill
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; FORCEALIGNED: paddd {{.*}} # 16-byte Folded Reload
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}
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