forked from OSchip/llvm-project
Add flag to control whether or not delay slots are filled during
instruction scheduling (this is off by default). llvm-svn: 8553
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@ -17,6 +17,9 @@
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SchedDebugLevel_t SchedDebugLevel;
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SchedDebugLevel_t SchedDebugLevel;
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static cl::opt<bool> EnableFillingDelaySlots("sched-fill-delay-slots",
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cl::desc("Fill branch delay slots during local scheduling"));
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static cl::opt<SchedDebugLevel_t, true>
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static cl::opt<SchedDebugLevel_t, true>
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SDL_opt("dsched", cl::Hidden, cl::location(SchedDebugLevel),
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SDL_opt("dsched", cl::Hidden, cl::location(SchedDebugLevel),
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cl::desc("enable instruction scheduling debugging information"),
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cl::desc("enable instruction scheduling debugging information"),
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@ -1255,7 +1258,8 @@ ChooseInstructionsForDelaySlots(SchedulingManager& S, MachineBasicBlock &MBB,
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std::vector<SchedGraphNode*> delayNodeVec;
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std::vector<SchedGraphNode*> delayNodeVec;
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const MachineInstr* brInstr = NULL;
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const MachineInstr* brInstr = NULL;
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if (termInstr->getOpcode() != Instruction::Ret)
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if (EnableFillingDelaySlots &&
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termInstr->getOpcode() != Instruction::Ret)
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{
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{
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// To find instructions that need delay slots without searching the full
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// To find instructions that need delay slots without searching the full
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// machine code, we assume that the only delayed instructions are CALLs
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// machine code, we assume that the only delayed instructions are CALLs
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@ -1285,6 +1289,8 @@ ChooseInstructionsForDelaySlots(SchedulingManager& S, MachineBasicBlock &MBB,
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// Also mark delay slots for other delayed instructions to hold NOPs.
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// Also mark delay slots for other delayed instructions to hold NOPs.
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// Simply passing in an empty delayNodeVec will have this effect.
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// Simply passing in an empty delayNodeVec will have this effect.
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// If brInstr is not handled above (EnableFillingDelaySlots == false),
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// brInstr will be NULL so this will handle the branch instrs. as well.
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//
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//
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delayNodeVec.clear();
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delayNodeVec.clear();
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for (unsigned i=0; i < MBB.size(); ++i)
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for (unsigned i=0; i < MBB.size(); ++i)
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