forked from OSchip/llvm-project
Add rhadd builtin
rhadd = (x+y+1)>>1 Implemented as: (x>>1) + (y>>1) + ((x&1)|(y&1)) This prevents us having to do assembly addition and overflow detection Reviewed-by: Tom Stellard <thomas.stellard@amd.com> llvm-svn: 188477
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@ -68,6 +68,7 @@
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#include <clc/integer/hadd.h>
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#include <clc/integer/mad24.h>
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#include <clc/integer/mul24.h>
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#include <clc/integer/rhadd.h>
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#include <clc/integer/rotate.h>
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#include <clc/integer/sub_sat.h>
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#include <clc/integer/upsample.h>
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#define __CLC_BODY <clc/integer/rhadd.inc>
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#include <clc/integer/gentype.inc>
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_CLC_OVERLOAD _CLC_DECL __CLC_GENTYPE rhadd(__CLC_GENTYPE x, __CLC_GENTYPE y);
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@ -14,6 +14,7 @@ integer/clz_impl.ll
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integer/hadd.cl
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integer/mad24.cl
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integer/mul24.cl
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integer/rhadd.cl
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integer/rotate.cl
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integer/sub_sat.cl
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integer/sub_sat_if.ll
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#include <clc/clc.h>
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#define __CLC_BODY <rhadd.inc>
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#include <clc/integer/gentype.inc>
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@ -0,0 +1,6 @@
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//rhadd = (x+y+1)>>1
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//This can be simplified to x>>1 + y>>1 + (1 if either x or y have the 1s bit set)
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//This saves us having to do any checks for overflow in the addition sums
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_CLC_OVERLOAD _CLC_DEF __CLC_GENTYPE rhadd(__CLC_GENTYPE x, __CLC_GENTYPE y) {
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return (x>>(__CLC_GENTYPE)1)+(y>>(__CLC_GENTYPE)1)+((x&(__CLC_GENTYPE)1)|(y&(__CLC_GENTYPE)1));
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}
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