forked from OSchip/llvm-project
[DirectX backend] Add pass to lower llvm intrinsic into dxil op function.
A new pass DXILOpLowering was added. It will scan all llvm intrinsics, create dxil op function if it can map to dxil op function. Then translate call instructions on the intrinsic into call on dxil op function. dxil op function will add i32 argument to the begining of args for dxil opcode. So cannot use setCalledFunction to update the call instruction on intrinsic. This commit only support sin to start the work. Reviewed By: kuhar, beanz Differential Revision: https://reviews.llvm.org/D124805
This commit is contained in:
Xiang Li
parent
4537aae0d5
commit
85285be9c3
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@ -9,6 +9,7 @@ add_public_tablegen_target(DirectXCommonTableGen)
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add_llvm_target(DirectXCodeGen
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DirectXSubtarget.cpp
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DirectXTargetMachine.cpp
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DXILOpLowering.cpp
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DXILPointerType.cpp
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DXILPrepare.cpp
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PointerTypeAnalysis.cpp
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@ -0,0 +1,29 @@
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//===- DXILConstants.h - Essential DXIL constants -------------------------===//
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//
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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//
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//===----------------------------------------------------------------------===//
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///
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/// \file This file contains essential DXIL constants.
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//===----------------------------------------------------------------------===//
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#ifndef LLVM_LIB_TARGET_DIRECTX_DXILCONSTANTS_H
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#define LLVM_LIB_TARGET_DIRECTX_DXILCONSTANTS_H
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namespace llvm {
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namespace DXIL {
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// Enumeration for operations specified by DXIL
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enum class OpCode : unsigned {
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Sin = 13, // returns sine(theta) for theta in radians.
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};
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// Groups for DXIL operations with equivalent function templates
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enum class OpCodeClass : unsigned {
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Unary,
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};
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} // namespace DXIL
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} // namespace llvm
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#endif
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@ -0,0 +1,279 @@
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//===- DXILOpLower.cpp - Lowering LLVM intrinsic to DIXLOp function -------===//
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//
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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//
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//===----------------------------------------------------------------------===//
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///
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/// \file This file contains passes and utilities to lower llvm intrinsic call
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/// to DXILOp function call.
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//===----------------------------------------------------------------------===//
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#include "DXILConstants.h"
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#include "DirectX.h"
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#include "llvm/ADT/SmallVector.h"
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#include "llvm/CodeGen/Passes.h"
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#include "llvm/IR/IRBuilder.h"
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#include "llvm/IR/Instruction.h"
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#include "llvm/IR/Intrinsics.h"
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#include "llvm/IR/Module.h"
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#include "llvm/IR/PassManager.h"
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#include "llvm/Pass.h"
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#include "llvm/Support/ErrorHandling.h"
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#define DEBUG_TYPE "dxil-op-lower"
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using namespace llvm;
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using namespace llvm::DXIL;
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constexpr StringLiteral DXILOpNamePrefix = "dx.op.";
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enum OverloadKind : uint16_t {
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VOID = 1,
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HALF = 1 << 1,
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FLOAT = 1 << 2,
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DOUBLE = 1 << 3,
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I1 = 1 << 4,
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I8 = 1 << 5,
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I16 = 1 << 6,
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I32 = 1 << 7,
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I64 = 1 << 8,
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UserDefineType = 1 << 9,
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ObjectType = 1 << 10,
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};
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static const char *getOverloadTypeName(OverloadKind Kind) {
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switch (Kind) {
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case OverloadKind::HALF:
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return "f16";
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case OverloadKind::FLOAT:
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return "f32";
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case OverloadKind::DOUBLE:
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return "f64";
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case OverloadKind::I1:
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return "i1";
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case OverloadKind::I8:
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return "i8";
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case OverloadKind::I16:
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return "i16";
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case OverloadKind::I32:
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return "i32";
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case OverloadKind::I64:
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return "i64";
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case OverloadKind::VOID:
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case OverloadKind::ObjectType:
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case OverloadKind::UserDefineType:
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llvm_unreachable("invalid overload type for name");
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break;
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}
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}
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static OverloadKind getOverloadKind(Type *Ty) {
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Type::TypeID T = Ty->getTypeID();
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switch (T) {
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case Type::VoidTyID:
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return OverloadKind::VOID;
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case Type::HalfTyID:
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return OverloadKind::HALF;
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case Type::FloatTyID:
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return OverloadKind::FLOAT;
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case Type::DoubleTyID:
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return OverloadKind::DOUBLE;
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case Type::IntegerTyID: {
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IntegerType *ITy = cast<IntegerType>(Ty);
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unsigned Bits = ITy->getBitWidth();
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switch (Bits) {
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case 1:
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return OverloadKind::I1;
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case 8:
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return OverloadKind::I8;
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case 16:
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return OverloadKind::I16;
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case 32:
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return OverloadKind::I32;
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case 64:
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return OverloadKind::I64;
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default:
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llvm_unreachable("invalid overload type");
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return OverloadKind::VOID;
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}
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}
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case Type::PointerTyID:
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return OverloadKind::UserDefineType;
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case Type::StructTyID:
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return OverloadKind::ObjectType;
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default:
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llvm_unreachable("invalid overload type");
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return OverloadKind::VOID;
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}
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}
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static std::string getTypeName(OverloadKind Kind, Type *Ty) {
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if (Kind < OverloadKind::UserDefineType) {
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return getOverloadTypeName(Kind);
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} else if (Kind == OverloadKind::UserDefineType) {
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StructType *ST = cast<StructType>(Ty);
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return ST->getStructName().str();
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} else if (Kind == OverloadKind::ObjectType) {
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StructType *ST = cast<StructType>(Ty);
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return ST->getStructName().str();
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} else {
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std::string Str;
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raw_string_ostream OS(Str);
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Ty->print(OS);
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return OS.str();
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}
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}
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// Static properties.
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struct OpCodeProperty {
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DXIL::OpCode OpCode;
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// FIXME: change OpCodeName into index to a large string constant when move to
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// tableGen.
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const char *OpCodeName;
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DXIL::OpCodeClass OpCodeClass;
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uint16_t OverloadTys;
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llvm::Attribute::AttrKind FuncAttr;
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};
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static const char *getOpCodeClassName(const OpCodeProperty &Prop) {
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// FIXME: generate this table with tableGen.
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static const char *OpCodeClassNames[] = {
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"unary",
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};
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unsigned Index = static_cast<unsigned>(Prop.OpCodeClass);
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assert(Index < (sizeof(OpCodeClassNames) / sizeof(OpCodeClassNames[0])) &&
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"Out of bound OpCodeClass");
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return OpCodeClassNames[Index];
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}
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static std::string constructOverloadName(OverloadKind Kind, Type *Ty,
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const OpCodeProperty &Prop) {
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if (Kind == OverloadKind::VOID) {
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return (Twine(DXILOpNamePrefix) + getOpCodeClassName(Prop)).str();
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}
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return (Twine(DXILOpNamePrefix) + getOpCodeClassName(Prop) + "." +
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getTypeName(Kind, Ty))
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.str();
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}
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static const OpCodeProperty *getOpCodeProperty(DXIL::OpCode DXILOp) {
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// FIXME: generate this table with tableGen.
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static const OpCodeProperty OpCodeProps[] = {
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{DXIL::OpCode::Sin, "Sin", OpCodeClass::Unary,
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OverloadKind::FLOAT | OverloadKind::HALF, Attribute::AttrKind::ReadNone},
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};
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// FIXME: change search to indexing with
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// DXILOp once all DXIL op is added.
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OpCodeProperty TmpProp;
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TmpProp.OpCode = DXILOp;
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const OpCodeProperty *Prop =
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llvm::lower_bound(OpCodeProps, TmpProp,
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[](const OpCodeProperty &A, const OpCodeProperty &B) {
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return A.OpCode < B.OpCode;
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});
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return Prop;
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}
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static FunctionCallee createDXILOpFunction(DXIL::OpCode DXILOp, Function &F,
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Module &M) {
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const OpCodeProperty *Prop = getOpCodeProperty(DXILOp);
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// Get return type as overload type for DXILOp.
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// Only simple mapping case here, so return type is good enough.
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Type *OverloadTy = F.getReturnType();
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OverloadKind Kind = getOverloadKind(OverloadTy);
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// FIXME: find the issue and report error in clang instead of check it in
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// backend.
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if ((Prop->OverloadTys & (uint16_t)Kind) == 0) {
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llvm_unreachable("invalid overload");
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}
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std::string FnName = constructOverloadName(Kind, OverloadTy, *Prop);
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assert(!M.getFunction(FnName) && "Function already exists");
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auto &Ctx = M.getContext();
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Type *OpCodeTy = Type::getInt32Ty(Ctx);
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SmallVector<Type *> ArgTypes;
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// DXIL has i32 opcode as first arg.
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ArgTypes.emplace_back(OpCodeTy);
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FunctionType *FT = F.getFunctionType();
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ArgTypes.append(FT->param_begin(), FT->param_end());
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FunctionType *DXILOpFT = FunctionType::get(OverloadTy, ArgTypes, false);
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return M.getOrInsertFunction(FnName, DXILOpFT);
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}
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static void lowerIntrinsic(DXIL::OpCode DXILOp, Function &F, Module &M) {
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auto DXILOpFn = createDXILOpFunction(DXILOp, F, M);
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IRBuilder<> B(M.getContext());
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Value *DXILOpArg = B.getInt32(static_cast<unsigned>(DXILOp));
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for (User *U : make_early_inc_range(F.users())) {
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CallInst *CI = dyn_cast<CallInst>(U);
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if (!CI)
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continue;
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SmallVector<Value *> Args;
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Args.emplace_back(DXILOpArg);
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Args.append(CI->arg_begin(), CI->arg_end());
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B.SetInsertPoint(CI);
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CallInst *DXILCI = B.CreateCall(DXILOpFn, Args);
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CI->replaceAllUsesWith(DXILCI);
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CI->eraseFromParent();
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}
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if (F.user_empty())
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F.eraseFromParent();
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}
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static bool lowerIntrinsics(Module &M) {
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bool Updated = false;
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static SmallDenseMap<Intrinsic::ID, DXIL::OpCode> LowerMap = {
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{Intrinsic::sin, DXIL::OpCode::Sin}};
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for (Function &F : make_early_inc_range(M.functions())) {
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if (!F.isDeclaration())
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continue;
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Intrinsic::ID ID = F.getIntrinsicID();
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auto LowerIt = LowerMap.find(ID);
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if (LowerIt == LowerMap.end())
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continue;
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lowerIntrinsic(LowerIt->second, F, M);
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Updated = true;
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}
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return Updated;
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}
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namespace {
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/// A pass that transforms external global definitions into declarations.
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class DXILOpLowering : public PassInfoMixin<DXILOpLowering> {
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public:
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PreservedAnalyses run(Module &M, ModuleAnalysisManager &) {
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if (lowerIntrinsics(M))
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return PreservedAnalyses::none();
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return PreservedAnalyses::all();
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}
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};
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} // namespace
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namespace {
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class DXILOpLoweringLegacy : public ModulePass {
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public:
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bool runOnModule(Module &M) override { return lowerIntrinsics(M); }
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StringRef getPassName() const override { return "DXIL Op Lowering"; }
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DXILOpLoweringLegacy() : ModulePass(ID) {}
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static char ID; // Pass identification.
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};
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char DXILOpLoweringLegacy::ID = 0;
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} // end anonymous namespace
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INITIALIZE_PASS_BEGIN(DXILOpLoweringLegacy, DEBUG_TYPE, "DXIL Op Lowering",
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false, false)
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INITIALIZE_PASS_END(DXILOpLoweringLegacy, DEBUG_TYPE, "DXIL Op Lowering", false,
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false)
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ModulePass *llvm::createDXILOpLoweringLegacyPass() {
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return new DXILOpLoweringLegacy();
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}
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@ -23,6 +23,13 @@ void initializeDXILPrepareModulePass(PassRegistry &);
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/// Pass to convert modules into DXIL-compatable modules
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ModulePass *createDXILPrepareModulePass();
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/// Initializer for DXILOpLowering
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void initializeDXILOpLoweringLegacyPass(PassRegistry &);
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/// Pass to lowering LLVM intrinsic call to DXIL op function call.
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ModulePass *createDXILOpLoweringLegacyPass();
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} // namespace llvm
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#endif // LLVM_LIB_TARGET_DIRECTX_DIRECTX_H
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@ -34,6 +34,7 @@ extern "C" LLVM_EXTERNAL_VISIBILITY void LLVMInitializeDirectXTarget() {
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RegisterTargetMachine<DirectXTargetMachine> X(getTheDirectXTarget());
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auto *PR = PassRegistry::getPassRegistry();
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initializeDXILPrepareModulePass(*PR);
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initializeDXILOpLoweringLegacyPass(*PR);
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}
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class DXILTargetObjectFile : public TargetLoweringObjectFile {
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@ -84,6 +85,7 @@ bool DirectXTargetMachine::addPassesToEmitFile(
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PassManagerBase &PM, raw_pwrite_stream &Out, raw_pwrite_stream *DwoOut,
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CodeGenFileType FileType, bool DisableVerify,
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MachineModuleInfoWrapperPass *MMIWP) {
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PM.add(createDXILOpLoweringLegacyPass());
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PM.add(createDXILPrepareModulePass());
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switch (FileType) {
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case CGFT_AssemblyFile:
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@ -0,0 +1,43 @@
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; RUN: opt -S -dxil-op-lower < %s | FileCheck %s
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; Make sure dxil operation function calls for sin are generated for float and half.
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; CHECK:call float @dx.op.unary.f32(i32 13, float %{{.*}})
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; CHECK:call half @dx.op.unary.f16(i32 13, half %{{.*}})
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target datalayout = "e-m:e-p:32:32-i1:32-i8:8-i16:16-i32:32-i64:64-f16:16-f32:32-f64:64-n8:16:32:64"
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target triple = "dxil-pc-shadermodel6.7-library"
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; Function Attrs: noinline nounwind optnone
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define noundef float @_Z3foof(float noundef %a) #0 {
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entry:
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%a.addr = alloca float, align 4
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store float %a, ptr %a.addr, align 4
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%0 = load float, ptr %a.addr, align 4
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%1 = call float @llvm.sin.f32(float %0)
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ret float %1
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}
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; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
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declare float @llvm.sin.f32(float) #1
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; Function Attrs: noinline nounwind optnone
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define noundef half @_Z3barDh(half noundef %a) #0 {
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entry:
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%a.addr = alloca half, align 2
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store half %a, ptr %a.addr, align 2
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%0 = load half, ptr %a.addr, align 2
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%1 = call half @llvm.sin.f16(half %0)
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ret half %1
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}
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; Function Attrs: nocallback nofree nosync nounwind readnone speculatable willreturn
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declare half @llvm.sin.f16(half) #1
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attributes #0 = { noinline nounwind optnone "frame-pointer"="none" "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" }
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attributes #1 = { nocallback nofree nosync nounwind readnone speculatable willreturn }
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!llvm.module.flags = !{!0}
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!llvm.ident = !{!1}
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!0 = !{i32 1, !"wchar_size", i32 4}
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!1 = !{!"clang version 15.0.0 (https://github.com/llvm/llvm-project.git 73417c517644db5c419c85c0b3cb6750172fcab5)"}
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@ -476,7 +476,7 @@ static bool shouldPinPassToLegacyPM(StringRef Pass) {
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"x86-", "xcore-", "wasm-", "systemz-", "ppc-", "nvvm-",
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"nvptx-", "mips-", "lanai-", "hexagon-", "bpf-", "avr-",
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"thumb2-", "arm-", "si-", "gcn-", "amdgpu-", "aarch64-",
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"amdgcn-", "polly-", "riscv-"};
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"amdgcn-", "polly-", "riscv-", "dxil-"};
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std::vector<StringRef> PassNameContain = {"ehprepare"};
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std::vector<StringRef> PassNameExact = {
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"safe-stack", "cost-model",
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