forked from OSchip/llvm-project
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e86dcd0cbd
commit
851019175b
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@ -1,40 +1,50 @@
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; RUN: llc -march=x86-64 -mcpu=corei7 < %s | FileCheck %s
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; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc < %s -mtriple=x86_64-unknown -mcpu=corei7 | FileCheck %s
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declare i64 @llvm.ctpop.i64(i64) nounwind readnone
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define i32 @test1(i64 %x) nounwind readnone {
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; CHECK-LABEL: test1:
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; CHECK: # BB#0:
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; CHECK-NEXT: leaq -1(%rdi), %rax
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; CHECK-NEXT: testq %rax, %rdi
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; CHECK-NEXT: setne %al
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; CHECK-NEXT: movzbl %al, %eax
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; CHECK-NEXT: retq
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%count = tail call i64 @llvm.ctpop.i64(i64 %x)
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%cast = trunc i64 %count to i32
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%cmp = icmp ugt i32 %cast, 1
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%conv = zext i1 %cmp to i32
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ret i32 %conv
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; CHECK-LABEL: test1:
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; CHECK: leaq -1([[A0:%rdi|%rcx]])
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; CHECK-NEXT: testq
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; CHECK-NEXT: setne
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; CHECK: ret
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}
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define i32 @test2(i64 %x) nounwind readnone {
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; CHECK-LABEL: test2:
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; CHECK: # BB#0:
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; CHECK-NEXT: leaq -1(%rdi), %rax
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; CHECK-NEXT: testq %rax, %rdi
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; CHECK-NEXT: sete %al
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; CHECK-NEXT: movzbl %al, %eax
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; CHECK-NEXT: retq
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%count = tail call i64 @llvm.ctpop.i64(i64 %x)
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%cmp = icmp ult i64 %count, 2
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%conv = zext i1 %cmp to i32
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ret i32 %conv
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; CHECK-LABEL: test2:
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; CHECK: leaq -1([[A0]])
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; CHECK-NEXT: testq
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; CHECK-NEXT: sete
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; CHECK: ret
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}
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define i32 @test3(i64 %x) nounwind readnone {
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; CHECK-LABEL: test3:
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; CHECK: # BB#0:
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; CHECK-NEXT: popcntq %rdi, %rax
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; CHECK-NEXT: andb $63, %al
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; CHECK-NEXT: cmpb $2, %al
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; CHECK-NEXT: sbbl %eax, %eax
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; CHECK-NEXT: andl $1, %eax
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; CHECK-NEXT: retq
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%count = tail call i64 @llvm.ctpop.i64(i64 %x)
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%cast = trunc i64 %count to i6 ; Too small for 0-64
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%cmp = icmp ult i6 %cast, 2
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%conv = zext i1 %cmp to i32
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ret i32 %conv
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; CHECK-LABEL: test3:
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; CHECK: cmpb $2
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; CHECK: ret
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}
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