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[TargetLowering] Increase the storage size of NumRegistersForVT to allow the type break down for v256i1 and other types to be stored correctly 

v256i1 on X86 without avx512 breaks down to 256 i8 values when passed between basic blocks. But the NumRegistersForVT was sized at a byte for each VT. This results in 256 being stored as 0.

This patch enlarges the type to 16 bits and adds an assert to ensure that no information is lost when the entry is stored.

Differential Revision: https://reviews.llvm.org/D70138
This commit is contained in:
Craig Topper 2019-11-13 12:09:34 -08:00
parent 63bbbcde9f
commit 84e83b54bd
2 changed files with 5 additions and 2 deletions
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2
llvm/include/llvm/CodeGen/TargetLowering.h
View File

@ -2741,7 +2741,7 @@ private:
/// This indicates the default register class to use for each ValueType the /// This indicates the default register class to use for each ValueType the
/// target supports natively. /// target supports natively.
const TargetRegisterClass *RegClassForVT[MVT::LAST_VALUETYPE]; const TargetRegisterClass *RegClassForVT[MVT::LAST_VALUETYPE];
unsigned char NumRegistersForVT[MVT::LAST_VALUETYPE]; uint16_t NumRegistersForVT[MVT::LAST_VALUETYPE];
MVT RegisterTypeForVT[MVT::LAST_VALUETYPE]; MVT RegisterTypeForVT[MVT::LAST_VALUETYPE];
/// This indicates the "representative" register class to use for each /// This indicates the "representative" register class to use for each

5
llvm/lib/CodeGen/TargetLoweringBase.cpp
View File

@ -1332,8 +1332,11 @@ void TargetLoweringBase::computeRegisterProperties(
MVT IntermediateVT; MVT IntermediateVT;
MVT RegisterVT; MVT RegisterVT;
unsigned NumIntermediates; unsigned NumIntermediates;
NumRegistersForVT[i] = getVectorTypeBreakdownMVT(VT, IntermediateVT, unsigned NumRegisters = getVectorTypeBreakdownMVT(VT, IntermediateVT,
NumIntermediates, RegisterVT, this); NumIntermediates, RegisterVT, this);
NumRegistersForVT[i] = NumRegisters;
assert(NumRegistersForVT[i] == NumRegisters &&
"NumRegistersForVT size cannot represent NumRegisters!");
RegisterTypeForVT[i] = RegisterVT; RegisterTypeForVT[i] = RegisterVT;
MVT NVT = VT.getPow2VectorType(); MVT NVT = VT.getPow2VectorType();