forked from OSchip/llvm-project
[SelectOpti] Remove test on loop-level analysis
Remove a test that relied on the underlying instruction latency modeling. Such dependency blocks efforts such as D79483 to improve this cost modeling. Reviewed By: RKSimon Differential Revision: https://reviews.llvm.org/D132029
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@ -355,70 +355,6 @@ for.exit: ; preds = %for.body
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ret double %x2
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}
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;; Use of a branch in this test would avoid executing a load and several
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;; floating-point operations for most cases (70% of the time).
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;; Yet, the gain is not increasing much per iteration (small gradient gain).
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;; Loop-level analysis should decide not to form a branch.
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;;
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;;double small_gradient(int n, double x, ptr a) {
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;; for (int i = 0; i < n; i++) {
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;; double r = 2 * a[i] + i;
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;; if (r > 0)
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;; // 30% of iterations
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;; x -= r;
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;; }
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;; return x;
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;;}
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define double @small_gradient(i32 %n, double %x, ptr nocapture %a) {
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; CHECK-LABEL: @small_gradient(
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; CHECK-NEXT: entry:
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; CHECK-NEXT: [[CMP8:%.*]] = icmp sgt i32 [[N:%.*]], 0
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; CHECK-NEXT: br i1 [[CMP8]], label [[FOR_BODY_PREHEADER:%.*]], label [[FOR_COND_CLEANUP:%.*]]
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; CHECK: for.body.preheader:
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; CHECK-NEXT: [[WIDE_TRIP_COUNT:%.*]] = zext i32 [[N]] to i64
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; CHECK-NEXT: br label [[FOR_BODY:%.*]]
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; CHECK: for.cond.cleanup:
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; CHECK-NEXT: [[X_ADDR_0_LCSSA:%.*]] = phi double [ [[X:%.*]], [[ENTRY:%.*]] ], [ [[X_ADDR_1:%.*]], [[FOR_BODY]] ]
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; CHECK-NEXT: ret double [[X_ADDR_0_LCSSA]]
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; CHECK: for.body:
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; CHECK-NEXT: [[INDVARS_IV:%.*]] = phi i64 [ 0, [[FOR_BODY_PREHEADER]] ], [ [[INDVARS_IV_NEXT:%.*]], [[FOR_BODY]] ]
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; CHECK-NEXT: [[X_ADDR_010:%.*]] = phi double [ [[X]], [[FOR_BODY_PREHEADER]] ], [ [[X_ADDR_1]], [[FOR_BODY]] ]
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; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds double, ptr [[A:%.*]], i64 [[INDVARS_IV]]
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; CHECK-NEXT: [[TMP0:%.*]] = load double, ptr [[ARRAYIDX]], align 8
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; CHECK-NEXT: [[TMP1:%.*]] = call double @llvm.fmuladd.f64(double [[TMP0]], double 2.000000e+00, double 1.000000e+00)
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; CHECK-NEXT: [[CMP1:%.*]] = fcmp ogt double [[TMP1]], 0.000000e+00
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; CHECK-NEXT: [[SUB:%.*]] = select i1 [[CMP1]], double [[TMP1]], double 0.000000e+00, !prof [[PROF28:![0-9]+]]
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; CHECK-NEXT: [[X_ADDR_1]] = fsub double [[X_ADDR_010]], [[SUB]]
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; CHECK-NEXT: [[INDVARS_IV_NEXT]] = add nuw nsw i64 [[INDVARS_IV]], 1
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; CHECK-NEXT: [[EXITCOND_NOT:%.*]] = icmp eq i64 [[INDVARS_IV_NEXT]], [[WIDE_TRIP_COUNT]]
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; CHECK-NEXT: br i1 [[EXITCOND_NOT]], label [[FOR_COND_CLEANUP]], label [[FOR_BODY]]
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;
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entry:
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%cmp8 = icmp sgt i32 %n, 0
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br i1 %cmp8, label %for.body.preheader, label %for.cond.cleanup
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for.body.preheader: ; preds = %entry
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%wide.trip.count = zext i32 %n to i64
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br label %for.body
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for.cond.cleanup: ; preds = %for.body, %entry
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%x.addr.0.lcssa = phi double [ %x, %entry ], [ %x.addr.1, %for.body ]
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ret double %x.addr.0.lcssa
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for.body: ; preds = %for.body.preheader, %for.body
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%indvars.iv = phi i64 [ 0, %for.body.preheader ], [ %indvars.iv.next, %for.body ]
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%x.addr.010 = phi double [ %x, %for.body.preheader ], [ %x.addr.1, %for.body ]
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%arrayidx = getelementptr inbounds double, ptr %a, i64 %indvars.iv
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%0 = load double, ptr %arrayidx, align 8
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%1 = call double @llvm.fmuladd.f64(double %0, double 2.000000e+00, double 1.000000e+00)
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%cmp1 = fcmp ogt double %1, 0.000000e+00
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%sub = select i1 %cmp1, double %1, double 0.000000e+00, !prof !28
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%x.addr.1 = fsub double %x.addr.010, %sub
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%indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
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%exitcond.not = icmp eq i64 %indvars.iv.next, %wide.trip.count
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br i1 %exitcond.not, label %for.cond.cleanup, label %for.body
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}
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;; One select on the critical path and one off the critical path.
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;; Loop-level analysis should decide to form a branch only for
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;; the select on the critical path.
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@ -511,9 +447,6 @@ for.body: ; preds = %for.body.preheader,
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; Function Attrs: nounwind readnone speculatable willreturn
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declare void @llvm.dbg.value(metadata, metadata, metadata)
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; Function Attrs: mustprogress nofree nosync nounwind readnone speculatable willreturn
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declare double @llvm.fmuladd.f64(double, double, double)
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!llvm.module.flags = !{!0, !26, !27}
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!0 = !{i32 1, !"ProfileSummary", !1}
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!1 = !{!2, !3, !4, !5, !6, !7, !8, !9}
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