forked from OSchip/llvm-project
LegalizeDAG: Fix ExpandFCOPYSIGN assuming the same type on both inputs
llvm-svn: 261306
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1aff022c9b
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848e79c578
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@ -1634,6 +1634,7 @@ struct FloatSignAsInt {
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MachinePointerInfo FloatPointerInfo;
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MachinePointerInfo FloatPointerInfo;
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SDValue IntValue;
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SDValue IntValue;
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APInt SignMask;
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APInt SignMask;
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uint8_t SignBit;
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};
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};
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}
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}
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@ -1650,6 +1651,7 @@ void SelectionDAGLegalize::getSignAsIntValue(FloatSignAsInt &State,
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if (TLI.isTypeLegal(IVT)) {
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if (TLI.isTypeLegal(IVT)) {
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State.IntValue = DAG.getNode(ISD::BITCAST, DL, IVT, Value);
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State.IntValue = DAG.getNode(ISD::BITCAST, DL, IVT, Value);
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State.SignMask = APInt::getSignBit(NumBits);
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State.SignMask = APInt::getSignBit(NumBits);
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State.SignBit = NumBits - 1;
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return;
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return;
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}
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}
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@ -1686,6 +1688,7 @@ void SelectionDAGLegalize::getSignAsIntValue(FloatSignAsInt &State,
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IntPtr, State.IntPointerInfo, MVT::i8,
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IntPtr, State.IntPointerInfo, MVT::i8,
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false, false, false, 0);
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false, false, false, 0);
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State.SignMask = APInt::getOneBitSet(LoadTy.getSizeInBits(), 7);
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State.SignMask = APInt::getOneBitSet(LoadTy.getSizeInBits(), 7);
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State.SignBit = 7;
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}
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}
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/// Replace the integer value produced by getSignAsIntValue() with a new value
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/// Replace the integer value produced by getSignAsIntValue() with a new value
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@ -1728,15 +1731,38 @@ SDValue SelectionDAGLegalize::ExpandFCOPYSIGN(SDNode *Node) const {
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return DAG.getSelect(DL, FloatVT, Cond, NegValue, AbsValue);
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return DAG.getSelect(DL, FloatVT, Cond, NegValue, AbsValue);
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}
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}
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// Transform values to integer, copy the sign bit and transform back.
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// Transform Mag value to integer, and clear the sign bit.
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FloatSignAsInt MagAsInt;
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FloatSignAsInt MagAsInt;
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getSignAsIntValue(MagAsInt, DL, Mag);
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getSignAsIntValue(MagAsInt, DL, Mag);
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assert(SignAsInt.SignMask == MagAsInt.SignMask);
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EVT MagVT = MagAsInt.IntValue.getValueType();
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SDValue ClearSignMask = DAG.getConstant(~SignAsInt.SignMask, DL, IntVT);
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SDValue ClearSignMask = DAG.getConstant(~MagAsInt.SignMask, DL, MagVT);
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SDValue ClearedSign = DAG.getNode(ISD::AND, DL, IntVT, MagAsInt.IntValue,
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SDValue ClearedSign = DAG.getNode(ISD::AND, DL, MagVT, MagAsInt.IntValue,
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ClearSignMask);
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ClearSignMask);
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SDValue CopiedSign = DAG.getNode(ISD::OR, DL, IntVT, ClearedSign, SignBit);
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// Get the signbit at the right position for MagAsInt.
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int ShiftAmount = SignAsInt.SignBit - MagAsInt.SignBit;
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if (SignBit.getValueSizeInBits() > ClearedSign.getValueSizeInBits()) {
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if (ShiftAmount > 0) {
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SDValue ShiftCnst = DAG.getConstant(ShiftAmount, DL, IntVT);
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SignBit = DAG.getNode(ISD::SRL, DL, IntVT, SignBit, ShiftCnst);
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} else if (ShiftAmount < 0) {
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SDValue ShiftCnst = DAG.getConstant(-ShiftAmount, DL, IntVT);
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SignBit = DAG.getNode(ISD::SHL, DL, IntVT, SignBit, ShiftCnst);
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}
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SignBit = DAG.getNode(ISD::TRUNCATE, DL, MagVT, SignBit);
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} else if (SignBit.getValueSizeInBits() < ClearedSign.getValueSizeInBits()) {
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SignBit = DAG.getNode(ISD::ZERO_EXTEND, DL, MagVT, SignBit);
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if (ShiftAmount > 0) {
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SDValue ShiftCnst = DAG.getConstant(ShiftAmount, DL, MagVT);
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SignBit = DAG.getNode(ISD::SRL, DL, MagVT, SignBit, ShiftCnst);
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} else if (ShiftAmount < 0) {
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SDValue ShiftCnst = DAG.getConstant(-ShiftAmount, DL, MagVT);
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SignBit = DAG.getNode(ISD::SHL, DL, MagVT, SignBit, ShiftCnst);
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}
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}
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// Store the part with the modified sign and convert back to float.
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SDValue CopiedSign = DAG.getNode(ISD::OR, DL, MagVT, ClearedSign, SignBit);
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return modifySignAsInt(MagAsInt, DL, CopiedSign);
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return modifySignAsInt(MagAsInt, DL, CopiedSign);
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}
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}
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@ -0,0 +1,23 @@
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; RUN: llc -o - %s | FileCheck %s
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; Check that selection dag legalization of fcopysign works in cases with
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; different modes for the arguments.
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target triple = "aarch64--"
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declare fp128 @llvm.copysign.f128(fp128, fp128)
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@val = global double zeroinitializer, align 8
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; CHECK-LABEL: copysign0
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; CHECK: ldr [[REG:x[0-9]+]], [x8, :lo12:val]
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; CHECK: and [[ANDREG:x[0-9]+]], [[REG]], #0x8000000000000000
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; CHECK: lsr x[[LSRREGNUM:[0-9]+]], [[ANDREG]], #56
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; CHECK: bfxil w[[LSRREGNUM]], w{{[0-9]+}}, #0, #7
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; CHECK: strb w[[LSRREGNUM]],
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; CHECK: ldr q{{[0-9]+}},
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define fp128 @copysign0() {
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entry:
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%v = load double, double* @val, align 8
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%conv = fpext double %v to fp128
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%call = tail call fp128 @llvm.copysign.f128(fp128 0xL00000000000000007FFF000000000000, fp128 %conv) #2
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ret fp128 %call
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}
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