forked from OSchip/llvm-project
[llvm-mca] Remove const from a bunch of ArrayRef. NFC
llvm-svn: 328018
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c2dbd677bd
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@ -150,7 +150,7 @@ void RegisterFile::collectWrites(SmallVectorImpl<WriteState *> &Writes,
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}
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}
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unsigned RegisterFile::isAvailable(const ArrayRef<unsigned> Regs) const {
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unsigned RegisterFile::isAvailable(ArrayRef<unsigned> Regs) const {
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SmallVector<unsigned, 4> NumTemporaries(getNumRegisterFiles());
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// Find how many new mappings must be created for each register file.
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@ -134,7 +134,7 @@ public:
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// For example: if all register files are available, then the response mask
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// is a bitmask of all zeroes. If Instead register file #1 is not available,
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// then the response mask is 0b10.
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unsigned isAvailable(const llvm::ArrayRef<unsigned> Regs) const;
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unsigned isAvailable(llvm::ArrayRef<unsigned> Regs) const;
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void collectWrites(llvm::SmallVectorImpl<WriteState *> &Writes,
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unsigned RegID) const;
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void updateOnRead(ReadState &RS, unsigned RegID);
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@ -48,8 +48,8 @@ public:
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LastGenericEventType,
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};
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HWInstructionEvent(unsigned Type, unsigned Index)
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: Type(Type), Index(Index) {}
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HWInstructionEvent(unsigned type, unsigned index)
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: Type(type), Index(index) {}
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// The event type. The exact meaning depends on the subtarget.
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const unsigned Type;
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@ -61,11 +61,11 @@ class HWInstructionIssuedEvent : public HWInstructionEvent {
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public:
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using ResourceRef = std::pair<uint64_t, uint64_t>;
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HWInstructionIssuedEvent(
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unsigned Index, const llvm::ArrayRef<std::pair<ResourceRef, unsigned>> UR)
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unsigned Index, llvm::ArrayRef<std::pair<ResourceRef, unsigned>> UR)
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: HWInstructionEvent(HWInstructionEvent::Issued, Index),
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UsedResources(UR) {}
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const llvm::ArrayRef<std::pair<ResourceRef, unsigned>> UsedResources;
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llvm::ArrayRef<std::pair<ResourceRef, unsigned>> UsedResources;
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};
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// A HWStallEvent represents a pipeline stall caused by the lack of hardware
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@ -26,7 +26,7 @@ using namespace llvm;
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static void
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initializeUsedResources(InstrDesc &ID, const MCSchedClassDesc &SCDesc,
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const MCSubtargetInfo &STI,
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const ArrayRef<uint64_t> ProcResourceMasks) {
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ArrayRef<uint64_t> ProcResourceMasks) {
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const MCSchedModel &SM = STI.getSchedModel();
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// Populate resources consumed.
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@ -124,7 +124,7 @@ void ResourceManager::release(ResourceRef RR) {
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}
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ResourceStateEvent
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ResourceManager::canBeDispatched(const ArrayRef<uint64_t> Buffers) const {
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ResourceManager::canBeDispatched(ArrayRef<uint64_t> Buffers) const {
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ResourceStateEvent Result = ResourceStateEvent::RS_BUFFER_AVAILABLE;
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for (uint64_t Buffer : Buffers) {
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Result = isBufferAvailable(Buffer);
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@ -134,7 +134,7 @@ ResourceManager::canBeDispatched(const ArrayRef<uint64_t> Buffers) const {
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return Result;
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}
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void ResourceManager::reserveBuffers(const ArrayRef<uint64_t> Buffers) {
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void ResourceManager::reserveBuffers(ArrayRef<uint64_t> Buffers) {
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for (const uint64_t R : Buffers) {
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reserveBuffer(R);
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ResourceState &Resource = *Resources[R];
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@ -145,7 +145,7 @@ void ResourceManager::reserveBuffers(const ArrayRef<uint64_t> Buffers) {
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}
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}
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void ResourceManager::releaseBuffers(const ArrayRef<uint64_t> Buffers) {
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void ResourceManager::releaseBuffers(ArrayRef<uint64_t> Buffers) {
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for (const uint64_t R : Buffers)
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releaseBuffer(R);
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}
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@ -423,7 +423,7 @@ void Scheduler::updateIssuedQueue() {
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}
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void Scheduler::notifyInstructionIssued(
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unsigned Index, const ArrayRef<std::pair<ResourceRef, unsigned>> &Used) {
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unsigned Index, ArrayRef<std::pair<ResourceRef, unsigned>> Used) {
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DEBUG({
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dbgs() << "[E] Instruction Issued: " << Index << '\n';
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for (const std::pair<ResourceRef, unsigned> &Resource : Used) {
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@ -339,10 +339,10 @@ public:
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// Consume a slot in every buffered resource from array 'Buffers'. Resource
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// units that are dispatch hazards (i.e. BufferSize=0) are marked as reserved.
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void reserveBuffers(const llvm::ArrayRef<uint64_t> Buffers);
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void reserveBuffers(llvm::ArrayRef<uint64_t> Buffers);
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// Release buffer entries previously allocated by method reserveBuffers.
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void releaseBuffers(const llvm::ArrayRef<uint64_t> Buffers);
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void releaseBuffers(llvm::ArrayRef<uint64_t> Buffers);
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void reserveResource(uint64_t ResourceID) {
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ResourceState &Resource = *Resources[ResourceID];
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@ -420,7 +420,7 @@ class Scheduler {
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void notifyInstructionIssued(
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unsigned Index,
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const llvm::ArrayRef<std::pair<ResourceRef, unsigned>> &Used);
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llvm::ArrayRef<std::pair<ResourceRef, unsigned>> Used);
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void notifyInstructionExecuted(unsigned Index);
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void notifyInstructionReady(unsigned Index);
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void notifyResourceAvailable(const ResourceRef &RR);
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