forked from OSchip/llvm-project
Add test case for r311511
This also changes the TailDuplicator to be configured explicitely pre/post regalloc rather than relying on the isSSA() flag. This was necessary to have `llc -run-pass` work reliably. llvm-svn: 311520
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@ -61,13 +61,14 @@ class TailDuplicator {
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public:
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/// Prepare to run on a specific machine function.
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/// @param MF - Function that will be processed
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/// @param PreRegAlloc - true if used before register allocation
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/// @param MBPI - Branch Probability Info. Used to propagate correct
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/// probabilities when modifying the CFG.
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/// @param LayoutMode - When true, don't use the existing layout to make
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/// decisions.
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/// @param TailDupSize - Maxmimum size of blocks to tail-duplicate. Zero
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/// default implies using the command line value TailDupSize.
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void initMF(MachineFunction &MF,
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void initMF(MachineFunction &MF, bool PreRegAlloc,
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const MachineBranchProbabilityInfo *MBPI,
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bool LayoutMode, unsigned TailDupSize = 0);
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@ -2729,7 +2729,8 @@ bool MachineBlockPlacement::runOnMachineFunction(MachineFunction &MF) {
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MPDT = &getAnalysis<MachinePostDominatorTree>();
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if (MF.getFunction()->optForSize())
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TailDupSize = 1;
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TailDup.initMF(MF, MBPI, /* LayoutMode */ true, TailDupSize);
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bool PreRegAlloc = false;
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TailDup.initMF(MF, PreRegAlloc, MBPI, /* LayoutMode */ true, TailDupSize);
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precomputeTriangleChains();
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}
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@ -52,7 +52,10 @@ bool TailDuplicatePass::runOnMachineFunction(MachineFunction &MF) {
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auto MBPI = &getAnalysis<MachineBranchProbabilityInfo>();
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Duplicator.initMF(MF, MBPI, /* LayoutMode */ false);
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// TODO: Querying isSSA() to determine pre-/post-regalloc is fragile, better
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// split this into two passes instead.
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bool PreRegAlloc = MF.getRegInfo().isSSA();
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Duplicator.initMF(MF, PreRegAlloc, MBPI, /* LayoutMode */ false);
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bool MadeChange = false;
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while (Duplicator.tailDuplicateBlocks())
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@ -75,7 +75,7 @@ static cl::opt<bool>
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static cl::opt<unsigned> TailDupLimit("tail-dup-limit", cl::init(~0U),
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cl::Hidden);
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void TailDuplicator::initMF(MachineFunction &MFin,
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void TailDuplicator::initMF(MachineFunction &MFin, bool PreRegAlloc,
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const MachineBranchProbabilityInfo *MBPIin,
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bool LayoutModeIn, unsigned TailDupSizeIn) {
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MF = &MFin;
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@ -89,7 +89,7 @@ void TailDuplicator::initMF(MachineFunction &MFin,
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assert(MBPI != nullptr && "Machine Branch Probability Info required");
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LayoutMode = LayoutModeIn;
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PreRegAlloc = MRI->isSSA();
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this->PreRegAlloc = PreRegAlloc;
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}
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static void VerifyPHIs(MachineFunction &MF, bool CheckExtra) {
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@ -0,0 +1,36 @@
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# RUN: llc -o - %s -run-pass=block-placement -mtriple=thumbv7k-apple-ios8.0.0 -verify-machineinstrs -O3 | FileCheck %s
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---
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# CHECK-LABEL: name: func
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# Make sure the bundle gets duplicated correctly
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# CHECK: BUNDLE implicit-def dead %itstate, implicit-def %cpsr, implicit killed %r0, implicit killed %cpsr {
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# CHECK: t2IT 1, 24, implicit-def %itstate
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# CHECK: t2CMPri killed %r0, 9, 1, killed %cpsr, implicit-def %cpsr, implicit internal killed %itstate
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# CHECK: }
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# CHECK: BUNDLE implicit-def dead %itstate, implicit-def %cpsr, implicit killed %r0, implicit killed %cpsr {
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# CHECK: t2IT 1, 24, implicit-def %itstate
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# CHECK: t2CMPri killed %r0, 9, 1, killed %cpsr, implicit-def %cpsr, implicit internal killed %itstate
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# CHECK: }
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name: func
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tracksRegLiveness: true
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body: |
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bb.0:
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liveins: %r0, %lr, %r7
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bb.1:
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liveins: %r0
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t2CMPri %r0, 32, 14, _, implicit-def %cpsr
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BUNDLE implicit-def dead %itstate, implicit-def %cpsr, implicit killed %r0, implicit killed %cpsr {
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t2IT 1, 24, implicit-def %itstate
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t2CMPri killed %r0, 9, 1, killed %cpsr, implicit-def %cpsr, implicit internal killed %itstate
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}
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t2Bcc %bb.3, 1, killed %cpsr
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bb.2:
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%r0 = IMPLICIT_DEF
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t2B %bb.1, 14, _
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bb.3:
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%r0 = IMPLICIT_DEF
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t2B %bb.1, 14, _
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...
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