forked from OSchip/llvm-project
[PowerPC] SemaChecking for darn family of builtins
The __darn family of builtins are only available on Pwr9, and only __darn_32 is available on both 64 and 32 bit, while the rest are only available on 64 bit. The patch adds sema checking for these builtins and separate the __darn_32's 32 bit test cases. Differential revision: https://reviews.llvm.org/D110282
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@ -3295,6 +3295,8 @@ static bool isPPC_64Builtin(unsigned BuiltinID) {
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case PPC::BI__builtin_ppc_insert_exp:
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case PPC::BI__builtin_ppc_extract_sig:
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case PPC::BI__builtin_ppc_addex:
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case PPC::BI__builtin_darn:
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case PPC::BI__builtin_darn_raw:
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return true;
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}
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return false;
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@ -3478,6 +3480,11 @@ bool Sema::CheckPPCBuiltinFunctionCall(const TargetInfo &TI, unsigned BuiltinID,
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case PPC::BI__builtin_altivec_vcntmbw:
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case PPC::BI__builtin_altivec_vcntmbd:
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return SemaBuiltinConstantArgRange(TheCall, 1, 0, 1);
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case PPC::BI__builtin_darn:
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case PPC::BI__builtin_darn_raw:
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case PPC::BI__builtin_darn_32:
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return SemaFeatureCheck(*this, TheCall, "isa-v30-instructions",
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diag::err_ppc_builtin_only_on_arch, "9");
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#define CUSTOM_BUILTIN(Name, Intr, Types, Acc) \
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case PPC::BI__builtin_##Name: \
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return SemaBuiltinPPCMMACall(TheCall, Types);
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@ -1,10 +1,13 @@
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// REQUIRES: powerpc-registered-target
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// RUN: %clang_cc1 -triple powerpc64-unknown-unknown \
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// RUN: -emit-llvm %s -o - -target-cpu pwr9 | FileCheck %s
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// RUN: -emit-llvm %s -o - -target-cpu pwr9 | \
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// RUN: FileCheck %s --check-prefix=CHECK-64
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// RUN: %clang_cc1 -triple powerpc64le-unknown-unknown \
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// RUN: -emit-llvm %s -o - -target-cpu pwr9 | FileCheck %s
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// RUN: -emit-llvm %s -o - -target-cpu pwr9 | \
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// RUN: FileCheck %s --check-prefix=CHECK-64
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// RUN: %clang_cc1 -triple powerpc64-unknown-aix \
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// RUN: -emit-llvm %s -o - -target-cpu pwr9 | FileCheck %s
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// RUN: -emit-llvm %s -o - -target-cpu pwr9 | \
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// RUN: FileCheck %s --check-prefix=CHECK-64
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// RUN: %clang_cc1 -triple powerpc-unknown-unknown \
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// RUN: -emit-llvm %s -o - -target-cpu pwr9 | FileCheck %s
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// RUN: %clang_cc1 -triple powerpcle-unknown-unknown \
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@ -15,21 +18,23 @@
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// The darn class of builtins are Power 9 and up and only darn_32 works in
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// 32 bit mode.
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// CHECK-LABEL: @testdarn(
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// CHECK: [[TMP0:%.*]] = call i64 @llvm.ppc.darn()
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// CHECK-NEXT: ret i64 [[TMP0]]
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#ifdef __PPC64__
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// CHECK-64-LABEL: @testdarn(
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// CHECK-64: [[TMP0:%.*]] = call i64 @llvm.ppc.darn()
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// CHECK-64-NEXT: ret i64 [[TMP0]]
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//
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long long testdarn(void) {
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return __darn();
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}
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// CHECK-LABEL: @testdarn_raw(
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// CHECK: [[TMP0:%.*]] = call i64 @llvm.ppc.darnraw()
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// CHECK-NEXT: ret i64 [[TMP0]]
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// CHECK-64-LABEL: @testdarn_raw(
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// CHECK-64: [[TMP0:%.*]] = call i64 @llvm.ppc.darnraw()
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// CHECK-64-NEXT: ret i64 [[TMP0]]
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//
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long long testdarn_raw(void) {
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return __darn_raw();
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}
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#endif
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// CHECK-LABEL: @testdarn_32(
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// CHECK: [[TMP0:%.*]] = call i32 @llvm.ppc.darn32()
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@ -96,6 +96,14 @@ long long testdivde(long long dividend, long long divisor) {
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unsigned long long testdivdeu(unsigned long long dividend, unsigned long long divisor) {
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return __divdeu(dividend, divisor); //expected-error {{this builtin is only available on 64-bit targets}}
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}
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int test_darn() {
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return __darn(); //expected-error {{this builtin is only available on 64-bit targets}}
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}
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int test_darn_raw() {
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return __darn_raw(); //expected-error {{this builtin is only available on 64-bit targets}}
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}
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#endif
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unsigned long test_mfspr(void) {
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@ -36,16 +36,3 @@ void test_builtin_ppc_flm() {
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// CHECK: call double @llvm.ppc.setflm(double %1)
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res = __builtin_setflm(res);
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}
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void test_builtin_ppc_darn() {
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volatile long res;
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volatile int x;
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// CHECK: call i64 @llvm.ppc.darn()
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res = __builtin_darn();
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// CHECK: call i64 @llvm.ppc.darnraw()
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res = __builtin_darn_raw();
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// CHECK: call i32 @llvm.ppc.darn32()
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x = __builtin_darn_32();
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}
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