forked from OSchip/llvm-project
[X86] Regenerate alias-static-alloca test checks to make D65354 diff easier
I've manually added the stack offsets back as these are worth keeping - we really need a way for update_llc_test_checks.py not to mask out useful address math llvm-svn: 367424
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@ -1,22 +1,22 @@
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; RUN: llc -o - -mtriple=x86_64-linux-gnu %s | FileCheck %s
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target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
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target triple = "x86_64-unknown-linux-gnu"
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; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc < %s -mtriple=x86_64-linux-gnu | FileCheck %s
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; We should be able to bypass the load values to their corresponding
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; stores here.
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; CHECK-LABEL: foo
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; CHECK-DAG: movl %esi, -8(%rsp)
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; CHECK-DAG: movl %ecx, -16(%rsp)
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; CHECK-DAG: movl %edi, -4(%rsp)
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; CHECK-DAG: movl %edx, -12(%rsp)
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; CHECK: leal
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; CHECK: addl
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; CHECK: addl
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; CHECK: retq
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define i32 @foo(i32 %a, i32 %b, i32 %c, i32 %d) {
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; CHECK-LABEL: foo:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: # kill: def $esi killed $esi def $rsi
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; CHECK-NEXT: # kill: def $edi killed $edi def $rdi
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; CHECK-NEXT: movl %esi, -8(%rsp)
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; CHECK-NEXT: movl %ecx, -16(%rsp)
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; CHECK-NEXT: movl %edi, -4(%rsp)
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; CHECK-NEXT: movl %edx, -12(%rsp)
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; CHECK-NEXT: leal (%rdi,%rsi), %eax
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; CHECK-NEXT: addl %edx, %eax
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; CHECK-NEXT: addl %ecx, %eax
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; CHECK-NEXT: retq
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entry:
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%a0 = alloca i32
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%a1 = alloca i32
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