forked from OSchip/llvm-project
Sirish Pande
parent
84dce5d0c2
commit
83ccb6ce08
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
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@ -12,18 +12,28 @@
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// Optimized with intrinisics accumulates
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//
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def : Pat <(mul DoubleRegs:$src1, DoubleRegs:$src2),
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(i64
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(COMBINE_rr
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(Hexagon_M2_maci
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(Hexagon_M2_maci (EXTRACT_SUBREG (MPYU64 (EXTRACT_SUBREG DoubleRegs:$src1, subreg_loreg),
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(EXTRACT_SUBREG DoubleRegs:$src2, subreg_loreg)),
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subreg_hireg),
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(EXTRACT_SUBREG DoubleRegs:$src1, subreg_loreg),
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(EXTRACT_SUBREG DoubleRegs:$src2, subreg_hireg)),
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(EXTRACT_SUBREG DoubleRegs:$src2, subreg_loreg),
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(EXTRACT_SUBREG DoubleRegs:$src1, subreg_hireg)),
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(EXTRACT_SUBREG (MPYU64 (EXTRACT_SUBREG DoubleRegs:$src1, subreg_loreg),
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(EXTRACT_SUBREG DoubleRegs:$src2, subreg_loreg)),
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subreg_loreg))>;
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(HEXAGON_M2_maci
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(HEXAGON_M2_maci
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(i32
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(EXTRACT_SUBREG
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(i64
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(MPYU64 (i32 (EXTRACT_SUBREG (i64 DoubleRegs:$src1),
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subreg_loreg)),
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(i32 (EXTRACT_SUBREG (i64 DoubleRegs:$src2),
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subreg_loreg)))),
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subreg_hireg)),
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(i32 (EXTRACT_SUBREG (i64 DoubleRegs:$src1), subreg_loreg)),
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(i32 (EXTRACT_SUBREG (i64 DoubleRegs:$src2), subreg_hireg))),
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(i32 (EXTRACT_SUBREG (i64 DoubleRegs:$src2), subreg_loreg)),
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(i32 (EXTRACT_SUBREG (i64 DoubleRegs:$src1), subreg_hireg))),
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(i32
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(EXTRACT_SUBREG
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(i64
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(MPYU64 (i32 (EXTRACT_SUBREG (i64 DoubleRegs:$src1), subreg_loreg)),
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(i32 (EXTRACT_SUBREG (i64 DoubleRegs:$src2),
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subreg_loreg)))), subreg_loreg))))>;
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@ -0,0 +1,395 @@
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class sf_SInst_sf<string opc, Intrinsic IntID>
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: SInst<(outs IntRegs:$dst), (ins IntRegs:$src1),
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!strconcat("$dst = ", !strconcat(opc , "($src1)")),
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[(set IntRegs:$dst, (IntID IntRegs:$src1))]>;
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class si_SInst_sf<string opc, Intrinsic IntID>
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: SInst<(outs IntRegs:$dst), (ins IntRegs:$src1),
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!strconcat("$dst = ", !strconcat(opc , "($src1)")),
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[(set IntRegs:$dst, (IntID IntRegs:$src1))]>;
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class sf_SInst_si<string opc, Intrinsic IntID>
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: SInst<(outs IntRegs:$dst), (ins IntRegs:$src1),
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!strconcat("$dst = ", !strconcat(opc , "($src1)")),
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[(set IntRegs:$dst, (IntID IntRegs:$src1))]>;
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class sf_SInst_di<string opc, Intrinsic IntID>
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: SInst<(outs IntRegs:$dst), (ins DoubleRegs:$src1),
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!strconcat("$dst = ", !strconcat(opc , "($src1)")),
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[(set IntRegs:$dst, (IntID DoubleRegs:$src1))]>;
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class sf_SInst_df<string opc, Intrinsic IntID>
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: SInst<(outs IntRegs:$dst), (ins DoubleRegs:$src1),
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!strconcat("$dst = ", !strconcat(opc , "($src1)")),
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[(set IntRegs:$dst, (IntID DoubleRegs:$src1))]>;
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class si_SInst_df<string opc, Intrinsic IntID>
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: SInst<(outs IntRegs:$dst), (ins DoubleRegs:$src1),
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!strconcat("$dst = ", !strconcat(opc , "($src1)")),
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[(set IntRegs:$dst, (IntID DoubleRegs:$src1))]>;
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class df_SInst_sf<string opc, Intrinsic IntID>
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: SInst<(outs DoubleRegs:$dst), (ins IntRegs:$src1),
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!strconcat("$dst = ", !strconcat(opc , "($src1)")),
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[(set DoubleRegs:$dst, (IntID IntRegs:$src1))]>;
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class di_SInst_sf<string opc, Intrinsic IntID>
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: SInst<(outs DoubleRegs:$dst), (ins IntRegs:$src1),
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!strconcat("$dst = ", !strconcat(opc , "($src1)")),
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[(set DoubleRegs:$dst, (IntID IntRegs:$src1))]>;
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class df_SInst_si<string opc, Intrinsic IntID>
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: SInst<(outs DoubleRegs:$dst), (ins IntRegs:$src1),
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!strconcat("$dst = ", !strconcat(opc , "($src1)")),
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[(set DoubleRegs:$dst, (IntID IntRegs:$src1))]>;
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class df_SInst_df<string opc, Intrinsic IntID>
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: SInst<(outs DoubleRegs:$dst), (ins DoubleRegs:$src1),
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!strconcat("$dst = ", !strconcat(opc , "($src1)")),
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[(set DoubleRegs:$dst, (IntID DoubleRegs:$src1))]>;
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class di_SInst_df<string opc, Intrinsic IntID>
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: SInst<(outs DoubleRegs:$dst), (ins DoubleRegs:$src1),
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!strconcat("$dst = ", !strconcat(opc , "($src1)")),
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[(set DoubleRegs:$dst, (IntID DoubleRegs:$src1))]>;
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class df_SInst_di<string opc, Intrinsic IntID>
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: SInst<(outs DoubleRegs:$dst), (ins DoubleRegs:$src1),
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!strconcat("$dst = ", !strconcat(opc , "($src1)")),
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[(set DoubleRegs:$dst, (IntID DoubleRegs:$src1))]>;
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class sf_MInst_sfsf<string opc, Intrinsic IntID>
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: MInst<(outs IntRegs:$dst), (ins IntRegs:$src1, IntRegs:$src2),
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!strconcat("$dst = ", !strconcat(opc , "($src1, $src2)")),
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[(set IntRegs:$dst, (IntID IntRegs:$src1, IntRegs:$src2))]>;
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class df_MInst_dfdf<string opc, Intrinsic IntID>
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: MInst<(outs DoubleRegs:$dst), (ins DoubleRegs:$src1, DoubleRegs:$src2),
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!strconcat("$dst = ", !strconcat(opc , "($src1, $src2)")),
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[(set DoubleRegs:$dst, (IntID DoubleRegs:$src1, DoubleRegs:$src2))]>;
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class qi_ALU64_dfdf<string opc, Intrinsic IntID>
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: ALU64_rr<(outs PredRegs:$dst), (ins DoubleRegs:$src1, DoubleRegs:$src2),
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!strconcat("$dst = ", !strconcat(opc , "($src1, $src2)")),
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[(set PredRegs:$dst, (IntID DoubleRegs:$src1, DoubleRegs:$src2))]>;
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class qi_ALU64_dfu5<string opc, Intrinsic IntID>
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: ALU64_ri<(outs PredRegs:$dst), (ins DoubleRegs:$src1, u5Imm:$src2),
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!strconcat("$dst = ", !strconcat(opc , "($src1, #$src2)")),
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[(set PredRegs:$dst, (IntID DoubleRegs:$src1, imm:$src2))]>;
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class sf_MInst_sfsfsf_acc<string opc, Intrinsic IntID>
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: MInst_acc<(outs IntRegs:$dst), (ins IntRegs:$src1, IntRegs:$src2,
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IntRegs:$dst2),
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!strconcat("$dst += ", !strconcat(opc ,
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"($src1, $src2)")),
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[(set IntRegs:$dst, (IntID IntRegs:$src1,
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IntRegs:$src2, IntRegs:$dst2))],
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"$dst2 = $dst">;
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class sf_MInst_sfsfsf_nac<string opc, Intrinsic IntID>
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: MInst_acc<(outs IntRegs:$dst), (ins IntRegs:$src1, IntRegs:$src2,
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IntRegs:$dst2),
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!strconcat("$dst -= ", !strconcat(opc ,
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"($src1, $src2)")),
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[(set IntRegs:$dst, (IntID IntRegs:$src1,
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IntRegs:$src2, IntRegs:$dst2))],
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"$dst2 = $dst">;
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class sf_MInst_sfsfsfsi_sc<string opc, Intrinsic IntID>
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: MInst_acc<(outs IntRegs:$dst), (ins IntRegs:$dst2, IntRegs:$src1,
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IntRegs:$src2, IntRegs:$src3),
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!strconcat("$dst += ", !strconcat(opc ,
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"($src1, $src2, $src3):scale")),
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[(set IntRegs:$dst, (IntID IntRegs:$dst2, IntRegs:$src1,
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IntRegs:$src2, IntRegs:$src3))],
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"$dst2 = $dst">;
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class sf_MInst_sfsfsf_acc_lib<string opc, Intrinsic IntID>
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: MInst_acc<(outs IntRegs:$dst), (ins IntRegs:$src1, IntRegs:$src2,
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IntRegs:$dst2),
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!strconcat("$dst += ", !strconcat(opc ,
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"($src1, $src2):lib")),
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[(set IntRegs:$dst, (IntID IntRegs:$src1,
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IntRegs:$src2, IntRegs:$dst2))],
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"$dst2 = $dst">;
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class sf_MInst_sfsfsf_nac_lib<string opc, Intrinsic IntID>
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: MInst_acc<(outs IntRegs:$dst), (ins IntRegs:$src1, IntRegs:$src2,
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IntRegs:$dst2),
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!strconcat("$dst -= ", !strconcat(opc ,
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"($src1, $src2):lib")),
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[(set IntRegs:$dst, (IntID IntRegs:$src1,
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IntRegs:$src2, IntRegs:$dst2))],
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"$dst2 = $dst">;
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class df_MInst_dfdfdf_acc<string opc, Intrinsic IntID>
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: MInst_acc<(outs DoubleRegs:$dst), (ins DoubleRegs:$src1, DoubleRegs:$src2,
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DoubleRegs:$dst2),
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!strconcat("$dst += ", !strconcat(opc ,
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"($src1, $src2)")),
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[(set DoubleRegs:$dst, (IntID DoubleRegs:$src1,
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DoubleRegs:$src2, DoubleRegs:$dst2))],
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"$dst2 = $dst">;
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class df_MInst_dfdfdf_nac<string opc, Intrinsic IntID>
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: MInst_acc<(outs DoubleRegs:$dst), (ins DoubleRegs:$src1, DoubleRegs:$src2,
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DoubleRegs:$dst2),
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!strconcat("$dst -= ", !strconcat(opc ,
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"($src1, $src2)")),
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[(set DoubleRegs:$dst, (IntID DoubleRegs:$src1,
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DoubleRegs:$src2, DoubleRegs:$dst2))],
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"$dst2 = $dst">;
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class df_MInst_dfdfdfsi_sc<string opc, Intrinsic IntID>
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: MInst_acc<(outs DoubleRegs:$dst), (ins DoubleRegs:$dst2, DoubleRegs:$src1,
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DoubleRegs:$src2, IntRegs:$src3),
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!strconcat("$dst += ", !strconcat(opc ,
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"($src1, $src2, $src3):scale")),
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[(set DoubleRegs:$dst, (IntID DoubleRegs:$dst2, DoubleRegs:$src1,
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DoubleRegs:$src2, IntRegs:$src3))],
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"$dst2 = $dst">;
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class df_MInst_dfdfdf_acc_lib<string opc, Intrinsic IntID>
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: MInst_acc<(outs DoubleRegs:$dst), (ins DoubleRegs:$src1, DoubleRegs:$src2,
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DoubleRegs:$dst2),
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!strconcat("$dst += ", !strconcat(opc ,
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"($src1, $src2):lib")),
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[(set DoubleRegs:$dst, (IntID DoubleRegs:$src1,
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DoubleRegs:$src2, DoubleRegs:$dst2))],
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"$dst2 = $dst">;
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class df_MInst_dfdfdf_nac_lib<string opc, Intrinsic IntID>
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: MInst_acc<(outs DoubleRegs:$dst), (ins DoubleRegs:$src1, DoubleRegs:$src2,
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DoubleRegs:$dst2),
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!strconcat("$dst -= ", !strconcat(opc ,
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"($src1, $src2):lib")),
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[(set DoubleRegs:$dst, (IntID DoubleRegs:$src1,
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DoubleRegs:$src2, DoubleRegs:$dst2))],
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"$dst2 = $dst">;
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class qi_SInst_sfsf<string opc, Intrinsic IntID>
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: SInst<(outs PredRegs:$dst), (ins IntRegs:$src1, IntRegs:$src2),
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!strconcat("$dst = ", !strconcat(opc , "($src1, $src2)")),
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[(set PredRegs:$dst, (IntID IntRegs:$src1, IntRegs:$src2))]>;
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class qi_SInst_sfu5<string opc, Intrinsic IntID>
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: MInst<(outs PredRegs:$dst), (ins IntRegs:$src1, u5Imm:$src2),
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!strconcat("$dst = ", !strconcat(opc , "($src1, #$src2)")),
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[(set PredRegs:$dst, (IntID IntRegs:$src1, imm:$src2))]>;
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class sf_ALU64_u10_pos<string opc, Intrinsic IntID>
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: ALU64_ri<(outs IntRegs:$dst), (ins u10Imm:$src1),
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!strconcat("$dst = ", !strconcat(opc , "#$src1):pos")),
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[(set IntRegs:$dst, (IntID imm:$src1))]>;
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class sf_ALU64_u10_neg<string opc, Intrinsic IntID>
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: ALU64_ri<(outs IntRegs:$dst), (ins u10Imm:$src1),
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!strconcat("$dst = ", !strconcat(opc , "#$src1):neg")),
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[(set IntRegs:$dst, (IntID imm:$src1))]>;
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class df_ALU64_u10_pos<string opc, Intrinsic IntID>
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: ALU64_ri<(outs DoubleRegs:$dst), (ins u10Imm:$src1),
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!strconcat("$dst = ", !strconcat(opc , "#$src1):pos")),
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[(set DoubleRegs:$dst, (IntID imm:$src1))]>;
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class df_ALU64_u10_neg<string opc, Intrinsic IntID>
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: ALU64_ri<(outs DoubleRegs:$dst), (ins u10Imm:$src1),
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!strconcat("$dst = ", !strconcat(opc , "#$src1):neg")),
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[(set DoubleRegs:$dst, (IntID imm:$src1))]>;
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class di_MInst_diu6<string opc, Intrinsic IntID>
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: MInst<(outs DoubleRegs:$dst), (ins DoubleRegs:$src1, u6Imm:$src2),
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!strconcat("$dst = ", !strconcat(opc , "($src1, #$src2)")),
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[(set DoubleRegs:$dst, (IntID DoubleRegs:$src1, imm:$src2))]>;
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class di_MInst_diu4_rnd<string opc, Intrinsic IntID>
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: MInst<(outs DoubleRegs:$dst), (ins DoubleRegs:$src1, u4Imm:$src2),
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!strconcat("$dst = ", !strconcat(opc , "($src1, #$src2):rnd")),
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[(set DoubleRegs:$dst, (IntID DoubleRegs:$src1, imm:$src2))]>;
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class si_MInst_diu4_rnd_sat<string opc, Intrinsic IntID>
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: MInst<(outs IntRegs:$dst), (ins DoubleRegs:$src1, u4Imm:$src2),
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!strconcat("$dst = ", !strconcat(opc , "($src1, #$src2):rnd:sat")),
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[(set IntRegs:$dst, (IntID DoubleRegs:$src1, imm:$src2))]>;
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class si_SInst_diu4_sat<string opc, Intrinsic IntID>
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: SInst<(outs IntRegs:$dst), (ins DoubleRegs:$src1, u4Imm:$src2),
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!strconcat("$dst = ", !strconcat(opc , "($src1, #$src2):sat")),
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[(set IntRegs:$dst, (IntID DoubleRegs:$src1, imm:$src2))]>;
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def HEXAGON_C4_fastcorner9:
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qi_SInst_qiqi <"fastcorner9", int_hexagon_C4_fastcorner9>;
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def HEXAGON_C4_fastcorner9_not:
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qi_SInst_qiqi <"!fastcorner9", int_hexagon_C4_fastcorner9_not>;
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def HEXAGON_M5_vrmpybuu:
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di_MInst_didi <"vrmpybu", int_hexagon_M5_vrmpybuu>;
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def HEXAGON_M5_vrmacbuu:
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di_MInst_dididi_acc <"vrmpybu", int_hexagon_M5_vrmacbuu>;
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def HEXAGON_M5_vrmpybsu:
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di_MInst_didi <"vrmpybsu", int_hexagon_M5_vrmpybsu>;
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def HEXAGON_M5_vrmacbsu:
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di_MInst_dididi_acc <"vrmpybsu", int_hexagon_M5_vrmacbsu>;
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def HEXAGON_M5_vmpybuu:
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di_MInst_sisi <"vmpybu", int_hexagon_M5_vmpybuu>;
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def HEXAGON_M5_vmpybsu:
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di_MInst_sisi <"vmpybsu", int_hexagon_M5_vmpybsu>;
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def HEXAGON_M5_vmacbuu:
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di_MInst_disisi_acc <"vmpybu", int_hexagon_M5_vmacbuu>;
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def HEXAGON_M5_vmacbsu:
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di_MInst_disisi_acc <"vmpybsu", int_hexagon_M5_vmacbsu>;
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def HEXAGON_M5_vdmpybsu:
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di_MInst_didi_sat <"vdmpybsu", int_hexagon_M5_vdmpybsu>;
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def HEXAGON_M5_vdmacbsu:
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di_MInst_dididi_acc_sat <"vdmpybsu", int_hexagon_M5_vdmacbsu>;
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def HEXAGON_A5_vaddhubs:
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si_SInst_didi_sat <"vaddhub", int_hexagon_A5_vaddhubs>;
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def HEXAGON_S5_popcountp:
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si_SInst_di <"popcount", int_hexagon_S5_popcountp>;
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def HEXAGON_S5_asrhub_rnd_sat_goodsyntax:
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si_MInst_diu4_rnd_sat <"vasrhub", int_hexagon_S5_asrhub_rnd_sat_goodsyntax>;
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def HEXAGON_S5_asrhub_sat:
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si_SInst_diu4_sat <"vasrhub", int_hexagon_S5_asrhub_sat>;
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def HEXAGON_S5_vasrhrnd_goodsyntax:
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di_MInst_diu4_rnd <"vasrh", int_hexagon_S5_vasrhrnd_goodsyntax>;
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def HEXAGON_S2_asr_i_p_rnd:
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di_SInst_diu6 <"asr", int_hexagon_S2_asr_i_p_rnd>;
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def HEXAGON_S2_asr_i_p_rnd_goodsyntax:
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di_MInst_diu6 <"asrrnd", int_hexagon_S2_asr_i_p_rnd_goodsyntax>;
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def HEXAGON_F2_sfadd:
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sf_MInst_sfsf <"sfadd", int_hexagon_F2_sfadd>;
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def HEXAGON_F2_sfsub:
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sf_MInst_sfsf <"sfsub", int_hexagon_F2_sfsub>;
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def HEXAGON_F2_sfmpy:
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sf_MInst_sfsf <"sfmpy", int_hexagon_F2_sfmpy>;
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def HEXAGON_F2_sffma:
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sf_MInst_sfsfsf_acc <"sfmpy", int_hexagon_F2_sffma>;
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def HEXAGON_F2_sffma_sc:
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sf_MInst_sfsfsfsi_sc <"sfmpy", int_hexagon_F2_sffma_sc>;
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def HEXAGON_F2_sffms:
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sf_MInst_sfsfsf_nac <"sfmpy", int_hexagon_F2_sffms>;
|
||||
def HEXAGON_F2_sffma_lib:
|
||||
sf_MInst_sfsfsf_acc_lib <"sfmpy", int_hexagon_F2_sffma_lib>;
|
||||
def HEXAGON_F2_sffms_lib:
|
||||
sf_MInst_sfsfsf_nac_lib <"sfmpy", int_hexagon_F2_sffms_lib>;
|
||||
def HEXAGON_F2_sfcmpeq:
|
||||
qi_SInst_sfsf <"sfcmp.eq", int_hexagon_F2_sfcmpeq>;
|
||||
def HEXAGON_F2_sfcmpgt:
|
||||
qi_SInst_sfsf <"sfcmp.gt", int_hexagon_F2_sfcmpgt>;
|
||||
def HEXAGON_F2_sfcmpge:
|
||||
qi_SInst_sfsf <"sfcmp.ge", int_hexagon_F2_sfcmpge>;
|
||||
def HEXAGON_F2_sfcmpuo:
|
||||
qi_SInst_sfsf <"sfcmp.uo", int_hexagon_F2_sfcmpuo>;
|
||||
def HEXAGON_F2_sfmax:
|
||||
sf_MInst_sfsf <"sfmax", int_hexagon_F2_sfmax>;
|
||||
def HEXAGON_F2_sfmin:
|
||||
sf_MInst_sfsf <"sfmin", int_hexagon_F2_sfmin>;
|
||||
def HEXAGON_F2_sfclass:
|
||||
qi_SInst_sfu5 <"sfclass", int_hexagon_F2_sfclass>;
|
||||
def HEXAGON_F2_sfimm_p:
|
||||
sf_ALU64_u10_pos <"sfmake", int_hexagon_F2_sfimm_p>;
|
||||
def HEXAGON_F2_sfimm_n:
|
||||
sf_ALU64_u10_neg <"sfmake", int_hexagon_F2_sfimm_n>;
|
||||
def HEXAGON_F2_sffixupn:
|
||||
sf_MInst_sfsf <"sffixupn", int_hexagon_F2_sffixupn>;
|
||||
def HEXAGON_F2_sffixupd:
|
||||
sf_MInst_sfsf <"sffixupd", int_hexagon_F2_sffixupd>;
|
||||
def HEXAGON_F2_sffixupr:
|
||||
sf_SInst_sf <"sffixupr", int_hexagon_F2_sffixupr>;
|
||||
def HEXAGON_F2_dfadd:
|
||||
df_MInst_dfdf <"dfadd", int_hexagon_F2_dfadd>;
|
||||
def HEXAGON_F2_dfsub:
|
||||
df_MInst_dfdf <"dfsub", int_hexagon_F2_dfsub>;
|
||||
def HEXAGON_F2_dfmpy:
|
||||
df_MInst_dfdf <"dfmpy", int_hexagon_F2_dfmpy>;
|
||||
def HEXAGON_F2_dffma:
|
||||
df_MInst_dfdfdf_acc <"dfmpy", int_hexagon_F2_dffma>;
|
||||
def HEXAGON_F2_dffms:
|
||||
df_MInst_dfdfdf_nac <"dfmpy", int_hexagon_F2_dffms>;
|
||||
def HEXAGON_F2_dffma_lib:
|
||||
df_MInst_dfdfdf_acc_lib <"dfmpy", int_hexagon_F2_dffma_lib>;
|
||||
def HEXAGON_F2_dffms_lib:
|
||||
df_MInst_dfdfdf_nac_lib <"dfmpy", int_hexagon_F2_dffms_lib>;
|
||||
def HEXAGON_F2_dffma_sc:
|
||||
df_MInst_dfdfdfsi_sc <"dfmpy", int_hexagon_F2_dffma_sc>;
|
||||
def HEXAGON_F2_dfmax:
|
||||
df_MInst_dfdf <"dfmax", int_hexagon_F2_dfmax>;
|
||||
def HEXAGON_F2_dfmin:
|
||||
df_MInst_dfdf <"dfmin", int_hexagon_F2_dfmin>;
|
||||
def HEXAGON_F2_dfcmpeq:
|
||||
qi_ALU64_dfdf <"dfcmp.eq", int_hexagon_F2_dfcmpeq>;
|
||||
def HEXAGON_F2_dfcmpgt:
|
||||
qi_ALU64_dfdf <"dfcmp.gt", int_hexagon_F2_dfcmpgt>;
|
||||
def HEXAGON_F2_dfcmpge:
|
||||
qi_ALU64_dfdf <"dfcmp.ge", int_hexagon_F2_dfcmpge>;
|
||||
def HEXAGON_F2_dfcmpuo:
|
||||
qi_ALU64_dfdf <"dfcmp.uo", int_hexagon_F2_dfcmpuo>;
|
||||
def HEXAGON_F2_dfclass:
|
||||
qi_ALU64_dfu5 <"dfclass", int_hexagon_F2_dfclass>;
|
||||
def HEXAGON_F2_dfimm_p:
|
||||
df_ALU64_u10_pos <"dfmake", int_hexagon_F2_dfimm_p>;
|
||||
def HEXAGON_F2_dfimm_n:
|
||||
df_ALU64_u10_neg <"dfmake", int_hexagon_F2_dfimm_n>;
|
||||
def HEXAGON_F2_dffixupn:
|
||||
df_MInst_dfdf <"dffixupn", int_hexagon_F2_dffixupn>;
|
||||
def HEXAGON_F2_dffixupd:
|
||||
df_MInst_dfdf <"dffixupd", int_hexagon_F2_dffixupd>;
|
||||
def HEXAGON_F2_dffixupr:
|
||||
df_SInst_df <"dffixupr", int_hexagon_F2_dffixupr>;
|
||||
def HEXAGON_F2_conv_sf2df:
|
||||
df_SInst_sf <"convert_sf2df", int_hexagon_F2_conv_sf2df>;
|
||||
def HEXAGON_F2_conv_df2sf:
|
||||
sf_SInst_df <"convert_df2sf", int_hexagon_F2_conv_df2sf>;
|
||||
def HEXAGON_F2_conv_uw2sf:
|
||||
sf_SInst_si <"convert_uw2sf", int_hexagon_F2_conv_uw2sf>;
|
||||
def HEXAGON_F2_conv_uw2df:
|
||||
df_SInst_si <"convert_uw2df", int_hexagon_F2_conv_uw2df>;
|
||||
def HEXAGON_F2_conv_w2sf:
|
||||
sf_SInst_si <"convert_w2sf", int_hexagon_F2_conv_w2sf>;
|
||||
def HEXAGON_F2_conv_w2df:
|
||||
df_SInst_si <"convert_w2df", int_hexagon_F2_conv_w2df>;
|
||||
def HEXAGON_F2_conv_ud2sf:
|
||||
sf_SInst_di <"convert_ud2sf", int_hexagon_F2_conv_ud2sf>;
|
||||
def HEXAGON_F2_conv_ud2df:
|
||||
df_SInst_di <"convert_ud2df", int_hexagon_F2_conv_ud2df>;
|
||||
def HEXAGON_F2_conv_d2sf:
|
||||
sf_SInst_di <"convert_d2sf", int_hexagon_F2_conv_d2sf>;
|
||||
def HEXAGON_F2_conv_d2df:
|
||||
df_SInst_di <"convert_d2df", int_hexagon_F2_conv_d2df>;
|
||||
def HEXAGON_F2_conv_sf2uw:
|
||||
si_SInst_sf <"convert_sf2uw", int_hexagon_F2_conv_sf2uw>;
|
||||
def HEXAGON_F2_conv_sf2w:
|
||||
si_SInst_sf <"convert_sf2w", int_hexagon_F2_conv_sf2w>;
|
||||
def HEXAGON_F2_conv_sf2ud:
|
||||
di_SInst_sf <"convert_sf2ud", int_hexagon_F2_conv_sf2ud>;
|
||||
def HEXAGON_F2_conv_sf2d:
|
||||
di_SInst_sf <"convert_sf2d", int_hexagon_F2_conv_sf2d>;
|
||||
def HEXAGON_F2_conv_df2uw:
|
||||
si_SInst_df <"convert_df2uw", int_hexagon_F2_conv_df2uw>;
|
||||
def HEXAGON_F2_conv_df2w:
|
||||
si_SInst_df <"convert_df2w", int_hexagon_F2_conv_df2w>;
|
||||
def HEXAGON_F2_conv_df2ud:
|
||||
di_SInst_df <"convert_df2ud", int_hexagon_F2_conv_df2ud>;
|
||||
def HEXAGON_F2_conv_df2d:
|
||||
di_SInst_df <"convert_df2d", int_hexagon_F2_conv_df2d>;
|
||||
def HEXAGON_F2_conv_sf2uw_chop:
|
||||
si_SInst_sf <"convert_sf2uw", int_hexagon_F2_conv_sf2uw_chop>;
|
||||
def HEXAGON_F2_conv_sf2w_chop:
|
||||
si_SInst_sf <"convert_sf2w", int_hexagon_F2_conv_sf2w_chop>;
|
||||
def HEXAGON_F2_conv_sf2ud_chop:
|
||||
di_SInst_sf <"convert_sf2ud", int_hexagon_F2_conv_sf2ud_chop>;
|
||||
def HEXAGON_F2_conv_sf2d_chop:
|
||||
di_SInst_sf <"convert_sf2d", int_hexagon_F2_conv_sf2d_chop>;
|
||||
def HEXAGON_F2_conv_df2uw_chop:
|
||||
si_SInst_df <"convert_df2uw", int_hexagon_F2_conv_df2uw_chop>;
|
||||
def HEXAGON_F2_conv_df2w_chop:
|
||||
si_SInst_df <"convert_df2w", int_hexagon_F2_conv_df2w_chop>;
|
||||
def HEXAGON_F2_conv_df2ud_chop:
|
||||
di_SInst_df <"convert_df2ud", int_hexagon_F2_conv_df2ud_chop>;
|
||||
def HEXAGON_F2_conv_df2d_chop:
|
||||
di_SInst_df <"convert_df2d", int_hexagon_F2_conv_df2d_chop>;
|
||||
Loading…
Reference in New Issue