forked from OSchip/llvm-project
[RISCV] Custom lower vector F(MIN|MAX)NUM to vf(min|max)
This patch adds support for both scalable- and fixed-length vector code lowering of the llvm.minnum and llvm.maxnum intrinsics to the equivalent RVV instructions. Reviewed By: craig.topper Differential Revision: https://reviews.llvm.org/D101035
This commit is contained in:
Fraser Cormack
parent
f3e6f856c2
commit
83b8f8da82
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@ -555,6 +555,9 @@ RISCVTargetLowering::RISCVTargetLowering(const TargetMachine &TM,
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for (auto CC : VFPCCToExpand)
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setCondCodeAction(CC, VT, Expand);
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setOperationAction(ISD::FMINNUM, VT, Legal);
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setOperationAction(ISD::FMAXNUM, VT, Legal);
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setOperationAction(ISD::VECREDUCE_FADD, VT, Custom);
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setOperationAction(ISD::VECREDUCE_SEQ_FADD, VT, Custom);
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setOperationAction(ISD::FCOPYSIGN, VT, Legal);
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@ -729,6 +732,8 @@ RISCVTargetLowering::RISCVTargetLowering(const TargetMachine &TM,
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setOperationAction(ISD::FCOPYSIGN, VT, Custom);
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setOperationAction(ISD::FSQRT, VT, Custom);
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setOperationAction(ISD::FMA, VT, Custom);
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setOperationAction(ISD::FMINNUM, VT, Custom);
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setOperationAction(ISD::FMAXNUM, VT, Custom);
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setOperationAction(ISD::FP_ROUND, VT, Custom);
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setOperationAction(ISD::FP_EXTEND, VT, Custom);
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@ -2205,6 +2210,10 @@ SDValue RISCVTargetLowering::LowerOperation(SDValue Op,
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return lowerToScalableOp(Op, DAG, RISCVISD::UMIN_VL);
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case ISD::UMAX:
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return lowerToScalableOp(Op, DAG, RISCVISD::UMAX_VL);
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case ISD::FMINNUM:
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return lowerToScalableOp(Op, DAG, RISCVISD::FMINNUM_VL);
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case ISD::FMAXNUM:
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return lowerToScalableOp(Op, DAG, RISCVISD::FMAXNUM_VL);
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case ISD::ABS:
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return lowerABS(Op, DAG);
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case ISD::VSELECT:
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@ -7457,6 +7466,8 @@ const char *RISCVTargetLowering::getTargetNodeName(unsigned Opcode) const {
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NODE_NAME_CASE(SMAX_VL)
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NODE_NAME_CASE(UMIN_VL)
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NODE_NAME_CASE(UMAX_VL)
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NODE_NAME_CASE(FMINNUM_VL)
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NODE_NAME_CASE(FMAXNUM_VL)
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NODE_NAME_CASE(MULHS_VL)
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NODE_NAME_CASE(MULHU_VL)
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NODE_NAME_CASE(FP_TO_SINT_VL)
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@ -194,6 +194,8 @@ enum NodeType : unsigned {
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SMAX_VL,
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UMIN_VL,
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UMAX_VL,
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FMINNUM_VL,
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FMAXNUM_VL,
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MULHS_VL,
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MULHU_VL,
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FP_TO_SINT_VL,
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@ -635,6 +635,10 @@ foreach vti = AllFloatVectors in {
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vti.RegClass:$rs1, vti.ScalarRegClass:$rs2, vti.AVL, vti.SEW)>;
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}
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// 14.11. Vector Floating-Point MIN/MAX Instructions
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defm : VPatBinaryFPSDNode_VV_VF<fminnum, "PseudoVFMIN">;
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defm : VPatBinaryFPSDNode_VV_VF<fmaxnum, "PseudoVFMAX">;
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// 14.13. Vector Floating-Point Compare Instructions
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defm : VPatFPSetCCSDNode_VV_VF_FV<SETEQ, "PseudoVMFEQ", "PseudoVMFEQ">;
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defm : VPatFPSetCCSDNode_VV_VF_FV<SETOEQ, "PseudoVMFEQ", "PseudoVMFEQ">;
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@ -97,6 +97,8 @@ def riscv_fneg_vl : SDNode<"RISCVISD::FNEG_VL", SDT_RISCVFPUnOp_VL>;
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def riscv_fabs_vl : SDNode<"RISCVISD::FABS_VL", SDT_RISCVFPUnOp_VL>;
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def riscv_fsqrt_vl : SDNode<"RISCVISD::FSQRT_VL", SDT_RISCVFPUnOp_VL>;
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def riscv_fcopysign_vl : SDNode<"RISCVISD::FCOPYSIGN_VL", SDT_RISCVFPBinOp_VL>;
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def riscv_fminnum_vl : SDNode<"RISCVISD::FMINNUM_VL", SDT_RISCVFPBinOp_VL>;
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def riscv_fmaxnum_vl : SDNode<"RISCVISD::FMAXNUM_VL", SDT_RISCVFPBinOp_VL>;
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def SDT_RISCVVecFMA_VL : SDTypeProfile<1, 5, [SDTCisSameAs<0, 1>,
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SDTCisSameAs<0, 2>,
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@ -856,6 +858,10 @@ foreach vti = AllFloatVectors in {
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GPR:$vl, vti.SEW)>;
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}
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// 14.11. Vector Floating-Point MIN/MAX Instructions
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defm : VPatBinaryFPVL_VV_VF<riscv_fminnum_vl, "PseudoVFMIN">;
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defm : VPatBinaryFPVL_VV_VF<riscv_fmaxnum_vl, "PseudoVFMAX">;
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// 14.13. Vector Floating-Point Compare Instructions
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defm : VPatFPSetCCVL_VV_VF_FV<SETEQ, "PseudoVMFEQ", "PseudoVMFEQ">;
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defm : VPatFPSetCCVL_VV_VF_FV<SETOEQ, "PseudoVMFEQ", "PseudoVMFEQ">;
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@ -0,0 +1,293 @@
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; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc -mtriple=riscv32 -mattr=+d,+experimental-zfh,+experimental-v -target-abi=ilp32d \
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; RUN: -riscv-v-vector-bits-min=128 -verify-machineinstrs < %s | FileCheck %s
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; RUN: llc -mtriple=riscv64 -mattr=+d,+experimental-zfh,+experimental-v -target-abi=lp64d \
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; RUN: -riscv-v-vector-bits-min=128 -verify-machineinstrs < %s | FileCheck %s
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declare <2 x half> @llvm.maxnum.v2f16(<2 x half>, <2 x half>)
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define <2 x half> @vfmax_v2f16_vv(<2 x half> %a, <2 x half> %b) {
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; CHECK-LABEL: vfmax_v2f16_vv:
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; CHECK: # %bb.0:
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; CHECK-NEXT: vsetivli a0, 2, e16,m1,ta,mu
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; CHECK-NEXT: vfmax.vv v8, v8, v9
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; CHECK-NEXT: ret
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%v = call <2 x half> @llvm.maxnum.v2f16(<2 x half> %a, <2 x half> %b)
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ret <2 x half> %v
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}
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define <2 x half> @vfmax_v2f16_vf(<2 x half> %a, half %b) {
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; CHECK-LABEL: vfmax_v2f16_vf:
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; CHECK: # %bb.0:
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; CHECK-NEXT: vsetivli a0, 2, e16,m1,ta,mu
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; CHECK-NEXT: vfmax.vf v8, v8, fa0
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; CHECK-NEXT: ret
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%head = insertelement <2 x half> undef, half %b, i32 0
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%splat = shufflevector <2 x half> %head, <2 x half> undef, <2 x i32> zeroinitializer
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%v = call <2 x half> @llvm.maxnum.v2f16(<2 x half> %a, <2 x half> %splat)
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ret <2 x half> %v
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}
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declare <4 x half> @llvm.maxnum.v4f16(<4 x half>, <4 x half>)
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define <4 x half> @vfmax_v4f16_vv(<4 x half> %a, <4 x half> %b) {
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; CHECK-LABEL: vfmax_v4f16_vv:
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; CHECK: # %bb.0:
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; CHECK-NEXT: vsetivli a0, 4, e16,m1,ta,mu
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; CHECK-NEXT: vfmax.vv v8, v8, v9
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; CHECK-NEXT: ret
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%v = call <4 x half> @llvm.maxnum.v4f16(<4 x half> %a, <4 x half> %b)
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ret <4 x half> %v
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}
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define <4 x half> @vfmax_v4f16_vf(<4 x half> %a, half %b) {
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; CHECK-LABEL: vfmax_v4f16_vf:
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; CHECK: # %bb.0:
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; CHECK-NEXT: vsetivli a0, 4, e16,m1,ta,mu
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; CHECK-NEXT: vfmax.vf v8, v8, fa0
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; CHECK-NEXT: ret
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%head = insertelement <4 x half> undef, half %b, i32 0
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%splat = shufflevector <4 x half> %head, <4 x half> undef, <4 x i32> zeroinitializer
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%v = call <4 x half> @llvm.maxnum.v4f16(<4 x half> %a, <4 x half> %splat)
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ret <4 x half> %v
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}
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declare <8 x half> @llvm.maxnum.v8f16(<8 x half>, <8 x half>)
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define <8 x half> @vfmax_v8f16_vv(<8 x half> %a, <8 x half> %b) {
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; CHECK-LABEL: vfmax_v8f16_vv:
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; CHECK: # %bb.0:
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; CHECK-NEXT: vsetivli a0, 8, e16,m1,ta,mu
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; CHECK-NEXT: vfmax.vv v8, v8, v9
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; CHECK-NEXT: ret
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%v = call <8 x half> @llvm.maxnum.v8f16(<8 x half> %a, <8 x half> %b)
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ret <8 x half> %v
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}
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define <8 x half> @vfmax_v8f16_vf(<8 x half> %a, half %b) {
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; CHECK-LABEL: vfmax_v8f16_vf:
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; CHECK: # %bb.0:
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; CHECK-NEXT: vsetivli a0, 8, e16,m1,ta,mu
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; CHECK-NEXT: vfmax.vf v8, v8, fa0
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; CHECK-NEXT: ret
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%head = insertelement <8 x half> undef, half %b, i32 0
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%splat = shufflevector <8 x half> %head, <8 x half> undef, <8 x i32> zeroinitializer
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%v = call <8 x half> @llvm.maxnum.v8f16(<8 x half> %a, <8 x half> %splat)
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ret <8 x half> %v
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}
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declare <16 x half> @llvm.maxnum.v16f16(<16 x half>, <16 x half>)
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define <16 x half> @vfmax_v16f16_vv(<16 x half> %a, <16 x half> %b) {
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; CHECK-LABEL: vfmax_v16f16_vv:
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; CHECK: # %bb.0:
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; CHECK-NEXT: vsetivli a0, 16, e16,m2,ta,mu
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; CHECK-NEXT: vfmax.vv v8, v8, v10
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; CHECK-NEXT: ret
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%v = call <16 x half> @llvm.maxnum.v16f16(<16 x half> %a, <16 x half> %b)
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ret <16 x half> %v
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}
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define <16 x half> @vfmax_v16f16_vf(<16 x half> %a, half %b) {
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; CHECK-LABEL: vfmax_v16f16_vf:
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; CHECK: # %bb.0:
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; CHECK-NEXT: vsetivli a0, 16, e16,m2,ta,mu
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; CHECK-NEXT: vfmax.vf v8, v8, fa0
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; CHECK-NEXT: ret
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%head = insertelement <16 x half> undef, half %b, i32 0
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%splat = shufflevector <16 x half> %head, <16 x half> undef, <16 x i32> zeroinitializer
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%v = call <16 x half> @llvm.maxnum.v16f16(<16 x half> %a, <16 x half> %splat)
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ret <16 x half> %v
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}
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declare <2 x float> @llvm.maxnum.v2f32(<2 x float>, <2 x float>)
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define <2 x float> @vfmax_v2f32_vv(<2 x float> %a, <2 x float> %b) {
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; CHECK-LABEL: vfmax_v2f32_vv:
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; CHECK: # %bb.0:
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; CHECK-NEXT: vsetivli a0, 2, e32,m1,ta,mu
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; CHECK-NEXT: vfmax.vv v8, v8, v9
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; CHECK-NEXT: ret
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%v = call <2 x float> @llvm.maxnum.v2f32(<2 x float> %a, <2 x float> %b)
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ret <2 x float> %v
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}
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define <2 x float> @vfmax_v2f32_vf(<2 x float> %a, float %b) {
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; CHECK-LABEL: vfmax_v2f32_vf:
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; CHECK: # %bb.0:
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; CHECK-NEXT: vsetivli a0, 2, e32,m1,ta,mu
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; CHECK-NEXT: vfmax.vf v8, v8, fa0
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; CHECK-NEXT: ret
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%head = insertelement <2 x float> undef, float %b, i32 0
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%splat = shufflevector <2 x float> %head, <2 x float> undef, <2 x i32> zeroinitializer
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%v = call <2 x float> @llvm.maxnum.v2f32(<2 x float> %a, <2 x float> %splat)
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ret <2 x float> %v
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}
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declare <4 x float> @llvm.maxnum.v4f32(<4 x float>, <4 x float>)
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define <4 x float> @vfmax_v4f32_vv(<4 x float> %a, <4 x float> %b) {
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; CHECK-LABEL: vfmax_v4f32_vv:
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; CHECK: # %bb.0:
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; CHECK-NEXT: vsetivli a0, 4, e32,m1,ta,mu
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; CHECK-NEXT: vfmax.vv v8, v8, v9
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; CHECK-NEXT: ret
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%v = call <4 x float> @llvm.maxnum.v4f32(<4 x float> %a, <4 x float> %b)
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ret <4 x float> %v
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}
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define <4 x float> @vfmax_v4f32_vf(<4 x float> %a, float %b) {
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; CHECK-LABEL: vfmax_v4f32_vf:
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; CHECK: # %bb.0:
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; CHECK-NEXT: vsetivli a0, 4, e32,m1,ta,mu
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; CHECK-NEXT: vfmax.vf v8, v8, fa0
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; CHECK-NEXT: ret
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%head = insertelement <4 x float> undef, float %b, i32 0
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%splat = shufflevector <4 x float> %head, <4 x float> undef, <4 x i32> zeroinitializer
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%v = call <4 x float> @llvm.maxnum.v4f32(<4 x float> %a, <4 x float> %splat)
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ret <4 x float> %v
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}
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declare <8 x float> @llvm.maxnum.v8f32(<8 x float>, <8 x float>)
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define <8 x float> @vfmax_v8f32_vv(<8 x float> %a, <8 x float> %b) {
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; CHECK-LABEL: vfmax_v8f32_vv:
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; CHECK: # %bb.0:
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; CHECK-NEXT: vsetivli a0, 8, e32,m2,ta,mu
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; CHECK-NEXT: vfmax.vv v8, v8, v10
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; CHECK-NEXT: ret
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%v = call <8 x float> @llvm.maxnum.v8f32(<8 x float> %a, <8 x float> %b)
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ret <8 x float> %v
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}
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define <8 x float> @vfmax_v8f32_vf(<8 x float> %a, float %b) {
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; CHECK-LABEL: vfmax_v8f32_vf:
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; CHECK: # %bb.0:
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; CHECK-NEXT: vsetivli a0, 8, e32,m2,ta,mu
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; CHECK-NEXT: vfmax.vf v8, v8, fa0
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; CHECK-NEXT: ret
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%head = insertelement <8 x float> undef, float %b, i32 0
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%splat = shufflevector <8 x float> %head, <8 x float> undef, <8 x i32> zeroinitializer
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%v = call <8 x float> @llvm.maxnum.v8f32(<8 x float> %a, <8 x float> %splat)
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ret <8 x float> %v
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}
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declare <16 x float> @llvm.maxnum.v16f32(<16 x float>, <16 x float>)
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define <16 x float> @vfmax_v16f32_vv(<16 x float> %a, <16 x float> %b) {
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; CHECK-LABEL: vfmax_v16f32_vv:
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; CHECK: # %bb.0:
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; CHECK-NEXT: vsetivli a0, 16, e32,m4,ta,mu
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; CHECK-NEXT: vfmax.vv v8, v8, v12
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; CHECK-NEXT: ret
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%v = call <16 x float> @llvm.maxnum.v16f32(<16 x float> %a, <16 x float> %b)
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ret <16 x float> %v
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}
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define <16 x float> @vfmax_v16f32_vf(<16 x float> %a, float %b) {
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; CHECK-LABEL: vfmax_v16f32_vf:
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; CHECK: # %bb.0:
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; CHECK-NEXT: vsetivli a0, 16, e32,m4,ta,mu
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; CHECK-NEXT: vfmax.vf v8, v8, fa0
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; CHECK-NEXT: ret
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%head = insertelement <16 x float> undef, float %b, i32 0
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%splat = shufflevector <16 x float> %head, <16 x float> undef, <16 x i32> zeroinitializer
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%v = call <16 x float> @llvm.maxnum.v16f32(<16 x float> %a, <16 x float> %splat)
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ret <16 x float> %v
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}
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declare <2 x double> @llvm.maxnum.v2f64(<2 x double>, <2 x double>)
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define <2 x double> @vfmax_v2f64_vv(<2 x double> %a, <2 x double> %b) {
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; CHECK-LABEL: vfmax_v2f64_vv:
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; CHECK: # %bb.0:
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; CHECK-NEXT: vsetivli a0, 2, e64,m1,ta,mu
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; CHECK-NEXT: vfmax.vv v8, v8, v9
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; CHECK-NEXT: ret
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%v = call <2 x double> @llvm.maxnum.v2f64(<2 x double> %a, <2 x double> %b)
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ret <2 x double> %v
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}
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define <2 x double> @vfmax_v2f64_vf(<2 x double> %a, double %b) {
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; CHECK-LABEL: vfmax_v2f64_vf:
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; CHECK: # %bb.0:
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; CHECK-NEXT: vsetivli a0, 2, e64,m1,ta,mu
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; CHECK-NEXT: vfmax.vf v8, v8, fa0
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; CHECK-NEXT: ret
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%head = insertelement <2 x double> undef, double %b, i32 0
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%splat = shufflevector <2 x double> %head, <2 x double> undef, <2 x i32> zeroinitializer
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%v = call <2 x double> @llvm.maxnum.v2f64(<2 x double> %a, <2 x double> %splat)
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ret <2 x double> %v
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}
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declare <4 x double> @llvm.maxnum.v4f64(<4 x double>, <4 x double>)
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define <4 x double> @vfmax_v4f64_vv(<4 x double> %a, <4 x double> %b) {
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; CHECK-LABEL: vfmax_v4f64_vv:
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; CHECK: # %bb.0:
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; CHECK-NEXT: vsetivli a0, 4, e64,m2,ta,mu
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; CHECK-NEXT: vfmax.vv v8, v8, v10
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; CHECK-NEXT: ret
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%v = call <4 x double> @llvm.maxnum.v4f64(<4 x double> %a, <4 x double> %b)
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ret <4 x double> %v
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}
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define <4 x double> @vfmax_v4f64_vf(<4 x double> %a, double %b) {
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; CHECK-LABEL: vfmax_v4f64_vf:
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; CHECK: # %bb.0:
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; CHECK-NEXT: vsetivli a0, 4, e64,m2,ta,mu
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; CHECK-NEXT: vfmax.vf v8, v8, fa0
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; CHECK-NEXT: ret
|
||||
%head = insertelement <4 x double> undef, double %b, i32 0
|
||||
%splat = shufflevector <4 x double> %head, <4 x double> undef, <4 x i32> zeroinitializer
|
||||
%v = call <4 x double> @llvm.maxnum.v4f64(<4 x double> %a, <4 x double> %splat)
|
||||
ret <4 x double> %v
|
||||
}
|
||||
|
||||
declare <8 x double> @llvm.maxnum.v8f64(<8 x double>, <8 x double>)
|
||||
|
||||
define <8 x double> @vfmax_v8f64_vv(<8 x double> %a, <8 x double> %b) {
|
||||
; CHECK-LABEL: vfmax_v8f64_vv:
|
||||
; CHECK: # %bb.0:
|
||||
; CHECK-NEXT: vsetivli a0, 8, e64,m4,ta,mu
|
||||
; CHECK-NEXT: vfmax.vv v8, v8, v12
|
||||
; CHECK-NEXT: ret
|
||||
%v = call <8 x double> @llvm.maxnum.v8f64(<8 x double> %a, <8 x double> %b)
|
||||
ret <8 x double> %v
|
||||
}
|
||||
|
||||
define <8 x double> @vfmax_v8f64_vf(<8 x double> %a, double %b) {
|
||||
; CHECK-LABEL: vfmax_v8f64_vf:
|
||||
; CHECK: # %bb.0:
|
||||
; CHECK-NEXT: vsetivli a0, 8, e64,m4,ta,mu
|
||||
; CHECK-NEXT: vfmax.vf v8, v8, fa0
|
||||
; CHECK-NEXT: ret
|
||||
%head = insertelement <8 x double> undef, double %b, i32 0
|
||||
%splat = shufflevector <8 x double> %head, <8 x double> undef, <8 x i32> zeroinitializer
|
||||
%v = call <8 x double> @llvm.maxnum.v8f64(<8 x double> %a, <8 x double> %splat)
|
||||
ret <8 x double> %v
|
||||
}
|
||||
|
||||
declare <16 x double> @llvm.maxnum.v16f64(<16 x double>, <16 x double>)
|
||||
|
||||
define <16 x double> @vfmax_v16f64_vv(<16 x double> %a, <16 x double> %b) {
|
||||
; CHECK-LABEL: vfmax_v16f64_vv:
|
||||
; CHECK: # %bb.0:
|
||||
; CHECK-NEXT: vsetivli a0, 16, e64,m8,ta,mu
|
||||
; CHECK-NEXT: vfmax.vv v8, v8, v16
|
||||
; CHECK-NEXT: ret
|
||||
%v = call <16 x double> @llvm.maxnum.v16f64(<16 x double> %a, <16 x double> %b)
|
||||
ret <16 x double> %v
|
||||
}
|
||||
|
||||
define <16 x double> @vfmax_v16f64_vf(<16 x double> %a, double %b) {
|
||||
; CHECK-LABEL: vfmax_v16f64_vf:
|
||||
; CHECK: # %bb.0:
|
||||
; CHECK-NEXT: vsetivli a0, 16, e64,m8,ta,mu
|
||||
; CHECK-NEXT: vfmax.vf v8, v8, fa0
|
||||
; CHECK-NEXT: ret
|
||||
%head = insertelement <16 x double> undef, double %b, i32 0
|
||||
%splat = shufflevector <16 x double> %head, <16 x double> undef, <16 x i32> zeroinitializer
|
||||
%v = call <16 x double> @llvm.maxnum.v16f64(<16 x double> %a, <16 x double> %splat)
|
||||
ret <16 x double> %v
|
||||
}
|
||||
|
|
@ -0,0 +1,293 @@
|
|||
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
|
||||
; RUN: llc -mtriple=riscv32 -mattr=+d,+experimental-zfh,+experimental-v -target-abi=ilp32d \
|
||||
; RUN: -riscv-v-vector-bits-min=128 -verify-machineinstrs < %s | FileCheck %s
|
||||
; RUN: llc -mtriple=riscv64 -mattr=+d,+experimental-zfh,+experimental-v -target-abi=lp64d \
|
||||
; RUN: -riscv-v-vector-bits-min=128 -verify-machineinstrs < %s | FileCheck %s
|
||||
|
||||
declare <2 x half> @llvm.minnum.v2f16(<2 x half>, <2 x half>)
|
||||
|
||||
define <2 x half> @vfmin_v2f16_vv(<2 x half> %a, <2 x half> %b) {
|
||||
; CHECK-LABEL: vfmin_v2f16_vv:
|
||||
; CHECK: # %bb.0:
|
||||
; CHECK-NEXT: vsetivli a0, 2, e16,m1,ta,mu
|
||||
; CHECK-NEXT: vfmin.vv v8, v8, v9
|
||||
; CHECK-NEXT: ret
|
||||
%v = call <2 x half> @llvm.minnum.v2f16(<2 x half> %a, <2 x half> %b)
|
||||
ret <2 x half> %v
|
||||
}
|
||||
|
||||
define <2 x half> @vfmin_v2f16_vf(<2 x half> %a, half %b) {
|
||||
; CHECK-LABEL: vfmin_v2f16_vf:
|
||||
; CHECK: # %bb.0:
|
||||
; CHECK-NEXT: vsetivli a0, 2, e16,m1,ta,mu
|
||||
; CHECK-NEXT: vfmin.vf v8, v8, fa0
|
||||
; CHECK-NEXT: ret
|
||||
%head = insertelement <2 x half> undef, half %b, i32 0
|
||||
%splat = shufflevector <2 x half> %head, <2 x half> undef, <2 x i32> zeroinitializer
|
||||
%v = call <2 x half> @llvm.minnum.v2f16(<2 x half> %a, <2 x half> %splat)
|
||||
ret <2 x half> %v
|
||||
}
|
||||
|
||||
declare <4 x half> @llvm.minnum.v4f16(<4 x half>, <4 x half>)
|
||||
|
||||
define <4 x half> @vfmin_v4f16_vv(<4 x half> %a, <4 x half> %b) {
|
||||
; CHECK-LABEL: vfmin_v4f16_vv:
|
||||
; CHECK: # %bb.0:
|
||||
; CHECK-NEXT: vsetivli a0, 4, e16,m1,ta,mu
|
||||
; CHECK-NEXT: vfmin.vv v8, v8, v9
|
||||
; CHECK-NEXT: ret
|
||||
%v = call <4 x half> @llvm.minnum.v4f16(<4 x half> %a, <4 x half> %b)
|
||||
ret <4 x half> %v
|
||||
}
|
||||
|
||||
define <4 x half> @vfmin_v4f16_vf(<4 x half> %a, half %b) {
|
||||
; CHECK-LABEL: vfmin_v4f16_vf:
|
||||
; CHECK: # %bb.0:
|
||||
; CHECK-NEXT: vsetivli a0, 4, e16,m1,ta,mu
|
||||
; CHECK-NEXT: vfmin.vf v8, v8, fa0
|
||||
; CHECK-NEXT: ret
|
||||
%head = insertelement <4 x half> undef, half %b, i32 0
|
||||
%splat = shufflevector <4 x half> %head, <4 x half> undef, <4 x i32> zeroinitializer
|
||||
%v = call <4 x half> @llvm.minnum.v4f16(<4 x half> %a, <4 x half> %splat)
|
||||
ret <4 x half> %v
|
||||
}
|
||||
|
||||
declare <8 x half> @llvm.minnum.v8f16(<8 x half>, <8 x half>)
|
||||
|
||||
define <8 x half> @vfmin_v8f16_vv(<8 x half> %a, <8 x half> %b) {
|
||||
; CHECK-LABEL: vfmin_v8f16_vv:
|
||||
; CHECK: # %bb.0:
|
||||
; CHECK-NEXT: vsetivli a0, 8, e16,m1,ta,mu
|
||||
; CHECK-NEXT: vfmin.vv v8, v8, v9
|
||||
; CHECK-NEXT: ret
|
||||
%v = call <8 x half> @llvm.minnum.v8f16(<8 x half> %a, <8 x half> %b)
|
||||
ret <8 x half> %v
|
||||
}
|
||||
|
||||
define <8 x half> @vfmin_v8f16_vf(<8 x half> %a, half %b) {
|
||||
; CHECK-LABEL: vfmin_v8f16_vf:
|
||||
; CHECK: # %bb.0:
|
||||
; CHECK-NEXT: vsetivli a0, 8, e16,m1,ta,mu
|
||||
; CHECK-NEXT: vfmin.vf v8, v8, fa0
|
||||
; CHECK-NEXT: ret
|
||||
%head = insertelement <8 x half> undef, half %b, i32 0
|
||||
%splat = shufflevector <8 x half> %head, <8 x half> undef, <8 x i32> zeroinitializer
|
||||
%v = call <8 x half> @llvm.minnum.v8f16(<8 x half> %a, <8 x half> %splat)
|
||||
ret <8 x half> %v
|
||||
}
|
||||
|
||||
declare <16 x half> @llvm.minnum.v16f16(<16 x half>, <16 x half>)
|
||||
|
||||
define <16 x half> @vfmin_v16f16_vv(<16 x half> %a, <16 x half> %b) {
|
||||
; CHECK-LABEL: vfmin_v16f16_vv:
|
||||
; CHECK: # %bb.0:
|
||||
; CHECK-NEXT: vsetivli a0, 16, e16,m2,ta,mu
|
||||
; CHECK-NEXT: vfmin.vv v8, v8, v10
|
||||
; CHECK-NEXT: ret
|
||||
%v = call <16 x half> @llvm.minnum.v16f16(<16 x half> %a, <16 x half> %b)
|
||||
ret <16 x half> %v
|
||||
}
|
||||
|
||||
define <16 x half> @vfmin_v16f16_vf(<16 x half> %a, half %b) {
|
||||
; CHECK-LABEL: vfmin_v16f16_vf:
|
||||
; CHECK: # %bb.0:
|
||||
; CHECK-NEXT: vsetivli a0, 16, e16,m2,ta,mu
|
||||
; CHECK-NEXT: vfmin.vf v8, v8, fa0
|
||||
; CHECK-NEXT: ret
|
||||
%head = insertelement <16 x half> undef, half %b, i32 0
|
||||
%splat = shufflevector <16 x half> %head, <16 x half> undef, <16 x i32> zeroinitializer
|
||||
%v = call <16 x half> @llvm.minnum.v16f16(<16 x half> %a, <16 x half> %splat)
|
||||
ret <16 x half> %v
|
||||
}
|
||||
|
||||
declare <2 x float> @llvm.minnum.v2f32(<2 x float>, <2 x float>)
|
||||
|
||||
define <2 x float> @vfmin_v2f32_vv(<2 x float> %a, <2 x float> %b) {
|
||||
; CHECK-LABEL: vfmin_v2f32_vv:
|
||||
; CHECK: # %bb.0:
|
||||
; CHECK-NEXT: vsetivli a0, 2, e32,m1,ta,mu
|
||||
; CHECK-NEXT: vfmin.vv v8, v8, v9
|
||||
; CHECK-NEXT: ret
|
||||
%v = call <2 x float> @llvm.minnum.v2f32(<2 x float> %a, <2 x float> %b)
|
||||
ret <2 x float> %v
|
||||
}
|
||||
|
||||
define <2 x float> @vfmin_v2f32_vf(<2 x float> %a, float %b) {
|
||||
; CHECK-LABEL: vfmin_v2f32_vf:
|
||||
; CHECK: # %bb.0:
|
||||
; CHECK-NEXT: vsetivli a0, 2, e32,m1,ta,mu
|
||||
; CHECK-NEXT: vfmin.vf v8, v8, fa0
|
||||
; CHECK-NEXT: ret
|
||||
%head = insertelement <2 x float> undef, float %b, i32 0
|
||||
%splat = shufflevector <2 x float> %head, <2 x float> undef, <2 x i32> zeroinitializer
|
||||
%v = call <2 x float> @llvm.minnum.v2f32(<2 x float> %a, <2 x float> %splat)
|
||||
ret <2 x float> %v
|
||||
}
|
||||
|
||||
declare <4 x float> @llvm.minnum.v4f32(<4 x float>, <4 x float>)
|
||||
|
||||
define <4 x float> @vfmin_v4f32_vv(<4 x float> %a, <4 x float> %b) {
|
||||
; CHECK-LABEL: vfmin_v4f32_vv:
|
||||
; CHECK: # %bb.0:
|
||||
; CHECK-NEXT: vsetivli a0, 4, e32,m1,ta,mu
|
||||
; CHECK-NEXT: vfmin.vv v8, v8, v9
|
||||
; CHECK-NEXT: ret
|
||||
%v = call <4 x float> @llvm.minnum.v4f32(<4 x float> %a, <4 x float> %b)
|
||||
ret <4 x float> %v
|
||||
}
|
||||
|
||||
define <4 x float> @vfmin_v4f32_vf(<4 x float> %a, float %b) {
|
||||
; CHECK-LABEL: vfmin_v4f32_vf:
|
||||
; CHECK: # %bb.0:
|
||||
; CHECK-NEXT: vsetivli a0, 4, e32,m1,ta,mu
|
||||
; CHECK-NEXT: vfmin.vf v8, v8, fa0
|
||||
; CHECK-NEXT: ret
|
||||
%head = insertelement <4 x float> undef, float %b, i32 0
|
||||
%splat = shufflevector <4 x float> %head, <4 x float> undef, <4 x i32> zeroinitializer
|
||||
%v = call <4 x float> @llvm.minnum.v4f32(<4 x float> %a, <4 x float> %splat)
|
||||
ret <4 x float> %v
|
||||
}
|
||||
|
||||
declare <8 x float> @llvm.minnum.v8f32(<8 x float>, <8 x float>)
|
||||
|
||||
define <8 x float> @vfmin_v8f32_vv(<8 x float> %a, <8 x float> %b) {
|
||||
; CHECK-LABEL: vfmin_v8f32_vv:
|
||||
; CHECK: # %bb.0:
|
||||
; CHECK-NEXT: vsetivli a0, 8, e32,m2,ta,mu
|
||||
; CHECK-NEXT: vfmin.vv v8, v8, v10
|
||||
; CHECK-NEXT: ret
|
||||
%v = call <8 x float> @llvm.minnum.v8f32(<8 x float> %a, <8 x float> %b)
|
||||
ret <8 x float> %v
|
||||
}
|
||||
|
||||
define <8 x float> @vfmin_v8f32_vf(<8 x float> %a, float %b) {
|
||||
; CHECK-LABEL: vfmin_v8f32_vf:
|
||||
; CHECK: # %bb.0:
|
||||
; CHECK-NEXT: vsetivli a0, 8, e32,m2,ta,mu
|
||||
; CHECK-NEXT: vfmin.vf v8, v8, fa0
|
||||
; CHECK-NEXT: ret
|
||||
%head = insertelement <8 x float> undef, float %b, i32 0
|
||||
%splat = shufflevector <8 x float> %head, <8 x float> undef, <8 x i32> zeroinitializer
|
||||
%v = call <8 x float> @llvm.minnum.v8f32(<8 x float> %a, <8 x float> %splat)
|
||||
ret <8 x float> %v
|
||||
}
|
||||
|
||||
declare <16 x float> @llvm.minnum.v16f32(<16 x float>, <16 x float>)
|
||||
|
||||
define <16 x float> @vfmin_v16f32_vv(<16 x float> %a, <16 x float> %b) {
|
||||
; CHECK-LABEL: vfmin_v16f32_vv:
|
||||
; CHECK: # %bb.0:
|
||||
; CHECK-NEXT: vsetivli a0, 16, e32,m4,ta,mu
|
||||
; CHECK-NEXT: vfmin.vv v8, v8, v12
|
||||
; CHECK-NEXT: ret
|
||||
%v = call <16 x float> @llvm.minnum.v16f32(<16 x float> %a, <16 x float> %b)
|
||||
ret <16 x float> %v
|
||||
}
|
||||
|
||||
define <16 x float> @vfmin_v16f32_vf(<16 x float> %a, float %b) {
|
||||
; CHECK-LABEL: vfmin_v16f32_vf:
|
||||
; CHECK: # %bb.0:
|
||||
; CHECK-NEXT: vsetivli a0, 16, e32,m4,ta,mu
|
||||
; CHECK-NEXT: vfmin.vf v8, v8, fa0
|
||||
; CHECK-NEXT: ret
|
||||
%head = insertelement <16 x float> undef, float %b, i32 0
|
||||
%splat = shufflevector <16 x float> %head, <16 x float> undef, <16 x i32> zeroinitializer
|
||||
%v = call <16 x float> @llvm.minnum.v16f32(<16 x float> %a, <16 x float> %splat)
|
||||
ret <16 x float> %v
|
||||
}
|
||||
|
||||
declare <2 x double> @llvm.minnum.v2f64(<2 x double>, <2 x double>)
|
||||
|
||||
define <2 x double> @vfmin_v2f64_vv(<2 x double> %a, <2 x double> %b) {
|
||||
; CHECK-LABEL: vfmin_v2f64_vv:
|
||||
; CHECK: # %bb.0:
|
||||
; CHECK-NEXT: vsetivli a0, 2, e64,m1,ta,mu
|
||||
; CHECK-NEXT: vfmin.vv v8, v8, v9
|
||||
; CHECK-NEXT: ret
|
||||
%v = call <2 x double> @llvm.minnum.v2f64(<2 x double> %a, <2 x double> %b)
|
||||
ret <2 x double> %v
|
||||
}
|
||||
|
||||
define <2 x double> @vfmin_v2f64_vf(<2 x double> %a, double %b) {
|
||||
; CHECK-LABEL: vfmin_v2f64_vf:
|
||||
; CHECK: # %bb.0:
|
||||
; CHECK-NEXT: vsetivli a0, 2, e64,m1,ta,mu
|
||||
; CHECK-NEXT: vfmin.vf v8, v8, fa0
|
||||
; CHECK-NEXT: ret
|
||||
%head = insertelement <2 x double> undef, double %b, i32 0
|
||||
%splat = shufflevector <2 x double> %head, <2 x double> undef, <2 x i32> zeroinitializer
|
||||
%v = call <2 x double> @llvm.minnum.v2f64(<2 x double> %a, <2 x double> %splat)
|
||||
ret <2 x double> %v
|
||||
}
|
||||
|
||||
declare <4 x double> @llvm.minnum.v4f64(<4 x double>, <4 x double>)
|
||||
|
||||
define <4 x double> @vfmin_v4f64_vv(<4 x double> %a, <4 x double> %b) {
|
||||
; CHECK-LABEL: vfmin_v4f64_vv:
|
||||
; CHECK: # %bb.0:
|
||||
; CHECK-NEXT: vsetivli a0, 4, e64,m2,ta,mu
|
||||
; CHECK-NEXT: vfmin.vv v8, v8, v10
|
||||
; CHECK-NEXT: ret
|
||||
%v = call <4 x double> @llvm.minnum.v4f64(<4 x double> %a, <4 x double> %b)
|
||||
ret <4 x double> %v
|
||||
}
|
||||
|
||||
define <4 x double> @vfmin_v4f64_vf(<4 x double> %a, double %b) {
|
||||
; CHECK-LABEL: vfmin_v4f64_vf:
|
||||
; CHECK: # %bb.0:
|
||||
; CHECK-NEXT: vsetivli a0, 4, e64,m2,ta,mu
|
||||
; CHECK-NEXT: vfmin.vf v8, v8, fa0
|
||||
; CHECK-NEXT: ret
|
||||
%head = insertelement <4 x double> undef, double %b, i32 0
|
||||
%splat = shufflevector <4 x double> %head, <4 x double> undef, <4 x i32> zeroinitializer
|
||||
%v = call <4 x double> @llvm.minnum.v4f64(<4 x double> %a, <4 x double> %splat)
|
||||
ret <4 x double> %v
|
||||
}
|
||||
|
||||
declare <8 x double> @llvm.minnum.v8f64(<8 x double>, <8 x double>)
|
||||
|
||||
define <8 x double> @vfmin_v8f64_vv(<8 x double> %a, <8 x double> %b) {
|
||||
; CHECK-LABEL: vfmin_v8f64_vv:
|
||||
; CHECK: # %bb.0:
|
||||
; CHECK-NEXT: vsetivli a0, 8, e64,m4,ta,mu
|
||||
; CHECK-NEXT: vfmin.vv v8, v8, v12
|
||||
; CHECK-NEXT: ret
|
||||
%v = call <8 x double> @llvm.minnum.v8f64(<8 x double> %a, <8 x double> %b)
|
||||
ret <8 x double> %v
|
||||
}
|
||||
|
||||
define <8 x double> @vfmin_v8f64_vf(<8 x double> %a, double %b) {
|
||||
; CHECK-LABEL: vfmin_v8f64_vf:
|
||||
; CHECK: # %bb.0:
|
||||
; CHECK-NEXT: vsetivli a0, 8, e64,m4,ta,mu
|
||||
; CHECK-NEXT: vfmin.vf v8, v8, fa0
|
||||
; CHECK-NEXT: ret
|
||||
%head = insertelement <8 x double> undef, double %b, i32 0
|
||||
%splat = shufflevector <8 x double> %head, <8 x double> undef, <8 x i32> zeroinitializer
|
||||
%v = call <8 x double> @llvm.minnum.v8f64(<8 x double> %a, <8 x double> %splat)
|
||||
ret <8 x double> %v
|
||||
}
|
||||
|
||||
declare <16 x double> @llvm.minnum.v16f64(<16 x double>, <16 x double>)
|
||||
|
||||
define <16 x double> @vfmin_v16f64_vv(<16 x double> %a, <16 x double> %b) {
|
||||
; CHECK-LABEL: vfmin_v16f64_vv:
|
||||
; CHECK: # %bb.0:
|
||||
; CHECK-NEXT: vsetivli a0, 16, e64,m8,ta,mu
|
||||
; CHECK-NEXT: vfmin.vv v8, v8, v16
|
||||
; CHECK-NEXT: ret
|
||||
%v = call <16 x double> @llvm.minnum.v16f64(<16 x double> %a, <16 x double> %b)
|
||||
ret <16 x double> %v
|
||||
}
|
||||
|
||||
define <16 x double> @vfmin_v16f64_vf(<16 x double> %a, double %b) {
|
||||
; CHECK-LABEL: vfmin_v16f64_vf:
|
||||
; CHECK: # %bb.0:
|
||||
; CHECK-NEXT: vsetivli a0, 16, e64,m8,ta,mu
|
||||
; CHECK-NEXT: vfmin.vf v8, v8, fa0
|
||||
; CHECK-NEXT: ret
|
||||
%head = insertelement <16 x double> undef, double %b, i32 0
|
||||
%splat = shufflevector <16 x double> %head, <16 x double> undef, <16 x i32> zeroinitializer
|
||||
%v = call <16 x double> @llvm.minnum.v16f64(<16 x double> %a, <16 x double> %splat)
|
||||
ret <16 x double> %v
|
||||
}
|
||||
|
|
@ -0,0 +1,365 @@
|
|||
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
|
||||
; RUN: llc -mtriple=riscv32 -mattr=+d,+experimental-zfh,+experimental-v -target-abi=ilp32d \
|
||||
; RUN: -verify-machineinstrs < %s | FileCheck %s
|
||||
; RUN: llc -mtriple=riscv64 -mattr=+d,+experimental-zfh,+experimental-v -target-abi=lp64d \
|
||||
; RUN: -verify-machineinstrs < %s | FileCheck %s
|
||||
|
||||
declare <vscale x 1 x half> @llvm.maxnum.nxv1f16(<vscale x 1 x half>, <vscale x 1 x half>)
|
||||
|
||||
define <vscale x 1 x half> @vfmax_nxv1f16_vv(<vscale x 1 x half> %a, <vscale x 1 x half> %b) {
|
||||
; CHECK-LABEL: vfmax_nxv1f16_vv:
|
||||
; CHECK: # %bb.0:
|
||||
; CHECK-NEXT: vsetvli a0, zero, e16,mf4,ta,mu
|
||||
; CHECK-NEXT: vfmax.vv v8, v8, v9
|
||||
; CHECK-NEXT: ret
|
||||
%v = call <vscale x 1 x half> @llvm.maxnum.nxv1f16(<vscale x 1 x half> %a, <vscale x 1 x half> %b)
|
||||
ret <vscale x 1 x half> %v
|
||||
}
|
||||
|
||||
define <vscale x 1 x half> @vfmax_nxv1f16_vf(<vscale x 1 x half> %a, half %b) {
|
||||
; CHECK-LABEL: vfmax_nxv1f16_vf:
|
||||
; CHECK: # %bb.0:
|
||||
; CHECK-NEXT: vsetvli a0, zero, e16,mf4,ta,mu
|
||||
; CHECK-NEXT: vfmax.vf v8, v8, fa0
|
||||
; CHECK-NEXT: ret
|
||||
%head = insertelement <vscale x 1 x half> undef, half %b, i32 0
|
||||
%splat = shufflevector <vscale x 1 x half> %head, <vscale x 1 x half> undef, <vscale x 1 x i32> zeroinitializer
|
||||
%v = call <vscale x 1 x half> @llvm.maxnum.nxv1f16(<vscale x 1 x half> %a, <vscale x 1 x half> %splat)
|
||||
ret <vscale x 1 x half> %v
|
||||
}
|
||||
|
||||
declare <vscale x 2 x half> @llvm.maxnum.nxv2f16(<vscale x 2 x half>, <vscale x 2 x half>)
|
||||
|
||||
define <vscale x 2 x half> @vfmax_nxv2f16_vv(<vscale x 2 x half> %a, <vscale x 2 x half> %b) {
|
||||
; CHECK-LABEL: vfmax_nxv2f16_vv:
|
||||
; CHECK: # %bb.0:
|
||||
; CHECK-NEXT: vsetvli a0, zero, e16,mf2,ta,mu
|
||||
; CHECK-NEXT: vfmax.vv v8, v8, v9
|
||||
; CHECK-NEXT: ret
|
||||
%v = call <vscale x 2 x half> @llvm.maxnum.nxv2f16(<vscale x 2 x half> %a, <vscale x 2 x half> %b)
|
||||
ret <vscale x 2 x half> %v
|
||||
}
|
||||
|
||||
define <vscale x 2 x half> @vfmax_nxv2f16_vf(<vscale x 2 x half> %a, half %b) {
|
||||
; CHECK-LABEL: vfmax_nxv2f16_vf:
|
||||
; CHECK: # %bb.0:
|
||||
; CHECK-NEXT: vsetvli a0, zero, e16,mf2,ta,mu
|
||||
; CHECK-NEXT: vfmax.vf v8, v8, fa0
|
||||
; CHECK-NEXT: ret
|
||||
%head = insertelement <vscale x 2 x half> undef, half %b, i32 0
|
||||
%splat = shufflevector <vscale x 2 x half> %head, <vscale x 2 x half> undef, <vscale x 2 x i32> zeroinitializer
|
||||
%v = call <vscale x 2 x half> @llvm.maxnum.nxv2f16(<vscale x 2 x half> %a, <vscale x 2 x half> %splat)
|
||||
ret <vscale x 2 x half> %v
|
||||
}
|
||||
|
||||
declare <vscale x 4 x half> @llvm.maxnum.nxv4f16(<vscale x 4 x half>, <vscale x 4 x half>)
|
||||
|
||||
define <vscale x 4 x half> @vfmax_nxv4f16_vv(<vscale x 4 x half> %a, <vscale x 4 x half> %b) {
|
||||
; CHECK-LABEL: vfmax_nxv4f16_vv:
|
||||
; CHECK: # %bb.0:
|
||||
; CHECK-NEXT: vsetvli a0, zero, e16,m1,ta,mu
|
||||
; CHECK-NEXT: vfmax.vv v8, v8, v9
|
||||
; CHECK-NEXT: ret
|
||||
%v = call <vscale x 4 x half> @llvm.maxnum.nxv4f16(<vscale x 4 x half> %a, <vscale x 4 x half> %b)
|
||||
ret <vscale x 4 x half> %v
|
||||
}
|
||||
|
||||
define <vscale x 4 x half> @vfmax_nxv4f16_vf(<vscale x 4 x half> %a, half %b) {
|
||||
; CHECK-LABEL: vfmax_nxv4f16_vf:
|
||||
; CHECK: # %bb.0:
|
||||
; CHECK-NEXT: vsetvli a0, zero, e16,m1,ta,mu
|
||||
; CHECK-NEXT: vfmax.vf v8, v8, fa0
|
||||
; CHECK-NEXT: ret
|
||||
%head = insertelement <vscale x 4 x half> undef, half %b, i32 0
|
||||
%splat = shufflevector <vscale x 4 x half> %head, <vscale x 4 x half> undef, <vscale x 4 x i32> zeroinitializer
|
||||
%v = call <vscale x 4 x half> @llvm.maxnum.nxv4f16(<vscale x 4 x half> %a, <vscale x 4 x half> %splat)
|
||||
ret <vscale x 4 x half> %v
|
||||
}
|
||||
|
||||
declare <vscale x 8 x half> @llvm.maxnum.nxv8f16(<vscale x 8 x half>, <vscale x 8 x half>)
|
||||
|
||||
define <vscale x 8 x half> @vfmax_nxv8f16_vv(<vscale x 8 x half> %a, <vscale x 8 x half> %b) {
|
||||
; CHECK-LABEL: vfmax_nxv8f16_vv:
|
||||
; CHECK: # %bb.0:
|
||||
; CHECK-NEXT: vsetvli a0, zero, e16,m2,ta,mu
|
||||
; CHECK-NEXT: vfmax.vv v8, v8, v10
|
||||
; CHECK-NEXT: ret
|
||||
%v = call <vscale x 8 x half> @llvm.maxnum.nxv8f16(<vscale x 8 x half> %a, <vscale x 8 x half> %b)
|
||||
ret <vscale x 8 x half> %v
|
||||
}
|
||||
|
||||
define <vscale x 8 x half> @vfmax_nxv8f16_vf(<vscale x 8 x half> %a, half %b) {
|
||||
; CHECK-LABEL: vfmax_nxv8f16_vf:
|
||||
; CHECK: # %bb.0:
|
||||
; CHECK-NEXT: vsetvli a0, zero, e16,m2,ta,mu
|
||||
; CHECK-NEXT: vfmax.vf v8, v8, fa0
|
||||
; CHECK-NEXT: ret
|
||||
%head = insertelement <vscale x 8 x half> undef, half %b, i32 0
|
||||
%splat = shufflevector <vscale x 8 x half> %head, <vscale x 8 x half> undef, <vscale x 8 x i32> zeroinitializer
|
||||
%v = call <vscale x 8 x half> @llvm.maxnum.nxv8f16(<vscale x 8 x half> %a, <vscale x 8 x half> %splat)
|
||||
ret <vscale x 8 x half> %v
|
||||
}
|
||||
|
||||
declare <vscale x 16 x half> @llvm.maxnum.nxv16f16(<vscale x 16 x half>, <vscale x 16 x half>)
|
||||
|
||||
define <vscale x 16 x half> @vfmax_nxv16f16_vv(<vscale x 16 x half> %a, <vscale x 16 x half> %b) {
|
||||
; CHECK-LABEL: vfmax_nxv16f16_vv:
|
||||
; CHECK: # %bb.0:
|
||||
; CHECK-NEXT: vsetvli a0, zero, e16,m4,ta,mu
|
||||
; CHECK-NEXT: vfmax.vv v8, v8, v12
|
||||
; CHECK-NEXT: ret
|
||||
%v = call <vscale x 16 x half> @llvm.maxnum.nxv16f16(<vscale x 16 x half> %a, <vscale x 16 x half> %b)
|
||||
ret <vscale x 16 x half> %v
|
||||
}
|
||||
|
||||
define <vscale x 16 x half> @vfmax_nxv16f16_vf(<vscale x 16 x half> %a, half %b) {
|
||||
; CHECK-LABEL: vfmax_nxv16f16_vf:
|
||||
; CHECK: # %bb.0:
|
||||
; CHECK-NEXT: vsetvli a0, zero, e16,m4,ta,mu
|
||||
; CHECK-NEXT: vfmax.vf v8, v8, fa0
|
||||
; CHECK-NEXT: ret
|
||||
%head = insertelement <vscale x 16 x half> undef, half %b, i32 0
|
||||
%splat = shufflevector <vscale x 16 x half> %head, <vscale x 16 x half> undef, <vscale x 16 x i32> zeroinitializer
|
||||
%v = call <vscale x 16 x half> @llvm.maxnum.nxv16f16(<vscale x 16 x half> %a, <vscale x 16 x half> %splat)
|
||||
ret <vscale x 16 x half> %v
|
||||
}
|
||||
|
||||
declare <vscale x 32 x half> @llvm.maxnum.nxv32f16(<vscale x 32 x half>, <vscale x 32 x half>)
|
||||
|
||||
define <vscale x 32 x half> @vfmax_nxv32f16_vv(<vscale x 32 x half> %a, <vscale x 32 x half> %b) {
|
||||
; CHECK-LABEL: vfmax_nxv32f16_vv:
|
||||
; CHECK: # %bb.0:
|
||||
; CHECK-NEXT: vsetvli a0, zero, e16,m8,ta,mu
|
||||
; CHECK-NEXT: vfmax.vv v8, v8, v16
|
||||
; CHECK-NEXT: ret
|
||||
%v = call <vscale x 32 x half> @llvm.maxnum.nxv32f16(<vscale x 32 x half> %a, <vscale x 32 x half> %b)
|
||||
ret <vscale x 32 x half> %v
|
||||
}
|
||||
|
||||
define <vscale x 32 x half> @vfmax_nxv32f16_vf(<vscale x 32 x half> %a, half %b) {
|
||||
; CHECK-LABEL: vfmax_nxv32f16_vf:
|
||||
; CHECK: # %bb.0:
|
||||
; CHECK-NEXT: vsetvli a0, zero, e16,m8,ta,mu
|
||||
; CHECK-NEXT: vfmax.vf v8, v8, fa0
|
||||
; CHECK-NEXT: ret
|
||||
%head = insertelement <vscale x 32 x half> undef, half %b, i32 0
|
||||
%splat = shufflevector <vscale x 32 x half> %head, <vscale x 32 x half> undef, <vscale x 32 x i32> zeroinitializer
|
||||
%v = call <vscale x 32 x half> @llvm.maxnum.nxv32f16(<vscale x 32 x half> %a, <vscale x 32 x half> %splat)
|
||||
ret <vscale x 32 x half> %v
|
||||
}
|
||||
|
||||
declare <vscale x 1 x float> @llvm.maxnum.nxv1f32(<vscale x 1 x float>, <vscale x 1 x float>)
|
||||
|
||||
define <vscale x 1 x float> @vfmax_nxv1f32_vv(<vscale x 1 x float> %a, <vscale x 1 x float> %b) {
|
||||
; CHECK-LABEL: vfmax_nxv1f32_vv:
|
||||
; CHECK: # %bb.0:
|
||||
; CHECK-NEXT: vsetvli a0, zero, e32,mf2,ta,mu
|
||||
; CHECK-NEXT: vfmax.vv v8, v8, v9
|
||||
; CHECK-NEXT: ret
|
||||
%v = call <vscale x 1 x float> @llvm.maxnum.nxv1f32(<vscale x 1 x float> %a, <vscale x 1 x float> %b)
|
||||
ret <vscale x 1 x float> %v
|
||||
}
|
||||
|
||||
define <vscale x 1 x float> @vfmax_nxv1f32_vf(<vscale x 1 x float> %a, float %b) {
|
||||
; CHECK-LABEL: vfmax_nxv1f32_vf:
|
||||
; CHECK: # %bb.0:
|
||||
; CHECK-NEXT: vsetvli a0, zero, e32,mf2,ta,mu
|
||||
; CHECK-NEXT: vfmax.vf v8, v8, fa0
|
||||
; CHECK-NEXT: ret
|
||||
%head = insertelement <vscale x 1 x float> undef, float %b, i32 0
|
||||
%splat = shufflevector <vscale x 1 x float> %head, <vscale x 1 x float> undef, <vscale x 1 x i32> zeroinitializer
|
||||
%v = call <vscale x 1 x float> @llvm.maxnum.nxv1f32(<vscale x 1 x float> %a, <vscale x 1 x float> %splat)
|
||||
ret <vscale x 1 x float> %v
|
||||
}
|
||||
|
||||
declare <vscale x 2 x float> @llvm.maxnum.nxv2f32(<vscale x 2 x float>, <vscale x 2 x float>)
|
||||
|
||||
define <vscale x 2 x float> @vfmax_nxv2f32_vv(<vscale x 2 x float> %a, <vscale x 2 x float> %b) {
|
||||
; CHECK-LABEL: vfmax_nxv2f32_vv:
|
||||
; CHECK: # %bb.0:
|
||||
; CHECK-NEXT: vsetvli a0, zero, e32,m1,ta,mu
|
||||
; CHECK-NEXT: vfmax.vv v8, v8, v9
|
||||
; CHECK-NEXT: ret
|
||||
%v = call <vscale x 2 x float> @llvm.maxnum.nxv2f32(<vscale x 2 x float> %a, <vscale x 2 x float> %b)
|
||||
ret <vscale x 2 x float> %v
|
||||
}
|
||||
|
||||
define <vscale x 2 x float> @vfmax_nxv2f32_vf(<vscale x 2 x float> %a, float %b) {
|
||||
; CHECK-LABEL: vfmax_nxv2f32_vf:
|
||||
; CHECK: # %bb.0:
|
||||
; CHECK-NEXT: vsetvli a0, zero, e32,m1,ta,mu
|
||||
; CHECK-NEXT: vfmax.vf v8, v8, fa0
|
||||
; CHECK-NEXT: ret
|
||||
%head = insertelement <vscale x 2 x float> undef, float %b, i32 0
|
||||
%splat = shufflevector <vscale x 2 x float> %head, <vscale x 2 x float> undef, <vscale x 2 x i32> zeroinitializer
|
||||
%v = call <vscale x 2 x float> @llvm.maxnum.nxv2f32(<vscale x 2 x float> %a, <vscale x 2 x float> %splat)
|
||||
ret <vscale x 2 x float> %v
|
||||
}
|
||||
|
||||
declare <vscale x 4 x float> @llvm.maxnum.nxv4f32(<vscale x 4 x float>, <vscale x 4 x float>)
|
||||
|
||||
define <vscale x 4 x float> @vfmax_nxv4f32_vv(<vscale x 4 x float> %a, <vscale x 4 x float> %b) {
|
||||
; CHECK-LABEL: vfmax_nxv4f32_vv:
|
||||
; CHECK: # %bb.0:
|
||||
; CHECK-NEXT: vsetvli a0, zero, e32,m2,ta,mu
|
||||
; CHECK-NEXT: vfmax.vv v8, v8, v10
|
||||
; CHECK-NEXT: ret
|
||||
%v = call <vscale x 4 x float> @llvm.maxnum.nxv4f32(<vscale x 4 x float> %a, <vscale x 4 x float> %b)
|
||||
ret <vscale x 4 x float> %v
|
||||
}
|
||||
|
||||
define <vscale x 4 x float> @vfmax_nxv4f32_vf(<vscale x 4 x float> %a, float %b) {
|
||||
; CHECK-LABEL: vfmax_nxv4f32_vf:
|
||||
; CHECK: # %bb.0:
|
||||
; CHECK-NEXT: vsetvli a0, zero, e32,m2,ta,mu
|
||||
; CHECK-NEXT: vfmax.vf v8, v8, fa0
|
||||
; CHECK-NEXT: ret
|
||||
%head = insertelement <vscale x 4 x float> undef, float %b, i32 0
|
||||
%splat = shufflevector <vscale x 4 x float> %head, <vscale x 4 x float> undef, <vscale x 4 x i32> zeroinitializer
|
||||
%v = call <vscale x 4 x float> @llvm.maxnum.nxv4f32(<vscale x 4 x float> %a, <vscale x 4 x float> %splat)
|
||||
ret <vscale x 4 x float> %v
|
||||
}
|
||||
|
||||
declare <vscale x 8 x float> @llvm.maxnum.nxv8f32(<vscale x 8 x float>, <vscale x 8 x float>)
|
||||
|
||||
define <vscale x 8 x float> @vfmax_nxv8f32_vv(<vscale x 8 x float> %a, <vscale x 8 x float> %b) {
|
||||
; CHECK-LABEL: vfmax_nxv8f32_vv:
|
||||
; CHECK: # %bb.0:
|
||||
; CHECK-NEXT: vsetvli a0, zero, e32,m4,ta,mu
|
||||
; CHECK-NEXT: vfmax.vv v8, v8, v12
|
||||
; CHECK-NEXT: ret
|
||||
%v = call <vscale x 8 x float> @llvm.maxnum.nxv8f32(<vscale x 8 x float> %a, <vscale x 8 x float> %b)
|
||||
ret <vscale x 8 x float> %v
|
||||
}
|
||||
|
||||
define <vscale x 8 x float> @vfmax_nxv8f32_vf(<vscale x 8 x float> %a, float %b) {
|
||||
; CHECK-LABEL: vfmax_nxv8f32_vf:
|
||||
; CHECK: # %bb.0:
|
||||
; CHECK-NEXT: vsetvli a0, zero, e32,m4,ta,mu
|
||||
; CHECK-NEXT: vfmax.vf v8, v8, fa0
|
||||
; CHECK-NEXT: ret
|
||||
%head = insertelement <vscale x 8 x float> undef, float %b, i32 0
|
||||
%splat = shufflevector <vscale x 8 x float> %head, <vscale x 8 x float> undef, <vscale x 8 x i32> zeroinitializer
|
||||
%v = call <vscale x 8 x float> @llvm.maxnum.nxv8f32(<vscale x 8 x float> %a, <vscale x 8 x float> %splat)
|
||||
ret <vscale x 8 x float> %v
|
||||
}
|
||||
|
||||
declare <vscale x 16 x float> @llvm.maxnum.nxv16f32(<vscale x 16 x float>, <vscale x 16 x float>)
|
||||
|
||||
define <vscale x 16 x float> @vfmax_nxv16f32_vv(<vscale x 16 x float> %a, <vscale x 16 x float> %b) {
|
||||
; CHECK-LABEL: vfmax_nxv16f32_vv:
|
||||
; CHECK: # %bb.0:
|
||||
; CHECK-NEXT: vsetvli a0, zero, e32,m8,ta,mu
|
||||
; CHECK-NEXT: vfmax.vv v8, v8, v16
|
||||
; CHECK-NEXT: ret
|
||||
%v = call <vscale x 16 x float> @llvm.maxnum.nxv16f32(<vscale x 16 x float> %a, <vscale x 16 x float> %b)
|
||||
ret <vscale x 16 x float> %v
|
||||
}
|
||||
|
||||
define <vscale x 16 x float> @vfmax_nxv16f32_vf(<vscale x 16 x float> %a, float %b) {
|
||||
; CHECK-LABEL: vfmax_nxv16f32_vf:
|
||||
; CHECK: # %bb.0:
|
||||
; CHECK-NEXT: vsetvli a0, zero, e32,m8,ta,mu
|
||||
; CHECK-NEXT: vfmax.vf v8, v8, fa0
|
||||
; CHECK-NEXT: ret
|
||||
%head = insertelement <vscale x 16 x float> undef, float %b, i32 0
|
||||
%splat = shufflevector <vscale x 16 x float> %head, <vscale x 16 x float> undef, <vscale x 16 x i32> zeroinitializer
|
||||
%v = call <vscale x 16 x float> @llvm.maxnum.nxv16f32(<vscale x 16 x float> %a, <vscale x 16 x float> %splat)
|
||||
ret <vscale x 16 x float> %v
|
||||
}
|
||||
|
||||
declare <vscale x 1 x double> @llvm.maxnum.nxv1f64(<vscale x 1 x double>, <vscale x 1 x double>)
|
||||
|
||||
define <vscale x 1 x double> @vfmax_nxv1f64_vv(<vscale x 1 x double> %a, <vscale x 1 x double> %b) {
|
||||
; CHECK-LABEL: vfmax_nxv1f64_vv:
|
||||
; CHECK: # %bb.0:
|
||||
; CHECK-NEXT: vsetvli a0, zero, e64,m1,ta,mu
|
||||
; CHECK-NEXT: vfmax.vv v8, v8, v9
|
||||
; CHECK-NEXT: ret
|
||||
%v = call <vscale x 1 x double> @llvm.maxnum.nxv1f64(<vscale x 1 x double> %a, <vscale x 1 x double> %b)
|
||||
ret <vscale x 1 x double> %v
|
||||
}
|
||||
|
||||
define <vscale x 1 x double> @vfmax_nxv1f64_vf(<vscale x 1 x double> %a, double %b) {
|
||||
; CHECK-LABEL: vfmax_nxv1f64_vf:
|
||||
; CHECK: # %bb.0:
|
||||
; CHECK-NEXT: vsetvli a0, zero, e64,m1,ta,mu
|
||||
; CHECK-NEXT: vfmax.vf v8, v8, fa0
|
||||
; CHECK-NEXT: ret
|
||||
%head = insertelement <vscale x 1 x double> undef, double %b, i32 0
|
||||
%splat = shufflevector <vscale x 1 x double> %head, <vscale x 1 x double> undef, <vscale x 1 x i32> zeroinitializer
|
||||
%v = call <vscale x 1 x double> @llvm.maxnum.nxv1f64(<vscale x 1 x double> %a, <vscale x 1 x double> %splat)
|
||||
ret <vscale x 1 x double> %v
|
||||
}
|
||||
|
||||
declare <vscale x 2 x double> @llvm.maxnum.nxv2f64(<vscale x 2 x double>, <vscale x 2 x double>)
|
||||
|
||||
define <vscale x 2 x double> @vfmax_nxv2f64_vv(<vscale x 2 x double> %a, <vscale x 2 x double> %b) {
|
||||
; CHECK-LABEL: vfmax_nxv2f64_vv:
|
||||
; CHECK: # %bb.0:
|
||||
; CHECK-NEXT: vsetvli a0, zero, e64,m2,ta,mu
|
||||
; CHECK-NEXT: vfmax.vv v8, v8, v10
|
||||
; CHECK-NEXT: ret
|
||||
%v = call <vscale x 2 x double> @llvm.maxnum.nxv2f64(<vscale x 2 x double> %a, <vscale x 2 x double> %b)
|
||||
ret <vscale x 2 x double> %v
|
||||
}
|
||||
|
||||
define <vscale x 2 x double> @vfmax_nxv2f64_vf(<vscale x 2 x double> %a, double %b) {
|
||||
; CHECK-LABEL: vfmax_nxv2f64_vf:
|
||||
; CHECK: # %bb.0:
|
||||
; CHECK-NEXT: vsetvli a0, zero, e64,m2,ta,mu
|
||||
; CHECK-NEXT: vfmax.vf v8, v8, fa0
|
||||
; CHECK-NEXT: ret
|
||||
%head = insertelement <vscale x 2 x double> undef, double %b, i32 0
|
||||
%splat = shufflevector <vscale x 2 x double> %head, <vscale x 2 x double> undef, <vscale x 2 x i32> zeroinitializer
|
||||
%v = call <vscale x 2 x double> @llvm.maxnum.nxv2f64(<vscale x 2 x double> %a, <vscale x 2 x double> %splat)
|
||||
ret <vscale x 2 x double> %v
|
||||
}
|
||||
|
||||
declare <vscale x 4 x double> @llvm.maxnum.nxv4f64(<vscale x 4 x double>, <vscale x 4 x double>)
|
||||
|
||||
define <vscale x 4 x double> @vfmax_nxv4f64_vv(<vscale x 4 x double> %a, <vscale x 4 x double> %b) {
|
||||
; CHECK-LABEL: vfmax_nxv4f64_vv:
|
||||
; CHECK: # %bb.0:
|
||||
; CHECK-NEXT: vsetvli a0, zero, e64,m4,ta,mu
|
||||
; CHECK-NEXT: vfmax.vv v8, v8, v12
|
||||
; CHECK-NEXT: ret
|
||||
%v = call <vscale x 4 x double> @llvm.maxnum.nxv4f64(<vscale x 4 x double> %a, <vscale x 4 x double> %b)
|
||||
ret <vscale x 4 x double> %v
|
||||
}
|
||||
|
||||
define <vscale x 4 x double> @vfmax_nxv4f64_vf(<vscale x 4 x double> %a, double %b) {
|
||||
; CHECK-LABEL: vfmax_nxv4f64_vf:
|
||||
; CHECK: # %bb.0:
|
||||
; CHECK-NEXT: vsetvli a0, zero, e64,m4,ta,mu
|
||||
; CHECK-NEXT: vfmax.vf v8, v8, fa0
|
||||
; CHECK-NEXT: ret
|
||||
%head = insertelement <vscale x 4 x double> undef, double %b, i32 0
|
||||
%splat = shufflevector <vscale x 4 x double> %head, <vscale x 4 x double> undef, <vscale x 4 x i32> zeroinitializer
|
||||
%v = call <vscale x 4 x double> @llvm.maxnum.nxv4f64(<vscale x 4 x double> %a, <vscale x 4 x double> %splat)
|
||||
ret <vscale x 4 x double> %v
|
||||
}
|
||||
|
||||
declare <vscale x 8 x double> @llvm.maxnum.nxv8f64(<vscale x 8 x double>, <vscale x 8 x double>)
|
||||
|
||||
define <vscale x 8 x double> @vfmax_nxv8f64_vv(<vscale x 8 x double> %a, <vscale x 8 x double> %b) {
|
||||
; CHECK-LABEL: vfmax_nxv8f64_vv:
|
||||
; CHECK: # %bb.0:
|
||||
; CHECK-NEXT: vsetvli a0, zero, e64,m8,ta,mu
|
||||
; CHECK-NEXT: vfmax.vv v8, v8, v16
|
||||
; CHECK-NEXT: ret
|
||||
%v = call <vscale x 8 x double> @llvm.maxnum.nxv8f64(<vscale x 8 x double> %a, <vscale x 8 x double> %b)
|
||||
ret <vscale x 8 x double> %v
|
||||
}
|
||||
|
||||
define <vscale x 8 x double> @vfmax_nxv8f64_vf(<vscale x 8 x double> %a, double %b) {
|
||||
; CHECK-LABEL: vfmax_nxv8f64_vf:
|
||||
; CHECK: # %bb.0:
|
||||
; CHECK-NEXT: vsetvli a0, zero, e64,m8,ta,mu
|
||||
; CHECK-NEXT: vfmax.vf v8, v8, fa0
|
||||
; CHECK-NEXT: ret
|
||||
%head = insertelement <vscale x 8 x double> undef, double %b, i32 0
|
||||
%splat = shufflevector <vscale x 8 x double> %head, <vscale x 8 x double> undef, <vscale x 8 x i32> zeroinitializer
|
||||
%v = call <vscale x 8 x double> @llvm.maxnum.nxv8f64(<vscale x 8 x double> %a, <vscale x 8 x double> %splat)
|
||||
ret <vscale x 8 x double> %v
|
||||
}
|
||||
|
|
@ -0,0 +1,365 @@
|
|||
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
|
||||
; RUN: llc -mtriple=riscv32 -mattr=+d,+experimental-zfh,+experimental-v -target-abi=ilp32d \
|
||||
; RUN: -verify-machineinstrs < %s | FileCheck %s
|
||||
; RUN: llc -mtriple=riscv64 -mattr=+d,+experimental-zfh,+experimental-v -target-abi=lp64d \
|
||||
; RUN: -verify-machineinstrs < %s | FileCheck %s
|
||||
|
||||
declare <vscale x 1 x half> @llvm.minnum.nxv1f16(<vscale x 1 x half>, <vscale x 1 x half>)
|
||||
|
||||
define <vscale x 1 x half> @vfmin_nxv1f16_vv(<vscale x 1 x half> %a, <vscale x 1 x half> %b) {
|
||||
; CHECK-LABEL: vfmin_nxv1f16_vv:
|
||||
; CHECK: # %bb.0:
|
||||
; CHECK-NEXT: vsetvli a0, zero, e16,mf4,ta,mu
|
||||
; CHECK-NEXT: vfmin.vv v8, v8, v9
|
||||
; CHECK-NEXT: ret
|
||||
%v = call <vscale x 1 x half> @llvm.minnum.nxv1f16(<vscale x 1 x half> %a, <vscale x 1 x half> %b)
|
||||
ret <vscale x 1 x half> %v
|
||||
}
|
||||
|
||||
define <vscale x 1 x half> @vfmin_nxv1f16_vf(<vscale x 1 x half> %a, half %b) {
|
||||
; CHECK-LABEL: vfmin_nxv1f16_vf:
|
||||
; CHECK: # %bb.0:
|
||||
; CHECK-NEXT: vsetvli a0, zero, e16,mf4,ta,mu
|
||||
; CHECK-NEXT: vfmin.vf v8, v8, fa0
|
||||
; CHECK-NEXT: ret
|
||||
%head = insertelement <vscale x 1 x half> undef, half %b, i32 0
|
||||
%splat = shufflevector <vscale x 1 x half> %head, <vscale x 1 x half> undef, <vscale x 1 x i32> zeroinitializer
|
||||
%v = call <vscale x 1 x half> @llvm.minnum.nxv1f16(<vscale x 1 x half> %a, <vscale x 1 x half> %splat)
|
||||
ret <vscale x 1 x half> %v
|
||||
}
|
||||
|
||||
declare <vscale x 2 x half> @llvm.minnum.nxv2f16(<vscale x 2 x half>, <vscale x 2 x half>)
|
||||
|
||||
define <vscale x 2 x half> @vfmin_nxv2f16_vv(<vscale x 2 x half> %a, <vscale x 2 x half> %b) {
|
||||
; CHECK-LABEL: vfmin_nxv2f16_vv:
|
||||
; CHECK: # %bb.0:
|
||||
; CHECK-NEXT: vsetvli a0, zero, e16,mf2,ta,mu
|
||||
; CHECK-NEXT: vfmin.vv v8, v8, v9
|
||||
; CHECK-NEXT: ret
|
||||
%v = call <vscale x 2 x half> @llvm.minnum.nxv2f16(<vscale x 2 x half> %a, <vscale x 2 x half> %b)
|
||||
ret <vscale x 2 x half> %v
|
||||
}
|
||||
|
||||
define <vscale x 2 x half> @vfmin_nxv2f16_vf(<vscale x 2 x half> %a, half %b) {
|
||||
; CHECK-LABEL: vfmin_nxv2f16_vf:
|
||||
; CHECK: # %bb.0:
|
||||
; CHECK-NEXT: vsetvli a0, zero, e16,mf2,ta,mu
|
||||
; CHECK-NEXT: vfmin.vf v8, v8, fa0
|
||||
; CHECK-NEXT: ret
|
||||
%head = insertelement <vscale x 2 x half> undef, half %b, i32 0
|
||||
%splat = shufflevector <vscale x 2 x half> %head, <vscale x 2 x half> undef, <vscale x 2 x i32> zeroinitializer
|
||||
%v = call <vscale x 2 x half> @llvm.minnum.nxv2f16(<vscale x 2 x half> %a, <vscale x 2 x half> %splat)
|
||||
ret <vscale x 2 x half> %v
|
||||
}
|
||||
|
||||
declare <vscale x 4 x half> @llvm.minnum.nxv4f16(<vscale x 4 x half>, <vscale x 4 x half>)
|
||||
|
||||
define <vscale x 4 x half> @vfmin_nxv4f16_vv(<vscale x 4 x half> %a, <vscale x 4 x half> %b) {
|
||||
; CHECK-LABEL: vfmin_nxv4f16_vv:
|
||||
; CHECK: # %bb.0:
|
||||
; CHECK-NEXT: vsetvli a0, zero, e16,m1,ta,mu
|
||||
; CHECK-NEXT: vfmin.vv v8, v8, v9
|
||||
; CHECK-NEXT: ret
|
||||
%v = call <vscale x 4 x half> @llvm.minnum.nxv4f16(<vscale x 4 x half> %a, <vscale x 4 x half> %b)
|
||||
ret <vscale x 4 x half> %v
|
||||
}
|
||||
|
||||
define <vscale x 4 x half> @vfmin_nxv4f16_vf(<vscale x 4 x half> %a, half %b) {
|
||||
; CHECK-LABEL: vfmin_nxv4f16_vf:
|
||||
; CHECK: # %bb.0:
|
||||
; CHECK-NEXT: vsetvli a0, zero, e16,m1,ta,mu
|
||||
; CHECK-NEXT: vfmin.vf v8, v8, fa0
|
||||
; CHECK-NEXT: ret
|
||||
%head = insertelement <vscale x 4 x half> undef, half %b, i32 0
|
||||
%splat = shufflevector <vscale x 4 x half> %head, <vscale x 4 x half> undef, <vscale x 4 x i32> zeroinitializer
|
||||
%v = call <vscale x 4 x half> @llvm.minnum.nxv4f16(<vscale x 4 x half> %a, <vscale x 4 x half> %splat)
|
||||
ret <vscale x 4 x half> %v
|
||||
}
|
||||
|
||||
declare <vscale x 8 x half> @llvm.minnum.nxv8f16(<vscale x 8 x half>, <vscale x 8 x half>)
|
||||
|
||||
define <vscale x 8 x half> @vfmin_nxv8f16_vv(<vscale x 8 x half> %a, <vscale x 8 x half> %b) {
|
||||
; CHECK-LABEL: vfmin_nxv8f16_vv:
|
||||
; CHECK: # %bb.0:
|
||||
; CHECK-NEXT: vsetvli a0, zero, e16,m2,ta,mu
|
||||
; CHECK-NEXT: vfmin.vv v8, v8, v10
|
||||
; CHECK-NEXT: ret
|
||||
%v = call <vscale x 8 x half> @llvm.minnum.nxv8f16(<vscale x 8 x half> %a, <vscale x 8 x half> %b)
|
||||
ret <vscale x 8 x half> %v
|
||||
}
|
||||
|
||||
define <vscale x 8 x half> @vfmin_nxv8f16_vf(<vscale x 8 x half> %a, half %b) {
|
||||
; CHECK-LABEL: vfmin_nxv8f16_vf:
|
||||
; CHECK: # %bb.0:
|
||||
; CHECK-NEXT: vsetvli a0, zero, e16,m2,ta,mu
|
||||
; CHECK-NEXT: vfmin.vf v8, v8, fa0
|
||||
; CHECK-NEXT: ret
|
||||
%head = insertelement <vscale x 8 x half> undef, half %b, i32 0
|
||||
%splat = shufflevector <vscale x 8 x half> %head, <vscale x 8 x half> undef, <vscale x 8 x i32> zeroinitializer
|
||||
%v = call <vscale x 8 x half> @llvm.minnum.nxv8f16(<vscale x 8 x half> %a, <vscale x 8 x half> %splat)
|
||||
ret <vscale x 8 x half> %v
|
||||
}
|
||||
|
||||
declare <vscale x 16 x half> @llvm.minnum.nxv16f16(<vscale x 16 x half>, <vscale x 16 x half>)
|
||||
|
||||
define <vscale x 16 x half> @vfmin_nxv16f16_vv(<vscale x 16 x half> %a, <vscale x 16 x half> %b) {
|
||||
; CHECK-LABEL: vfmin_nxv16f16_vv:
|
||||
; CHECK: # %bb.0:
|
||||
; CHECK-NEXT: vsetvli a0, zero, e16,m4,ta,mu
|
||||
; CHECK-NEXT: vfmin.vv v8, v8, v12
|
||||
; CHECK-NEXT: ret
|
||||
%v = call <vscale x 16 x half> @llvm.minnum.nxv16f16(<vscale x 16 x half> %a, <vscale x 16 x half> %b)
|
||||
ret <vscale x 16 x half> %v
|
||||
}
|
||||
|
||||
define <vscale x 16 x half> @vfmin_nxv16f16_vf(<vscale x 16 x half> %a, half %b) {
|
||||
; CHECK-LABEL: vfmin_nxv16f16_vf:
|
||||
; CHECK: # %bb.0:
|
||||
; CHECK-NEXT: vsetvli a0, zero, e16,m4,ta,mu
|
||||
; CHECK-NEXT: vfmin.vf v8, v8, fa0
|
||||
; CHECK-NEXT: ret
|
||||
%head = insertelement <vscale x 16 x half> undef, half %b, i32 0
|
||||
%splat = shufflevector <vscale x 16 x half> %head, <vscale x 16 x half> undef, <vscale x 16 x i32> zeroinitializer
|
||||
%v = call <vscale x 16 x half> @llvm.minnum.nxv16f16(<vscale x 16 x half> %a, <vscale x 16 x half> %splat)
|
||||
ret <vscale x 16 x half> %v
|
||||
}
|
||||
|
||||
declare <vscale x 32 x half> @llvm.minnum.nxv32f16(<vscale x 32 x half>, <vscale x 32 x half>)
|
||||
|
||||
define <vscale x 32 x half> @vfmin_nxv32f16_vv(<vscale x 32 x half> %a, <vscale x 32 x half> %b) {
|
||||
; CHECK-LABEL: vfmin_nxv32f16_vv:
|
||||
; CHECK: # %bb.0:
|
||||
; CHECK-NEXT: vsetvli a0, zero, e16,m8,ta,mu
|
||||
; CHECK-NEXT: vfmin.vv v8, v8, v16
|
||||
; CHECK-NEXT: ret
|
||||
%v = call <vscale x 32 x half> @llvm.minnum.nxv32f16(<vscale x 32 x half> %a, <vscale x 32 x half> %b)
|
||||
ret <vscale x 32 x half> %v
|
||||
}
|
||||
|
||||
define <vscale x 32 x half> @vfmin_nxv32f16_vf(<vscale x 32 x half> %a, half %b) {
|
||||
; CHECK-LABEL: vfmin_nxv32f16_vf:
|
||||
; CHECK: # %bb.0:
|
||||
; CHECK-NEXT: vsetvli a0, zero, e16,m8,ta,mu
|
||||
; CHECK-NEXT: vfmin.vf v8, v8, fa0
|
||||
; CHECK-NEXT: ret
|
||||
%head = insertelement <vscale x 32 x half> undef, half %b, i32 0
|
||||
%splat = shufflevector <vscale x 32 x half> %head, <vscale x 32 x half> undef, <vscale x 32 x i32> zeroinitializer
|
||||
%v = call <vscale x 32 x half> @llvm.minnum.nxv32f16(<vscale x 32 x half> %a, <vscale x 32 x half> %splat)
|
||||
ret <vscale x 32 x half> %v
|
||||
}
|
||||
|
||||
declare <vscale x 1 x float> @llvm.minnum.nxv1f32(<vscale x 1 x float>, <vscale x 1 x float>)
|
||||
|
||||
define <vscale x 1 x float> @vfmin_nxv1f32_vv(<vscale x 1 x float> %a, <vscale x 1 x float> %b) {
|
||||
; CHECK-LABEL: vfmin_nxv1f32_vv:
|
||||
; CHECK: # %bb.0:
|
||||
; CHECK-NEXT: vsetvli a0, zero, e32,mf2,ta,mu
|
||||
; CHECK-NEXT: vfmin.vv v8, v8, v9
|
||||
; CHECK-NEXT: ret
|
||||
%v = call <vscale x 1 x float> @llvm.minnum.nxv1f32(<vscale x 1 x float> %a, <vscale x 1 x float> %b)
|
||||
ret <vscale x 1 x float> %v
|
||||
}
|
||||
|
||||
define <vscale x 1 x float> @vfmin_nxv1f32_vf(<vscale x 1 x float> %a, float %b) {
|
||||
; CHECK-LABEL: vfmin_nxv1f32_vf:
|
||||
; CHECK: # %bb.0:
|
||||
; CHECK-NEXT: vsetvli a0, zero, e32,mf2,ta,mu
|
||||
; CHECK-NEXT: vfmin.vf v8, v8, fa0
|
||||
; CHECK-NEXT: ret
|
||||
%head = insertelement <vscale x 1 x float> undef, float %b, i32 0
|
||||
%splat = shufflevector <vscale x 1 x float> %head, <vscale x 1 x float> undef, <vscale x 1 x i32> zeroinitializer
|
||||
%v = call <vscale x 1 x float> @llvm.minnum.nxv1f32(<vscale x 1 x float> %a, <vscale x 1 x float> %splat)
|
||||
ret <vscale x 1 x float> %v
|
||||
}
|
||||
|
||||
declare <vscale x 2 x float> @llvm.minnum.nxv2f32(<vscale x 2 x float>, <vscale x 2 x float>)
|
||||
|
||||
define <vscale x 2 x float> @vfmin_nxv2f32_vv(<vscale x 2 x float> %a, <vscale x 2 x float> %b) {
|
||||
; CHECK-LABEL: vfmin_nxv2f32_vv:
|
||||
; CHECK: # %bb.0:
|
||||
; CHECK-NEXT: vsetvli a0, zero, e32,m1,ta,mu
|
||||
; CHECK-NEXT: vfmin.vv v8, v8, v9
|
||||
; CHECK-NEXT: ret
|
||||
%v = call <vscale x 2 x float> @llvm.minnum.nxv2f32(<vscale x 2 x float> %a, <vscale x 2 x float> %b)
|
||||
ret <vscale x 2 x float> %v
|
||||
}
|
||||
|
||||
define <vscale x 2 x float> @vfmin_nxv2f32_vf(<vscale x 2 x float> %a, float %b) {
|
||||
; CHECK-LABEL: vfmin_nxv2f32_vf:
|
||||
; CHECK: # %bb.0:
|
||||
; CHECK-NEXT: vsetvli a0, zero, e32,m1,ta,mu
|
||||
; CHECK-NEXT: vfmin.vf v8, v8, fa0
|
||||
; CHECK-NEXT: ret
|
||||
%head = insertelement <vscale x 2 x float> undef, float %b, i32 0
|
||||
%splat = shufflevector <vscale x 2 x float> %head, <vscale x 2 x float> undef, <vscale x 2 x i32> zeroinitializer
|
||||
%v = call <vscale x 2 x float> @llvm.minnum.nxv2f32(<vscale x 2 x float> %a, <vscale x 2 x float> %splat)
|
||||
ret <vscale x 2 x float> %v
|
||||
}
|
||||
|
||||
declare <vscale x 4 x float> @llvm.minnum.nxv4f32(<vscale x 4 x float>, <vscale x 4 x float>)
|
||||
|
||||
define <vscale x 4 x float> @vfmin_nxv4f32_vv(<vscale x 4 x float> %a, <vscale x 4 x float> %b) {
|
||||
; CHECK-LABEL: vfmin_nxv4f32_vv:
|
||||
; CHECK: # %bb.0:
|
||||
; CHECK-NEXT: vsetvli a0, zero, e32,m2,ta,mu
|
||||
; CHECK-NEXT: vfmin.vv v8, v8, v10
|
||||
; CHECK-NEXT: ret
|
||||
%v = call <vscale x 4 x float> @llvm.minnum.nxv4f32(<vscale x 4 x float> %a, <vscale x 4 x float> %b)
|
||||
ret <vscale x 4 x float> %v
|
||||
}
|
||||
|
||||
define <vscale x 4 x float> @vfmin_nxv4f32_vf(<vscale x 4 x float> %a, float %b) {
|
||||
; CHECK-LABEL: vfmin_nxv4f32_vf:
|
||||
; CHECK: # %bb.0:
|
||||
; CHECK-NEXT: vsetvli a0, zero, e32,m2,ta,mu
|
||||
; CHECK-NEXT: vfmin.vf v8, v8, fa0
|
||||
; CHECK-NEXT: ret
|
||||
%head = insertelement <vscale x 4 x float> undef, float %b, i32 0
|
||||
%splat = shufflevector <vscale x 4 x float> %head, <vscale x 4 x float> undef, <vscale x 4 x i32> zeroinitializer
|
||||
%v = call <vscale x 4 x float> @llvm.minnum.nxv4f32(<vscale x 4 x float> %a, <vscale x 4 x float> %splat)
|
||||
ret <vscale x 4 x float> %v
|
||||
}
|
||||
|
||||
declare <vscale x 8 x float> @llvm.minnum.nxv8f32(<vscale x 8 x float>, <vscale x 8 x float>)
|
||||
|
||||
define <vscale x 8 x float> @vfmin_nxv8f32_vv(<vscale x 8 x float> %a, <vscale x 8 x float> %b) {
|
||||
; CHECK-LABEL: vfmin_nxv8f32_vv:
|
||||
; CHECK: # %bb.0:
|
||||
; CHECK-NEXT: vsetvli a0, zero, e32,m4,ta,mu
|
||||
; CHECK-NEXT: vfmin.vv v8, v8, v12
|
||||
; CHECK-NEXT: ret
|
||||
%v = call <vscale x 8 x float> @llvm.minnum.nxv8f32(<vscale x 8 x float> %a, <vscale x 8 x float> %b)
|
||||
ret <vscale x 8 x float> %v
|
||||
}
|
||||
|
||||
define <vscale x 8 x float> @vfmin_nxv8f32_vf(<vscale x 8 x float> %a, float %b) {
|
||||
; CHECK-LABEL: vfmin_nxv8f32_vf:
|
||||
; CHECK: # %bb.0:
|
||||
; CHECK-NEXT: vsetvli a0, zero, e32,m4,ta,mu
|
||||
; CHECK-NEXT: vfmin.vf v8, v8, fa0
|
||||
; CHECK-NEXT: ret
|
||||
%head = insertelement <vscale x 8 x float> undef, float %b, i32 0
|
||||
%splat = shufflevector <vscale x 8 x float> %head, <vscale x 8 x float> undef, <vscale x 8 x i32> zeroinitializer
|
||||
%v = call <vscale x 8 x float> @llvm.minnum.nxv8f32(<vscale x 8 x float> %a, <vscale x 8 x float> %splat)
|
||||
ret <vscale x 8 x float> %v
|
||||
}
|
||||
|
||||
declare <vscale x 16 x float> @llvm.minnum.nxv16f32(<vscale x 16 x float>, <vscale x 16 x float>)
|
||||
|
||||
define <vscale x 16 x float> @vfmin_nxv16f32_vv(<vscale x 16 x float> %a, <vscale x 16 x float> %b) {
|
||||
; CHECK-LABEL: vfmin_nxv16f32_vv:
|
||||
; CHECK: # %bb.0:
|
||||
; CHECK-NEXT: vsetvli a0, zero, e32,m8,ta,mu
|
||||
; CHECK-NEXT: vfmin.vv v8, v8, v16
|
||||
; CHECK-NEXT: ret
|
||||
%v = call <vscale x 16 x float> @llvm.minnum.nxv16f32(<vscale x 16 x float> %a, <vscale x 16 x float> %b)
|
||||
ret <vscale x 16 x float> %v
|
||||
}
|
||||
|
||||
define <vscale x 16 x float> @vfmin_nxv16f32_vf(<vscale x 16 x float> %a, float %b) {
|
||||
; CHECK-LABEL: vfmin_nxv16f32_vf:
|
||||
; CHECK: # %bb.0:
|
||||
; CHECK-NEXT: vsetvli a0, zero, e32,m8,ta,mu
|
||||
; CHECK-NEXT: vfmin.vf v8, v8, fa0
|
||||
; CHECK-NEXT: ret
|
||||
%head = insertelement <vscale x 16 x float> undef, float %b, i32 0
|
||||
%splat = shufflevector <vscale x 16 x float> %head, <vscale x 16 x float> undef, <vscale x 16 x i32> zeroinitializer
|
||||
%v = call <vscale x 16 x float> @llvm.minnum.nxv16f32(<vscale x 16 x float> %a, <vscale x 16 x float> %splat)
|
||||
ret <vscale x 16 x float> %v
|
||||
}
|
||||
|
||||
declare <vscale x 1 x double> @llvm.minnum.nxv1f64(<vscale x 1 x double>, <vscale x 1 x double>)
|
||||
|
||||
define <vscale x 1 x double> @vfmin_nxv1f64_vv(<vscale x 1 x double> %a, <vscale x 1 x double> %b) {
|
||||
; CHECK-LABEL: vfmin_nxv1f64_vv:
|
||||
; CHECK: # %bb.0:
|
||||
; CHECK-NEXT: vsetvli a0, zero, e64,m1,ta,mu
|
||||
; CHECK-NEXT: vfmin.vv v8, v8, v9
|
||||
; CHECK-NEXT: ret
|
||||
%v = call <vscale x 1 x double> @llvm.minnum.nxv1f64(<vscale x 1 x double> %a, <vscale x 1 x double> %b)
|
||||
ret <vscale x 1 x double> %v
|
||||
}
|
||||
|
||||
define <vscale x 1 x double> @vfmin_nxv1f64_vf(<vscale x 1 x double> %a, double %b) {
|
||||
; CHECK-LABEL: vfmin_nxv1f64_vf:
|
||||
; CHECK: # %bb.0:
|
||||
; CHECK-NEXT: vsetvli a0, zero, e64,m1,ta,mu
|
||||
; CHECK-NEXT: vfmin.vf v8, v8, fa0
|
||||
; CHECK-NEXT: ret
|
||||
%head = insertelement <vscale x 1 x double> undef, double %b, i32 0
|
||||
%splat = shufflevector <vscale x 1 x double> %head, <vscale x 1 x double> undef, <vscale x 1 x i32> zeroinitializer
|
||||
%v = call <vscale x 1 x double> @llvm.minnum.nxv1f64(<vscale x 1 x double> %a, <vscale x 1 x double> %splat)
|
||||
ret <vscale x 1 x double> %v
|
||||
}
|
||||
|
||||
declare <vscale x 2 x double> @llvm.minnum.nxv2f64(<vscale x 2 x double>, <vscale x 2 x double>)
|
||||
|
||||
define <vscale x 2 x double> @vfmin_nxv2f64_vv(<vscale x 2 x double> %a, <vscale x 2 x double> %b) {
|
||||
; CHECK-LABEL: vfmin_nxv2f64_vv:
|
||||
; CHECK: # %bb.0:
|
||||
; CHECK-NEXT: vsetvli a0, zero, e64,m2,ta,mu
|
||||
; CHECK-NEXT: vfmin.vv v8, v8, v10
|
||||
; CHECK-NEXT: ret
|
||||
%v = call <vscale x 2 x double> @llvm.minnum.nxv2f64(<vscale x 2 x double> %a, <vscale x 2 x double> %b)
|
||||
ret <vscale x 2 x double> %v
|
||||
}
|
||||
|
||||
define <vscale x 2 x double> @vfmin_nxv2f64_vf(<vscale x 2 x double> %a, double %b) {
|
||||
; CHECK-LABEL: vfmin_nxv2f64_vf:
|
||||
; CHECK: # %bb.0:
|
||||
; CHECK-NEXT: vsetvli a0, zero, e64,m2,ta,mu
|
||||
; CHECK-NEXT: vfmin.vf v8, v8, fa0
|
||||
; CHECK-NEXT: ret
|
||||
%head = insertelement <vscale x 2 x double> undef, double %b, i32 0
|
||||
%splat = shufflevector <vscale x 2 x double> %head, <vscale x 2 x double> undef, <vscale x 2 x i32> zeroinitializer
|
||||
%v = call <vscale x 2 x double> @llvm.minnum.nxv2f64(<vscale x 2 x double> %a, <vscale x 2 x double> %splat)
|
||||
ret <vscale x 2 x double> %v
|
||||
}
|
||||
|
||||
declare <vscale x 4 x double> @llvm.minnum.nxv4f64(<vscale x 4 x double>, <vscale x 4 x double>)
|
||||
|
||||
define <vscale x 4 x double> @vfmin_nxv4f64_vv(<vscale x 4 x double> %a, <vscale x 4 x double> %b) {
|
||||
; CHECK-LABEL: vfmin_nxv4f64_vv:
|
||||
; CHECK: # %bb.0:
|
||||
; CHECK-NEXT: vsetvli a0, zero, e64,m4,ta,mu
|
||||
; CHECK-NEXT: vfmin.vv v8, v8, v12
|
||||
; CHECK-NEXT: ret
|
||||
%v = call <vscale x 4 x double> @llvm.minnum.nxv4f64(<vscale x 4 x double> %a, <vscale x 4 x double> %b)
|
||||
ret <vscale x 4 x double> %v
|
||||
}
|
||||
|
||||
define <vscale x 4 x double> @vfmin_nxv4f64_vf(<vscale x 4 x double> %a, double %b) {
|
||||
; CHECK-LABEL: vfmin_nxv4f64_vf:
|
||||
; CHECK: # %bb.0:
|
||||
; CHECK-NEXT: vsetvli a0, zero, e64,m4,ta,mu
|
||||
; CHECK-NEXT: vfmin.vf v8, v8, fa0
|
||||
; CHECK-NEXT: ret
|
||||
%head = insertelement <vscale x 4 x double> undef, double %b, i32 0
|
||||
%splat = shufflevector <vscale x 4 x double> %head, <vscale x 4 x double> undef, <vscale x 4 x i32> zeroinitializer
|
||||
%v = call <vscale x 4 x double> @llvm.minnum.nxv4f64(<vscale x 4 x double> %a, <vscale x 4 x double> %splat)
|
||||
ret <vscale x 4 x double> %v
|
||||
}
|
||||
|
||||
declare <vscale x 8 x double> @llvm.minnum.nxv8f64(<vscale x 8 x double>, <vscale x 8 x double>)
|
||||
|
||||
define <vscale x 8 x double> @vfmin_nxv8f64_vv(<vscale x 8 x double> %a, <vscale x 8 x double> %b) {
|
||||
; CHECK-LABEL: vfmin_nxv8f64_vv:
|
||||
; CHECK: # %bb.0:
|
||||
; CHECK-NEXT: vsetvli a0, zero, e64,m8,ta,mu
|
||||
; CHECK-NEXT: vfmin.vv v8, v8, v16
|
||||
; CHECK-NEXT: ret
|
||||
%v = call <vscale x 8 x double> @llvm.minnum.nxv8f64(<vscale x 8 x double> %a, <vscale x 8 x double> %b)
|
||||
ret <vscale x 8 x double> %v
|
||||
}
|
||||
|
||||
define <vscale x 8 x double> @vfmin_nxv8f64_vf(<vscale x 8 x double> %a, double %b) {
|
||||
; CHECK-LABEL: vfmin_nxv8f64_vf:
|
||||
; CHECK: # %bb.0:
|
||||
; CHECK-NEXT: vsetvli a0, zero, e64,m8,ta,mu
|
||||
; CHECK-NEXT: vfmin.vf v8, v8, fa0
|
||||
; CHECK-NEXT: ret
|
||||
%head = insertelement <vscale x 8 x double> undef, double %b, i32 0
|
||||
%splat = shufflevector <vscale x 8 x double> %head, <vscale x 8 x double> undef, <vscale x 8 x i32> zeroinitializer
|
||||
%v = call <vscale x 8 x double> @llvm.minnum.nxv8f64(<vscale x 8 x double> %a, <vscale x 8 x double> %splat)
|
||||
ret <vscale x 8 x double> %v
|
||||
}
|
||||
Loading…
Reference in New Issue