From 839a06e9d751654fc5e5b2e0050735dd8dff39e5 Mon Sep 17 00:00:00 2001
From: Nadav Rotem <nadav.rotem@intel.com>
Date: Mon, 16 Jul 2012 18:34:53 +0000
Subject: [PATCH] Make ComputeDemandedBits return a deterministic result when
 computing an AssertZext value. In the added testcase the constant 55 was
 behind an AssertZext of type i1, and ComputeDemandedBits reported that some
 of the bits were both known to be one and known to be zero.

Together with Michael Kuperstein <michael.m.kuperstein@intel.com>

llvm-svn: 160305
---
 llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp |  1 +
 llvm/test/CodeGen/X86/2012-07-16-fp2ui-i1.ll   | 12 ++++++++++++
 2 files changed, 13 insertions(+)
 create mode 100644 llvm/test/CodeGen/X86/2012-07-16-fp2ui-i1.ll

diff --git a/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp b/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
index 3947648e6a72..cfe71708fe04 100644
--- a/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
+++ b/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
@@ -1965,6 +1965,7 @@ void SelectionDAG::ComputeMaskedBits(SDValue Op, APInt &KnownZero,
     APInt InMask = APInt::getLowBitsSet(BitWidth, VT.getSizeInBits());
     ComputeMaskedBits(Op.getOperand(0), KnownZero, KnownOne, Depth+1);
     KnownZero |= (~InMask);
+    KnownOne  &= (~KnownZero);
     return;
   }
   case ISD::FGETSIGN:
diff --git a/llvm/test/CodeGen/X86/2012-07-16-fp2ui-i1.ll b/llvm/test/CodeGen/X86/2012-07-16-fp2ui-i1.ll
new file mode 100644
index 000000000000..17533a1e1649
--- /dev/null
+++ b/llvm/test/CodeGen/X86/2012-07-16-fp2ui-i1.ll
@@ -0,0 +1,12 @@
+; RUN: llc < %s -march=x86-64 -mcpu=corei7
+
+define void @autogen_SD3100() {
+BB:
+  %FC123 = fptoui float 0x40693F5D00000000 to i1
+  br i1 %FC123, label %V, label %W
+
+V:
+  ret void
+W:
+  ret void
+}