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add support for returning 64bit values 

llvm-svn: 30103
This commit is contained in:
Rafael Espindola 2006-09-04 19:05:01 +00:00
parent 49c45d3a13
commit 8386105f3f
2 changed files with 41 additions and 0 deletions
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9
llvm/lib/Target/ARM/ARMISelDAGToDAG.cpp
View File

@ -238,6 +238,15 @@ static SDOperand LowerRET(SDOperand Op, SelectionDAG &DAG) {
if (DAG.getMachineFunction().liveout_empty())
DAG.getMachineFunction().addLiveOut(ARM::R0);
break;
case 5:
Copy = DAG.getCopyToReg(Chain, ARM::R1, Op.getOperand(3), SDOperand());
Copy = DAG.getCopyToReg(Copy, ARM::R0, Op.getOperand(1), Copy.getValue(1));
// If we haven't noted the R0+R1 are live out, do so now.
if (DAG.getMachineFunction().liveout_empty()) {
DAG.getMachineFunction().addLiveOut(ARM::R0);
DAG.getMachineFunction().addLiveOut(ARM::R1);
}
break;
}
//We must use RET_FLAG instead of BRIND because BRIND doesn't have a flag

32
llvm/test/Regression/CodeGen/ARM/long.ll Normal file
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@ -0,0 +1,32 @@
; RUN: llvm-as < %s | llc -march=arm &&
; RUN: llvm-as < %s | llc -march=arm | grep "mov r1, #0" | wc -l | grep 4 &&
; RUN: llvm-as < %s | llc -march=arm | grep "mov r0, #1" | wc -l | grep 1 &&
; RUN: llvm-as < %s | llc -march=arm | grep "mov r0, #2147483647" | wc -l | grep 1 &&
; RUN: llvm-as < %s | llc -march=arm | grep "mov r0, #-2147483648" | wc -l | grep 1 &&
; RUN: llvm-as < %s | llc -march=arm | grep "mov r0, #-1" | wc -l | grep 1 &&
; RUN: llvm-as < %s | llc -march=arm | grep "mov r1, #2147483647" | wc -l | grep 1
long %f1() {
entry:
ret long 0
}
long %f2() {
entry:
ret long 1
}
long %f3() {
entry:
ret long 2147483647
}
long %f4() {
entry:
ret long 2147483648
}
long %f5() {
entry:
ret long 9223372036854775807
}