maxjhandsome
/
llvm-project
forked from OSchip/llvm-project
1
0
Fork 0
Code Issues Pull Requests Packages Releases Wiki Activity

[Test][AggressiveInstCombine] Add test for truncation of vector instructions 

Precommit test for D109236
This commit is contained in:
Anton Afanasyev 2021-09-03 19:44:23 +03:00
parent c208deb900
commit 8371a4c9d5
1 changed files with 92 additions and 0 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

92
llvm/test/Transforms/AggressiveInstCombine/trunc_vector_instrs.ll Normal file
View File

@ -0,0 +1,92 @@
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
; RUN: opt < %s -aggressive-instcombine -S | FileCheck %s
define <4 x i16> @shuffle(<2 x i8> %a, <2 x i8> %b) {
; CHECK-LABEL: @shuffle(
; CHECK-NEXT: [[ZEXTA:%.*]] = zext <2 x i8> [[A:%.*]] to <2 x i32>
; CHECK-NEXT: [[ZEXTB:%.*]] = zext <2 x i8> [[B:%.*]] to <2 x i32>
; CHECK-NEXT: [[SHUF:%.*]] = shufflevector <2 x i32> [[ZEXTA]], <2 x i32> [[ZEXTB]], <4 x i32> <i32 3, i32 2, i32 1, i32 0>
; CHECK-NEXT: [[TRUNC:%.*]] = trunc <4 x i32> [[SHUF]] to <4 x i16>
; CHECK-NEXT: ret <4 x i16> [[TRUNC]]
;
%zexta = zext <2 x i8> %a to <2 x i32>
%zextb = zext <2 x i8> %b to <2 x i32>
%shuf = shufflevector <2 x i32> %zexta, <2 x i32> %zextb, <4 x i32> <i32 3, i32 2, i32 1, i32 0>
%trunc = trunc <4 x i32> %shuf to <4 x i16>
ret <4 x i16> %trunc
}
define <2 x i16> @unary_shuffle(<2 x i8> %a) {
; CHECK-LABEL: @unary_shuffle(
; CHECK-NEXT: [[ZEXTA:%.*]] = zext <2 x i8> [[A:%.*]] to <2 x i32>
; CHECK-NEXT: [[SHUF:%.*]] = shufflevector <2 x i32> [[ZEXTA]], <2 x i32> undef, <2 x i32> <i32 1, i32 0>
; CHECK-NEXT: [[TRUNC:%.*]] = trunc <2 x i32> [[SHUF]] to <2 x i16>
; CHECK-NEXT: ret <2 x i16> [[TRUNC]]
;
%zexta = zext <2 x i8> %a to <2 x i32>
%shuf = shufflevector <2 x i32> %zexta, <2 x i32> undef, <2 x i32> <i32 1, i32 0>
%trunc = trunc <2 x i32> %shuf to <2 x i16>
ret <2 x i16> %trunc
}
define <4 x i16> @const_shuffle() {
; CHECK-LABEL: @const_shuffle(
; CHECK-NEXT: [[SHUF:%.*]] = shufflevector <2 x i32> <i32 1, i32 2>, <2 x i32> <i32 3, i32 7>, <4 x i32> <i32 3, i32 2, i32 1, i32 0>
; CHECK-NEXT: [[TRUNC:%.*]] = trunc <4 x i32> [[SHUF]] to <4 x i16>
; CHECK-NEXT: ret <4 x i16> [[TRUNC]]
;
%shuf = shufflevector <2 x i32> <i32 1, i32 2>, <2 x i32> <i32 3, i32 7>, <4 x i32> <i32 3, i32 2, i32 1, i32 0>
%trunc = trunc <4 x i32> %shuf to <4 x i16>
ret <4 x i16> %trunc
}
define <2 x i16> @extract_insert(<2 x i8> %a, <2 x i8> %b) {
; CHECK-LABEL: @extract_insert(
; CHECK-NEXT: [[ZEXTA:%.*]] = zext <2 x i8> [[A:%.*]] to <2 x i32>
; CHECK-NEXT: [[ZEXTB:%.*]] = zext <2 x i8> [[B:%.*]] to <2 x i32>
; CHECK-NEXT: [[EXTR:%.*]] = extractelement <2 x i32> [[ZEXTA]], i32 0
; CHECK-NEXT: [[INSR:%.*]] = insertelement <2 x i32> [[ZEXTB]], i32 [[EXTR]], i32 1
; CHECK-NEXT: [[TRUNC:%.*]] = trunc <2 x i32> [[INSR]] to <2 x i16>
; CHECK-NEXT: ret <2 x i16> [[TRUNC]]
;
%zexta = zext <2 x i8> %a to <2 x i32>
%zextb = zext <2 x i8> %b to <2 x i32>
%extr = extractelement <2 x i32> %zexta, i32 0
%insr = insertelement <2 x i32> %zextb, i32 %extr, i32 1
%trunc = trunc <2 x i32> %insr to <2 x i16>
ret <2 x i16> %trunc
}
define <2 x i16> @insert_poison(i8 %a) {
; CHECK-LABEL: @insert_poison(
; CHECK-NEXT: [[ZEXTA:%.*]] = zext i8 [[A:%.*]] to i32
; CHECK-NEXT: [[INSR:%.*]] = insertelement <2 x i32> poison, i32 [[ZEXTA]], i32 0
; CHECK-NEXT: [[TRUNC:%.*]] = trunc <2 x i32> [[INSR]] to <2 x i16>
; CHECK-NEXT: ret <2 x i16> [[TRUNC]]
;
%zexta = zext i8 %a to i32
%insr = insertelement <2 x i32> poison, i32 %zexta, i32 0
%trunc = trunc <2 x i32> %insr to <2 x i16>
ret <2 x i16> %trunc
}
; This demonstrates test not folded by 'opt -instcombine'
define <2 x i16> @extract_mul_insert(<2 x i8> %x) {
; CHECK-LABEL: @extract_mul_insert(
; CHECK-NEXT: [[ZEXT:%.*]] = zext <2 x i8> [[X:%.*]] to <2 x i32>
; CHECK-NEXT: [[LSHR:%.*]] = lshr <2 x i32> [[ZEXT]], <i32 4, i32 5>
; CHECK-NEXT: [[EXTR:%.*]] = extractelement <2 x i32> [[LSHR]], i32 1
; CHECK-NEXT: [[MUL:%.*]] = mul i32 [[EXTR]], 5
; CHECK-NEXT: [[INSR:%.*]] = insertelement <2 x i32> [[LSHR]], i32 [[MUL]], i32 1
; CHECK-NEXT: [[TRUNC:%.*]] = trunc <2 x i32> [[INSR]] to <2 x i16>
; CHECK-NEXT: ret <2 x i16> [[TRUNC]]
;
%zext = zext <2 x i8> %x to <2 x i32>
%lshr = lshr <2 x i32> %zext, <i32 4, i32 5>
%extr = extractelement <2 x i32> %lshr, i32 1
%mul = mul i32 %extr, 5
%insr = insertelement <2 x i32> %lshr, i32 %mul, i32 1
%trunc = trunc <2 x i32> %insr to <2 x i16>
ret <2 x i16> %trunc
}