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[AMDGPU] gfx11 FLAT Instructions 

MachineCode Support for FLAT type instructions

Contributors:
Sebastian Neubauer <sebastian.neubauer@amd.com>

Patch 12/N for upstreaming of AMDGPU gfx11 architecture.

Depends on D125989

Reviewed By: rampitec, #amdgpu

Differential Revision: https://reviews.llvm.org/D125992
This commit is contained in:
Joe Nash 2022-05-10 14:46:57 -04:00
parent 8e757c6b50
commit 835e09c4c3
9 changed files with 3372 additions and 16 deletions
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245
llvm/lib/Target/AMDGPU/FLATInstructions.td
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@ -78,8 +78,8 @@ class FLAT_Pseudo<string opName, dag outs, dag ins,
let FlatScratch = is_flat_scratch;
}
class FLAT_Real <bits<7> op, FLAT_Pseudo ps> :
InstSI <ps.OutOperandList, ps.InOperandList, ps.Mnemonic # ps.AsmOperands, []>,
class FLAT_Real <bits<7> op, FLAT_Pseudo ps, string opName = ps.Mnemonic> :
InstSI <ps.OutOperandList, ps.InOperandList, opName # ps.AsmOperands, []>,
Enc64 {
let isPseudo = 0;
@ -687,18 +687,9 @@ defm FLAT_ATOMIC_DEC_X2 : FLAT_Atomic_Pseudo <"flat_atomic_dec_x2",
// GFX7-, GFX10-only flat instructions.
let SubtargetPredicate = isGFX7GFX10 in {
defm FLAT_ATOMIC_FCMPSWAP : FLAT_Atomic_Pseudo <"flat_atomic_fcmpswap",
VGPR_32, f32, v2f32, VReg_64>;
defm FLAT_ATOMIC_FCMPSWAP_X2 : FLAT_Atomic_Pseudo <"flat_atomic_fcmpswap_x2",
VReg_64, f64, v2f64, VReg_128>;
defm FLAT_ATOMIC_FMIN : FLAT_Atomic_Pseudo <"flat_atomic_fmin",
VGPR_32, f32>;
defm FLAT_ATOMIC_FMAX : FLAT_Atomic_Pseudo <"flat_atomic_fmax",
VGPR_32, f32>;
defm FLAT_ATOMIC_FMIN_X2 : FLAT_Atomic_Pseudo <"flat_atomic_fmin_x2",
VReg_64, f64>;
@ -717,12 +708,30 @@ let SubtargetPredicate = isGFX90APlus in {
} // End SubtargetPredicate = isGFX90APlus
let SubtargetPredicate = isGFX940Plus in {
defm FLAT_ATOMIC_ADD_F32 : FLAT_Atomic_Pseudo<"flat_atomic_add_f32", VGPR_32, f32>;
defm FLAT_ATOMIC_PK_ADD_F16 : FLAT_Atomic_Pseudo<"flat_atomic_pk_add_f16", VGPR_32, v2f16>;
defm FLAT_ATOMIC_PK_ADD_BF16 : FLAT_Atomic_Pseudo<"flat_atomic_pk_add_bf16", VGPR_32, v2f16>;
defm GLOBAL_ATOMIC_PK_ADD_BF16 : FLAT_Global_Atomic_Pseudo<"global_atomic_pk_add_bf16", VGPR_32, v2f16>;
} // End SubtargetPredicate = isGFX940Plus
// GFX7-, GFX10-, GFX11-only flat instructions.
let SubtargetPredicate = isGFX7GFX10GFX11 in {
defm FLAT_ATOMIC_FCMPSWAP : FLAT_Atomic_Pseudo <"flat_atomic_fcmpswap",
VGPR_32, f32, v2f32, VReg_64>;
defm FLAT_ATOMIC_FMIN : FLAT_Atomic_Pseudo <"flat_atomic_fmin",
VGPR_32, f32>;
defm FLAT_ATOMIC_FMAX : FLAT_Atomic_Pseudo <"flat_atomic_fmax",
VGPR_32, f32>;
} // End SubtargetPredicate = isGFX7GFX10GFX11
// GFX940-, GFX11-only flat instructions.
let SubtargetPredicate = isGFX940GFX11Plus in {
defm FLAT_ATOMIC_ADD_F32 : FLAT_Atomic_Pseudo<"flat_atomic_add_f32", VGPR_32, f32>;
} // End SubtargetPredicate = isGFX940GFX11Plus
defm GLOBAL_LOAD_UBYTE : FLAT_Global_Load_Pseudo <"global_load_ubyte", VGPR_32>;
defm GLOBAL_LOAD_SBYTE : FLAT_Global_Load_Pseudo <"global_load_sbyte", VGPR_32>;
defm GLOBAL_LOAD_USHORT : FLAT_Global_Load_Pseudo <"global_load_ushort", VGPR_32>;
@ -1885,7 +1894,7 @@ let SubtargetPredicate = isGFX940Plus in {
class FLAT_Real_gfx10<bits<7> op, FLAT_Pseudo ps> :
FLAT_Real<op, ps>, SIMCInstr<ps.PseudoInstr, SIEncodingFamily.GFX10> {
let AssemblerPredicate = isGFX10Plus;
let AssemblerPredicate = isGFX10Only;
let DecoderNamespace = "GFX10";
let Inst{11-0} = offset{11-0};
@ -2113,3 +2122,213 @@ defm SCRATCH_LOAD_LDS_SBYTE : FLAT_Real_ScratchAllAddr_LDS_gfx10 <0x009>;
defm SCRATCH_LOAD_LDS_USHORT : FLAT_Real_ScratchAllAddr_LDS_gfx10 <0x00a>;
defm SCRATCH_LOAD_LDS_SSHORT : FLAT_Real_ScratchAllAddr_LDS_gfx10 <0x00b>;
defm SCRATCH_LOAD_LDS_DWORD : FLAT_Real_ScratchAllAddr_LDS_gfx10 <0x00c>;
//===----------------------------------------------------------------------===//
// GFX11
//===----------------------------------------------------------------------===//
class FLAT_Real_gfx11 <bits<7> op, FLAT_Pseudo ps, string opName = ps.Mnemonic> :
FLAT_Real <op, ps, opName>,
SIMCInstr <ps.PseudoInstr, SIEncodingFamily.GFX11> {
let AssemblerPredicate = isGFX11Plus;
let DecoderNamespace = "GFX11";
let Inst{13} = !if(ps.has_dlc, cpol{CPolBit.DLC}, ps.dlcValue);
let Inst{14} = !if(ps.has_glc, cpol{CPolBit.GLC}, ps.glcValue);
let Inst{15} = cpol{CPolBit.SLC};
let Inst{17-16} = seg;
let Inst{55} = ps.sve;
}
multiclass FLAT_Real_Base_gfx11<bits<7> op, string ps, string opName, int renamed = false> {
def _gfx11 : FLAT_Real_gfx11<op, !cast<FLAT_Pseudo>(ps), opName> {
let Inst{54-48} = !cast<int>(SGPR_NULL_gfx11plus.HWEncoding);
}
if renamed then
def _renamed_gfx11 : MnemonicAlias<!cast<FLAT_Pseudo>(ps).Mnemonic, opName>, Requires<[isGFX11Plus]>;
}
multiclass FLAT_Real_RTN_gfx11<bits<7> op, string ps, string opName> {
def _RTN_gfx11 : FLAT_Real_gfx11<op, !cast<FLAT_Pseudo>(ps#"_RTN"), opName> {
let Inst{54-48} = !cast<int>(SGPR_NULL_gfx11plus.HWEncoding);
}
}
multiclass FLAT_Real_SADDR_gfx11<bits<7> op, string ps, string opName> {
def _SADDR_gfx11 : FLAT_Real_gfx11<op, !cast<FLAT_Pseudo>(ps#"_SADDR"), opName>;
}
multiclass FLAT_Real_SADDR_RTN_gfx11<bits<7> op, string ps, string opName> {
def _SADDR_RTN_gfx11 : FLAT_Real_gfx11<op, !cast<FLAT_Pseudo>(ps#"_SADDR_RTN"), opName>;
}
multiclass FLAT_Real_ST_gfx11<bits<7> op, string ps, string opName> {
def _ST_gfx11 : FLAT_Real_gfx11<op, !cast<FLAT_Pseudo>(ps#"_ST"), opName> {
let Inst{54-48} = !cast<int>(SGPR_NULL_gfx11plus.HWEncoding);
let OtherPredicates = [HasFlatScratchSTMode];
}
}
multiclass FLAT_Real_SVS_gfx11<bits<7> op, string ps, string opName> {
def _SVS_gfx11 : FLAT_Real_gfx11<op, !cast<FLAT_Pseudo>(ps#"_SVS"), opName> {
let OtherPredicates = [HasFlatScratchSVSMode];
}
}
multiclass FLAT_Real_AllAddr_gfx11<bits<7> op, string ps, string opName, int renamed = false> :
FLAT_Real_Base_gfx11<op, ps, opName, renamed>,
FLAT_Real_SADDR_gfx11<op, ps, opName>;
multiclass FLAT_Real_Atomics_gfx11<bits<7> op, string ps, string opName, int renamed = false> :
FLAT_Real_Base_gfx11<op, ps, opName, renamed>,
FLAT_Real_RTN_gfx11<op, ps, opName>;
multiclass FLAT_Real_GlblAtomics_gfx11<bits<7> op, string ps, string opName, int renamed = false> :
FLAT_Real_AllAddr_gfx11<op, ps, opName, renamed>,
FLAT_Real_RTN_gfx11<op, ps, opName>,
FLAT_Real_SADDR_RTN_gfx11<op, ps, opName>;
multiclass FLAT_Real_GlblAtomics_RTN_gfx11<bits<7> op, string ps, string opName> :
FLAT_Real_RTN_gfx11<op, ps, opName>,
FLAT_Real_SADDR_RTN_gfx11<op, ps, opName>;
multiclass FLAT_Real_ScratchAllAddr_gfx11<bits<7> op, string ps, string opName, int renamed = false> :
FLAT_Real_Base_gfx11<op, ps, opName, renamed>,
FLAT_Real_SADDR_gfx11<op, ps, opName>,
FLAT_Real_ST_gfx11<op, ps, opName>,
FLAT_Real_SVS_gfx11<op, ps, opName>;
// ENC_FLAT.
defm FLAT_LOAD_U8 : FLAT_Real_Base_gfx11<0x010, "FLAT_LOAD_UBYTE", "flat_load_u8", true>;
defm FLAT_LOAD_I8 : FLAT_Real_Base_gfx11<0x011, "FLAT_LOAD_SBYTE", "flat_load_i8", true>;
defm FLAT_LOAD_U16 : FLAT_Real_Base_gfx11<0x012, "FLAT_LOAD_USHORT", "flat_load_u16", true>;
defm FLAT_LOAD_I16 : FLAT_Real_Base_gfx11<0x013, "FLAT_LOAD_SSHORT", "flat_load_i16", true>;
defm FLAT_LOAD_B32 : FLAT_Real_Base_gfx11<0x014, "FLAT_LOAD_DWORD", "flat_load_b32", true>;
defm FLAT_LOAD_B64 : FLAT_Real_Base_gfx11<0x015, "FLAT_LOAD_DWORDX2", "flat_load_b64", true>;
defm FLAT_LOAD_B96 : FLAT_Real_Base_gfx11<0x016, "FLAT_LOAD_DWORDX3", "flat_load_b96", true>;
defm FLAT_LOAD_B128 : FLAT_Real_Base_gfx11<0x017, "FLAT_LOAD_DWORDX4", "flat_load_b128", true>;
defm FLAT_STORE_B8 : FLAT_Real_Base_gfx11<0x018, "FLAT_STORE_BYTE", "flat_store_b8", true>;
defm FLAT_STORE_B16 : FLAT_Real_Base_gfx11<0x019, "FLAT_STORE_SHORT", "flat_store_b16", true>;
defm FLAT_STORE_B32 : FLAT_Real_Base_gfx11<0x01a, "FLAT_STORE_DWORD", "flat_store_b32", true>;
defm FLAT_STORE_B64 : FLAT_Real_Base_gfx11<0x01b, "FLAT_STORE_DWORDX2", "flat_store_b64", true>;
defm FLAT_STORE_B96 : FLAT_Real_Base_gfx11<0x01c, "FLAT_STORE_DWORDX3", "flat_store_b96", true>;
defm FLAT_STORE_B128 : FLAT_Real_Base_gfx11<0x01d, "FLAT_STORE_DWORDX4", "flat_store_b128", true>;
defm FLAT_LOAD_D16_U8 : FLAT_Real_Base_gfx11<0x01e, "FLAT_LOAD_UBYTE_D16", "flat_load_d16_u8">;
defm FLAT_LOAD_D16_I8 : FLAT_Real_Base_gfx11<0x01f, "FLAT_LOAD_SBYTE_D16", "flat_load_d16_i8">;
defm FLAT_LOAD_D16_B16 : FLAT_Real_Base_gfx11<0x020, "FLAT_LOAD_SHORT_D16", "flat_load_d16_b16">;
defm FLAT_LOAD_D16_HI_U8 : FLAT_Real_Base_gfx11<0x021, "FLAT_LOAD_UBYTE_D16_HI", "flat_load_d16_hi_u8">;
defm FLAT_LOAD_D16_HI_I8 : FLAT_Real_Base_gfx11<0x022, "FLAT_LOAD_SBYTE_D16_HI", "flat_load_d16_hi_i8">;
defm FLAT_LOAD_D16_HI_B16 : FLAT_Real_Base_gfx11<0x023, "FLAT_LOAD_SHORT_D16_HI", "flat_load_d16_hi_b16">;
defm FLAT_STORE_D16_HI_B8 : FLAT_Real_Base_gfx11<0x024, "FLAT_STORE_BYTE_D16_HI", "flat_store_d16_hi_b8">;
defm FLAT_STORE_D16_HI_B16 : FLAT_Real_Base_gfx11<0x025, "FLAT_STORE_SHORT_D16_HI", "flat_store_d16_hi_b16">;
defm FLAT_ATOMIC_SWAP_B32 : FLAT_Real_Atomics_gfx11<0x033, "FLAT_ATOMIC_SWAP", "flat_atomic_swap_b32", true>;
defm FLAT_ATOMIC_CMPSWAP_B32 : FLAT_Real_Atomics_gfx11<0x034, "FLAT_ATOMIC_CMPSWAP", "flat_atomic_cmpswap_b32", true>;
defm FLAT_ATOMIC_ADD_U32 : FLAT_Real_Atomics_gfx11<0x035, "FLAT_ATOMIC_ADD", "flat_atomic_add_u32", true>;
defm FLAT_ATOMIC_SUB_U32 : FLAT_Real_Atomics_gfx11<0x036, "FLAT_ATOMIC_SUB", "flat_atomic_sub_u32", true>;
defm FLAT_ATOMIC_MIN_I32 : FLAT_Real_Atomics_gfx11<0x038, "FLAT_ATOMIC_SMIN", "flat_atomic_min_i32", true>;
defm FLAT_ATOMIC_MIN_U32 : FLAT_Real_Atomics_gfx11<0x039, "FLAT_ATOMIC_UMIN", "flat_atomic_min_u32", true>;
defm FLAT_ATOMIC_MAX_I32 : FLAT_Real_Atomics_gfx11<0x03a, "FLAT_ATOMIC_SMAX", "flat_atomic_max_i32", true>;
defm FLAT_ATOMIC_MAX_U32 : FLAT_Real_Atomics_gfx11<0x03b, "FLAT_ATOMIC_UMAX", "flat_atomic_max_u32", true>;
defm FLAT_ATOMIC_AND_B32 : FLAT_Real_Atomics_gfx11<0x03c, "FLAT_ATOMIC_AND", "flat_atomic_and_b32", true>;
defm FLAT_ATOMIC_OR_B32 : FLAT_Real_Atomics_gfx11<0x03d, "FLAT_ATOMIC_OR", "flat_atomic_or_b32", true>;
defm FLAT_ATOMIC_XOR_B32 : FLAT_Real_Atomics_gfx11<0x03e, "FLAT_ATOMIC_XOR", "flat_atomic_xor_b32", true>;
defm FLAT_ATOMIC_INC_U32 : FLAT_Real_Atomics_gfx11<0x03f, "FLAT_ATOMIC_INC", "flat_atomic_inc_u32", true>;
defm FLAT_ATOMIC_DEC_U32 : FLAT_Real_Atomics_gfx11<0x040, "FLAT_ATOMIC_DEC", "flat_atomic_dec_u32", true>;
defm FLAT_ATOMIC_SWAP_B64 : FLAT_Real_Atomics_gfx11<0x041, "FLAT_ATOMIC_SWAP_X2", "flat_atomic_swap_b64", true>;
defm FLAT_ATOMIC_CMPSWAP_B64 : FLAT_Real_Atomics_gfx11<0x042, "FLAT_ATOMIC_CMPSWAP_X2", "flat_atomic_cmpswap_b64", true>;
defm FLAT_ATOMIC_ADD_U64 : FLAT_Real_Atomics_gfx11<0x043, "FLAT_ATOMIC_ADD_X2", "flat_atomic_add_u64", true>;
defm FLAT_ATOMIC_SUB_U64 : FLAT_Real_Atomics_gfx11<0x044, "FLAT_ATOMIC_SUB_X2", "flat_atomic_sub_u64", true>;
defm FLAT_ATOMIC_MIN_I64 : FLAT_Real_Atomics_gfx11<0x045, "FLAT_ATOMIC_SMIN_X2", "flat_atomic_min_i64", true>;
defm FLAT_ATOMIC_MIN_U64 : FLAT_Real_Atomics_gfx11<0x046, "FLAT_ATOMIC_UMIN_X2", "flat_atomic_min_u64", true>;
defm FLAT_ATOMIC_MAX_I64 : FLAT_Real_Atomics_gfx11<0x047, "FLAT_ATOMIC_SMAX_X2", "flat_atomic_max_i64", true>;
defm FLAT_ATOMIC_MAX_U64 : FLAT_Real_Atomics_gfx11<0x048, "FLAT_ATOMIC_UMAX_X2", "flat_atomic_max_u64", true>;
defm FLAT_ATOMIC_AND_B64 : FLAT_Real_Atomics_gfx11<0x049, "FLAT_ATOMIC_AND_X2", "flat_atomic_and_b64", true>;
defm FLAT_ATOMIC_OR_B64 : FLAT_Real_Atomics_gfx11<0x04a, "FLAT_ATOMIC_OR_X2", "flat_atomic_or_b64", true>;
defm FLAT_ATOMIC_XOR_B64 : FLAT_Real_Atomics_gfx11<0x04b, "FLAT_ATOMIC_XOR_X2", "flat_atomic_xor_b64", true>;
defm FLAT_ATOMIC_INC_U64 : FLAT_Real_Atomics_gfx11<0x04c, "FLAT_ATOMIC_INC_X2", "flat_atomic_inc_u64", true>;
defm FLAT_ATOMIC_DEC_U64 : FLAT_Real_Atomics_gfx11<0x04d, "FLAT_ATOMIC_DEC_X2", "flat_atomic_dec_u64", true>;
defm FLAT_ATOMIC_CMPSWAP_F32 : FLAT_Real_Atomics_gfx11<0x050, "FLAT_ATOMIC_FCMPSWAP", "flat_atomic_cmpswap_f32">;
defm FLAT_ATOMIC_MIN_F32 : FLAT_Real_Atomics_gfx11<0x051, "FLAT_ATOMIC_FMIN", "flat_atomic_min_f32">;
defm FLAT_ATOMIC_MAX_F32 : FLAT_Real_Atomics_gfx11<0x052, "FLAT_ATOMIC_FMAX", "flat_atomic_max_f32">;
defm FLAT_ATOMIC_ADD_F32 : FLAT_Real_Atomics_gfx11<0x056, "FLAT_ATOMIC_ADD_F32", "flat_atomic_add_f32">;
// ENC_FLAT_GLBL.
defm GLOBAL_LOAD_U8 : FLAT_Real_AllAddr_gfx11<0x010, "GLOBAL_LOAD_UBYTE", "global_load_u8", true>;
defm GLOBAL_LOAD_I8 : FLAT_Real_AllAddr_gfx11<0x011, "GLOBAL_LOAD_SBYTE", "global_load_i8", true>;
defm GLOBAL_LOAD_U16 : FLAT_Real_AllAddr_gfx11<0x012, "GLOBAL_LOAD_USHORT", "global_load_u16", true>;
defm GLOBAL_LOAD_I16 : FLAT_Real_AllAddr_gfx11<0x013, "GLOBAL_LOAD_SSHORT", "global_load_i16", true>;
defm GLOBAL_LOAD_B32 : FLAT_Real_AllAddr_gfx11<0x014, "GLOBAL_LOAD_DWORD", "global_load_b32", true>;
defm GLOBAL_LOAD_B64 : FLAT_Real_AllAddr_gfx11<0x015, "GLOBAL_LOAD_DWORDX2", "global_load_b64", true>;
defm GLOBAL_LOAD_B96 : FLAT_Real_AllAddr_gfx11<0x016, "GLOBAL_LOAD_DWORDX3", "global_load_b96", true>;
defm GLOBAL_LOAD_B128 : FLAT_Real_AllAddr_gfx11<0x017, "GLOBAL_LOAD_DWORDX4", "global_load_b128", true>;
defm GLOBAL_STORE_B8 : FLAT_Real_AllAddr_gfx11<0x018, "GLOBAL_STORE_BYTE", "global_store_b8", true>;
defm GLOBAL_STORE_B16 : FLAT_Real_AllAddr_gfx11<0x019, "GLOBAL_STORE_SHORT", "global_store_b16", true>;
defm GLOBAL_STORE_B32 : FLAT_Real_AllAddr_gfx11<0x01a, "GLOBAL_STORE_DWORD", "global_store_b32", true>;
defm GLOBAL_STORE_B64 : FLAT_Real_AllAddr_gfx11<0x01b, "GLOBAL_STORE_DWORDX2", "global_store_b64", true>;
defm GLOBAL_STORE_B96 : FLAT_Real_AllAddr_gfx11<0x01c, "GLOBAL_STORE_DWORDX3", "global_store_b96", true>;
defm GLOBAL_STORE_B128 : FLAT_Real_AllAddr_gfx11<0x01d, "GLOBAL_STORE_DWORDX4", "global_store_b128", true>;
defm GLOBAL_LOAD_D16_U8 : FLAT_Real_AllAddr_gfx11<0x01e, "GLOBAL_LOAD_UBYTE_D16", "global_load_d16_u8">;
defm GLOBAL_LOAD_D16_I8 : FLAT_Real_AllAddr_gfx11<0x01f, "GLOBAL_LOAD_SBYTE_D16", "global_load_d16_i8">;
defm GLOBAL_LOAD_D16_B16 : FLAT_Real_AllAddr_gfx11<0x020, "GLOBAL_LOAD_SHORT_D16", "global_load_d16_b16">;
defm GLOBAL_LOAD_D16_HI_U8 : FLAT_Real_AllAddr_gfx11<0x021, "GLOBAL_LOAD_UBYTE_D16_HI", "global_load_d16_hi_u8">;
defm GLOBAL_LOAD_D16_HI_I8 : FLAT_Real_AllAddr_gfx11<0x022, "GLOBAL_LOAD_SBYTE_D16_HI", "global_load_d16_hi_i8">;
defm GLOBAL_LOAD_D16_HI_B16 : FLAT_Real_AllAddr_gfx11<0x023, "GLOBAL_LOAD_SHORT_D16_HI", "global_load_d16_hi_b16">;
defm GLOBAL_STORE_D16_HI_B8 : FLAT_Real_AllAddr_gfx11<0x024, "GLOBAL_STORE_BYTE_D16_HI", "global_store_d16_hi_b8">;
defm GLOBAL_STORE_D16_HI_B16 : FLAT_Real_AllAddr_gfx11<0x025, "GLOBAL_STORE_SHORT_D16_HI", "global_store_d16_hi_b16">;
defm GLOBAL_LOAD_ADDTID_B32 : FLAT_Real_AllAddr_gfx11<0x028, "GLOBAL_LOAD_DWORD_ADDTID", "global_load_addtid_b32">;
defm GLOBAL_STORE_ADDTID_B32 : FLAT_Real_AllAddr_gfx11<0x029, "GLOBAL_STORE_DWORD_ADDTID", "global_store_addtid_b32">;
defm GLOBAL_ATOMIC_SWAP_B32 : FLAT_Real_GlblAtomics_gfx11<0x033, "GLOBAL_ATOMIC_SWAP", "global_atomic_swap_b32", true>;
defm GLOBAL_ATOMIC_CMPSWAP_B32 : FLAT_Real_GlblAtomics_gfx11<0x034, "GLOBAL_ATOMIC_CMPSWAP", "global_atomic_cmpswap_b32", true>;
defm GLOBAL_ATOMIC_ADD_U32 : FLAT_Real_GlblAtomics_gfx11<0x035, "GLOBAL_ATOMIC_ADD", "global_atomic_add_u32", true>;
defm GLOBAL_ATOMIC_SUB_U32 : FLAT_Real_GlblAtomics_gfx11<0x036, "GLOBAL_ATOMIC_SUB", "global_atomic_sub_u32", true>;
defm GLOBAL_ATOMIC_CSUB_U32 : FLAT_Real_GlblAtomics_RTN_gfx11<0x037, "GLOBAL_ATOMIC_CSUB", "global_atomic_csub_u32">;
defm GLOBAL_ATOMIC_MIN_I32 : FLAT_Real_GlblAtomics_gfx11<0x038, "GLOBAL_ATOMIC_SMIN", "global_atomic_min_i32", true>;
defm GLOBAL_ATOMIC_MIN_U32 : FLAT_Real_GlblAtomics_gfx11<0x039, "GLOBAL_ATOMIC_UMIN", "global_atomic_min_u32", true>;
defm GLOBAL_ATOMIC_MAX_I32 : FLAT_Real_GlblAtomics_gfx11<0x03a, "GLOBAL_ATOMIC_SMAX", "global_atomic_max_i32", true>;
defm GLOBAL_ATOMIC_MAX_U32 : FLAT_Real_GlblAtomics_gfx11<0x03b, "GLOBAL_ATOMIC_UMAX", "global_atomic_max_u32", true>;
defm GLOBAL_ATOMIC_AND_B32 : FLAT_Real_GlblAtomics_gfx11<0x03c, "GLOBAL_ATOMIC_AND", "global_atomic_and_b32", true>;
defm GLOBAL_ATOMIC_OR_B32 : FLAT_Real_GlblAtomics_gfx11<0x03d, "GLOBAL_ATOMIC_OR", "global_atomic_or_b32", true>;
defm GLOBAL_ATOMIC_XOR_B32 : FLAT_Real_GlblAtomics_gfx11<0x03e, "GLOBAL_ATOMIC_XOR", "global_atomic_xor_b32", true>;
defm GLOBAL_ATOMIC_INC_U32 : FLAT_Real_GlblAtomics_gfx11<0x03f, "GLOBAL_ATOMIC_INC", "global_atomic_inc_u32", true>;
defm GLOBAL_ATOMIC_DEC_U32 : FLAT_Real_GlblAtomics_gfx11<0x040, "GLOBAL_ATOMIC_DEC", "global_atomic_dec_u32", true>;
defm GLOBAL_ATOMIC_SWAP_B64 : FLAT_Real_GlblAtomics_gfx11<0x041, "GLOBAL_ATOMIC_SWAP_X2", "global_atomic_swap_b64", true>;
defm GLOBAL_ATOMIC_CMPSWAP_B64 : FLAT_Real_GlblAtomics_gfx11<0x042, "GLOBAL_ATOMIC_CMPSWAP_X2", "global_atomic_cmpswap_b64", true>;
defm GLOBAL_ATOMIC_ADD_U64 : FLAT_Real_GlblAtomics_gfx11<0x043, "GLOBAL_ATOMIC_ADD_X2", "global_atomic_add_u64", true>;
defm GLOBAL_ATOMIC_SUB_U64 : FLAT_Real_GlblAtomics_gfx11<0x044, "GLOBAL_ATOMIC_SUB_X2", "global_atomic_sub_u64", true>;
defm GLOBAL_ATOMIC_MIN_I64 : FLAT_Real_GlblAtomics_gfx11<0x045, "GLOBAL_ATOMIC_SMIN_X2", "global_atomic_min_i64", true>;
defm GLOBAL_ATOMIC_MIN_U64 : FLAT_Real_GlblAtomics_gfx11<0x046, "GLOBAL_ATOMIC_UMIN_X2", "global_atomic_min_u64", true>;
defm GLOBAL_ATOMIC_MAX_I64 : FLAT_Real_GlblAtomics_gfx11<0x047, "GLOBAL_ATOMIC_SMAX_X2", "global_atomic_max_i64", true>;
defm GLOBAL_ATOMIC_MAX_U64 : FLAT_Real_GlblAtomics_gfx11<0x048, "GLOBAL_ATOMIC_UMAX_X2", "global_atomic_max_u64", true>;
defm GLOBAL_ATOMIC_AND_B64 : FLAT_Real_GlblAtomics_gfx11<0x049, "GLOBAL_ATOMIC_AND_X2", "global_atomic_and_b64", true>;
defm GLOBAL_ATOMIC_OR_B64 : FLAT_Real_GlblAtomics_gfx11<0x04a, "GLOBAL_ATOMIC_OR_X2", "global_atomic_or_b64", true>;
defm GLOBAL_ATOMIC_XOR_B64 : FLAT_Real_GlblAtomics_gfx11<0x04b, "GLOBAL_ATOMIC_XOR_X2", "global_atomic_xor_b64", true>;
defm GLOBAL_ATOMIC_INC_U64 : FLAT_Real_GlblAtomics_gfx11<0x04c, "GLOBAL_ATOMIC_INC_X2", "global_atomic_inc_u64", true>;
defm GLOBAL_ATOMIC_DEC_U64 : FLAT_Real_GlblAtomics_gfx11<0x04d, "GLOBAL_ATOMIC_DEC_X2", "global_atomic_dec_u64", true>;
defm GLOBAL_ATOMIC_CMPSWAP_F32 : FLAT_Real_GlblAtomics_gfx11<0x050, "GLOBAL_ATOMIC_FCMPSWAP", "global_atomic_cmpswap_f32">;
defm GLOBAL_ATOMIC_MIN_F32 : FLAT_Real_GlblAtomics_gfx11<0x051, "GLOBAL_ATOMIC_FMIN", "global_atomic_min_f32">;
defm GLOBAL_ATOMIC_MAX_F32 : FLAT_Real_GlblAtomics_gfx11<0x052, "GLOBAL_ATOMIC_FMAX", "global_atomic_max_f32">;
defm GLOBAL_ATOMIC_ADD_F32 : FLAT_Real_GlblAtomics_gfx11<0x056, "GLOBAL_ATOMIC_ADD_F32", "global_atomic_add_f32">;
// ENC_FLAT_SCRATCH.
defm SCRATCH_LOAD_U8 : FLAT_Real_ScratchAllAddr_gfx11<0x10, "SCRATCH_LOAD_UBYTE", "scratch_load_u8", true>;
defm SCRATCH_LOAD_I8 : FLAT_Real_ScratchAllAddr_gfx11<0x11, "SCRATCH_LOAD_SBYTE", "scratch_load_i8", true>;
defm SCRATCH_LOAD_U16 : FLAT_Real_ScratchAllAddr_gfx11<0x12, "SCRATCH_LOAD_USHORT", "scratch_load_u16", true>;
defm SCRATCH_LOAD_I16 : FLAT_Real_ScratchAllAddr_gfx11<0x13, "SCRATCH_LOAD_SSHORT", "scratch_load_i16", true>;
defm SCRATCH_LOAD_B32 : FLAT_Real_ScratchAllAddr_gfx11<0x14, "SCRATCH_LOAD_DWORD", "scratch_load_b32", true>;
defm SCRATCH_LOAD_B64 : FLAT_Real_ScratchAllAddr_gfx11<0x15, "SCRATCH_LOAD_DWORDX2", "scratch_load_b64", true>;
defm SCRATCH_LOAD_B96 : FLAT_Real_ScratchAllAddr_gfx11<0x16, "SCRATCH_LOAD_DWORDX3", "scratch_load_b96", true>;
defm SCRATCH_LOAD_B128 : FLAT_Real_ScratchAllAddr_gfx11<0x17, "SCRATCH_LOAD_DWORDX4", "scratch_load_b128", true>;
defm SCRATCH_STORE_B8 : FLAT_Real_ScratchAllAddr_gfx11<0x18, "SCRATCH_STORE_BYTE", "scratch_store_b8", true>;
defm SCRATCH_STORE_B16 : FLAT_Real_ScratchAllAddr_gfx11<0x19, "SCRATCH_STORE_SHORT", "scratch_store_b16", true>;
defm SCRATCH_STORE_B32 : FLAT_Real_ScratchAllAddr_gfx11<0x1a, "SCRATCH_STORE_DWORD", "scratch_store_b32", true>;
defm SCRATCH_STORE_B64 : FLAT_Real_ScratchAllAddr_gfx11<0x1b, "SCRATCH_STORE_DWORDX2", "scratch_store_b64", true>;
defm SCRATCH_STORE_B96 : FLAT_Real_ScratchAllAddr_gfx11<0x1c, "SCRATCH_STORE_DWORDX3", "scratch_store_b96", true>;
defm SCRATCH_STORE_B128 : FLAT_Real_ScratchAllAddr_gfx11<0x1d, "SCRATCH_STORE_DWORDX4", "scratch_store_b128", true>;
defm SCRATCH_LOAD_D16_U8 : FLAT_Real_ScratchAllAddr_gfx11<0x1e, "SCRATCH_LOAD_UBYTE_D16", "scratch_load_d16_u8">;
defm SCRATCH_LOAD_D16_I8 : FLAT_Real_ScratchAllAddr_gfx11<0x1f, "SCRATCH_LOAD_SBYTE_D16", "scratch_load_d16_i8">;
defm SCRATCH_LOAD_D16_B16 : FLAT_Real_ScratchAllAddr_gfx11<0x20, "SCRATCH_LOAD_SHORT_D16", "scratch_load_d16_b16">;
defm SCRATCH_LOAD_D16_HI_U8 : FLAT_Real_ScratchAllAddr_gfx11<0x21, "SCRATCH_LOAD_UBYTE_D16_HI", "scratch_load_d16_hi_u8">;
defm SCRATCH_LOAD_D16_HI_I8 : FLAT_Real_ScratchAllAddr_gfx11<0x22, "SCRATCH_LOAD_SBYTE_D16_HI", "scratch_load_d16_hi_i8">;
defm SCRATCH_LOAD_D16_HI_B16 : FLAT_Real_ScratchAllAddr_gfx11<0x23, "SCRATCH_LOAD_SHORT_D16_HI", "scratch_load_d16_hi_b16">;
defm SCRATCH_STORE_D16_HI_B8 : FLAT_Real_ScratchAllAddr_gfx11<0x24, "SCRATCH_STORE_BYTE_D16_HI", "scratch_store_d16_hi_b8">;
defm SCRATCH_STORE_D16_HI_B16 : FLAT_Real_ScratchAllAddr_gfx11<0x25, "SCRATCH_STORE_SHORT_D16_HI", "scratch_store_d16_hi_b16">;

2
llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUInstPrinter.cpp
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@ -144,7 +144,7 @@ void AMDGPUInstPrinter::printFlatOffset(const MCInst *MI, unsigned OpNo,
if (IsFlatSeg) { // Unsigned offset
printU16ImmDecOperand(MI, OpNo, O);
} else { // Signed offset
if (AMDGPU::isGFX10Plus(STI)) {
if (AMDGPU::isGFX10(STI)) {
O << formatDec(SignExtend32<12>(MI->getOperand(OpNo).getImm()));
} else {
O << formatDec(SignExtend32<13>(MI->getOperand(OpNo).getImm()));

2
llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp
View File

@ -2198,7 +2198,7 @@ Optional<int64_t> getSMRDEncodedLiteralOffset32(const MCSubtargetInfo &ST,
}
unsigned getNumFlatOffsetBits(const MCSubtargetInfo &ST, bool Signed) {
// Address offset is 12-bit signed for GFX10, 13-bit for GFX9.
// Address offset is 12-bit signed for GFX10, 13-bit for GFX9 and GFX11+.
if (AMDGPU::isGFX10(ST))
return Signed ? 12 : 11;

196
llvm/test/MC/AMDGPU/flat-gfx11-mnemonic.s Normal file
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@ -0,0 +1,196 @@
// RUN: llvm-mc -arch=amdgcn -mcpu=gfx1100 -show-encoding %s | FileCheck --check-prefix=GFX11 %s
// FLAT
flat_load_ubyte v1, v[4:5]
// GFX11: flat_load_u8 v1, v[4:5] ; encoding: [0x00,0x00,0x40,0xdc,0x04,0x00,0x7c,0x01]
flat_load_sbyte v1, v[3:4]
// GFX11: encoding: [0x00,0x00,0x44,0xdc,0x03,0x00,0x7c,0x01]
flat_load_ushort v1, v[3:4]
// GFX11: encoding: [0x00,0x00,0x48,0xdc,0x03,0x00,0x7c,0x01]
flat_load_sshort v1, v[3:4]
// GFX11: encoding: [0x00,0x00,0x4c,0xdc,0x03,0x00,0x7c,0x01]
flat_load_dword v1, v[3:4]
// GFX11: encoding: [0x00,0x00,0x50,0xdc,0x03,0x00,0x7c,0x01]
flat_load_dwordx2 v[1:2], v[3:4]
// GFX11: encoding: [0x00,0x00,0x54,0xdc,0x03,0x00,0x7c,0x01]
flat_load_dwordx3 v[1:3], v[5:6]
// GFX11: encoding: [0x00,0x00,0x58,0xdc,0x05,0x00,0x7c,0x01]
flat_load_dwordx4 v[1:4], v[5:6]
// GFX11: encoding: [0x00,0x00,0x5c,0xdc,0x05,0x00,0x7c,0x01]
flat_store_byte v[3:4], v1
// GFX11: encoding: [0x00,0x00,0x60,0xdc,0x03,0x01,0x7c,0x00]
flat_store_short v[3:4], v1
// GFX11: encoding: [0x00,0x00,0x64,0xdc,0x03,0x01,0x7c,0x00]
flat_store_dword v[3:4], v1 offset:16
// GFX11: encoding: [0x10,0x00,0x68,0xdc,0x03,0x01,0x7c,0x00]
flat_store_dwordx2 v[1:2], v[3:4]
// GFX11: encoding: [0x00,0x00,0x6c,0xdc,0x01,0x03,0x7c,0x00]
flat_store_dwordx3 v[1:2], v[3:5]
// GFX11: encoding: [0x00,0x00,0x70,0xdc,0x01,0x03,0x7c,0x00]
flat_store_dwordx4 v[1:2], v[3:6]
// GFX11: flat_store_b128 v[1:2], v[3:6] ; encoding: [0x00,0x00,0x74,0xdc,0x01,0x03,0x7c,0x00]
flat_atomic_swap v0, v[1:2], v3 offset:2047 glc
// GFX11: encoding: [0xff,0x47,0xcc,0xdc,0x01,0x03,0x7c,0x00]
flat_atomic_swap_x2 v[1:2], v[3:4], v[5:6] offset:2047 glc
// GFX11: flat_atomic_swap_b64 v[1:2], v[3:4], v[5:6] offset:2047 glc ; encoding: [0xff,0x47,0x04,0xdd,0x03,0x05,0x7c,0x01]
flat_atomic_add v[3:4], v5 slc
// GFX11: encoding: [0x00,0x80,0xd4,0xdc,0x03,0x05,0x7c,0x00]
flat_atomic_cmpswap v0, v[1:2], v[3:4] offset:2047 glc
// GFX11: encoding: [0xff,0x47,0xd0,0xdc,0x01,0x03,0x7c,0x00]
flat_atomic_cmpswap_x2 v[1:2], v[3:4], v[5:8] offset:2047 glc
// GFX11: encoding: [0xff,0x47,0x08,0xdd,0x03,0x05,0x7c,0x01]
// GLOBAL No saddr
global_load_ubyte v1, v[3:4], off
// GFX11: global_load_u8 v1, v[3:4], off ; encoding: [0x00,0x00,0x42,0xdc,0x03,0x00,0x7c,0x01]
global_load_sbyte v1, v[3:4], off
// GFX11: encoding: [0x00,0x00,0x46,0xdc,0x03,0x00,0x7c,0x01]
global_load_ushort v1, v[3:4], off
// GFX11: encoding: [0x00,0x00,0x4a,0xdc,0x03,0x00,0x7c,0x01]
global_load_sshort v1, v[3:4], off
// GFX11: encoding: [0x00,0x00,0x4e,0xdc,0x03,0x00,0x7c,0x01]
global_load_dword v1, v[3:4], off
// GFX11: encoding: [0x00,0x00,0x52,0xdc,0x03,0x00,0x7c,0x01]
global_load_dwordx2 v[1:2], v[3:4], off
// GFX11: encoding: [0x00,0x00,0x56,0xdc,0x03,0x00,0x7c,0x01]
global_load_dwordx3 v[1:3], v[5:6], off
// GFX11: encoding: [0x00,0x00,0x5a,0xdc,0x05,0x00,0x7c,0x01]
global_load_dwordx4 v[1:4], v[5:6], off
// GFX11: encoding: [0x00,0x00,0x5e,0xdc,0x05,0x00,0x7c,0x01]
global_store_byte v[3:4], v1, off
// GFX11: encoding: [0x00,0x00,0x62,0xdc,0x03,0x01,0x7c,0x00]
global_store_short v[3:4], v1, off
// GFX11: encoding: [0x00,0x00,0x66,0xdc,0x03,0x01,0x7c,0x00]
global_store_dword v[3:4], v1, off offset:16
// GFX11: encoding: [0x10,0x00,0x6a,0xdc,0x03,0x01,0x7c,0x00]
global_store_dwordx2 v[1:2], v[3:4], off
// GFX11: encoding: [0x00,0x00,0x6e,0xdc,0x01,0x03,0x7c,0x00]
global_store_dwordx3 v[1:2], v[3:5], off
// GFX11: encoding: [0x00,0x00,0x72,0xdc,0x01,0x03,0x7c,0x00]
global_store_dwordx4 v[1:2], v[3:6], off
// GFX11: encoding: [0x00,0x00,0x76,0xdc,0x01,0x03,0x7c,0x00]
global_atomic_swap v0, v[1:2], v3, off offset:2047 glc
// GFX11: encoding: [0xff,0x47,0xce,0xdc,0x01,0x03,0x7c,0x00]
global_atomic_swap_x2 v[1:2], v[3:4], v[5:6], off offset:2047 glc
// GFX11: encoding: [0xff,0x47,0x06,0xdd,0x03,0x05,0x7c,0x01]
// SCRATCH
scratch_load_ubyte v1, v2, s1
// GFX11: encoding: [0x00,0x00,0x41,0xdc,0x02,0x00,0x81,0x01]
scratch_load_sbyte v1, v2, s1
// GFX11: encoding: [0x00,0x00,0x45,0xdc,0x02,0x00,0x81,0x01]
scratch_load_ushort v1, v2, s1
// GFX11: encoding: [0x00,0x00,0x49,0xdc,0x02,0x00,0x81,0x01]
scratch_load_sshort v1, v2, s1
// GFX11: encoding: [0x00,0x00,0x4d,0xdc,0x02,0x00,0x81,0x01]
scratch_load_dword v1, v2, s1
// GFX11: encoding: [0x00,0x00,0x51,0xdc,0x02,0x00,0x81,0x01]
scratch_load_dwordx2 v[1:2], v2, s1
// GFX11: encoding: [0x00,0x00,0x55,0xdc,0x02,0x00,0x81,0x01]
scratch_load_dwordx3 v[1:3], v2, s1
// GFX11: encoding: [0x00,0x00,0x59,0xdc,0x02,0x00,0x81,0x01]
scratch_load_dwordx4 v[1:4], v2, s1
// GFX11: encoding: [0x00,0x00,0x5d,0xdc,0x02,0x00,0x81,0x01]
scratch_store_byte v1, v2, s3
// GFX11: encoding: [0x00,0x00,0x61,0xdc,0x01,0x02,0x83,0x00]
scratch_store_short v1, v2, s3
// GFX11: encoding: [0x00,0x00,0x65,0xdc,0x01,0x02,0x83,0x00]
scratch_store_dword v1, v2, s3
// GFX11: encoding: [0x00,0x00,0x69,0xdc,0x01,0x02,0x83,0x00]
scratch_store_dwordx2 v1, v[2:3], s3
// GFX11: encoding: [0x00,0x00,0x6d,0xdc,0x01,0x02,0x83,0x00]
scratch_store_dwordx3 v1, v[2:4], s3
// GFX11: encoding: [0x00,0x00,0x71,0xdc,0x01,0x02,0x83,0x00]
scratch_store_dwordx4 v1, v[2:5], s3
// GFX11: encoding: [0x00,0x00,0x75,0xdc,0x01,0x02,0x83,0x00]
scratch_load_dword v1, v2, s1 offset:2047
// GFX11: encoding: [0xff,0x07,0x51,0xdc,0x02,0x00,0x81,0x01]
scratch_load_dword v1, v2, off offset:2047
// GFX11: encoding: [0xff,0x07,0x51,0xdc,0x02,0x00,0xfc,0x01]
scratch_load_dword v1, off, s1 offset:2047
// GFX11: encoding: [0xff,0x07,0x51,0xdc,0x00,0x00,0x01,0x01]
scratch_load_dword v1, off, off offset:2047
// GFX11: encoding: [0xff,0x07,0x51,0xdc,0x00,0x00,0x7c,0x01]
scratch_load_dword v1, off, off
// GFX11: encoding: [0x00,0x00,0x51,0xdc,0x00,0x00,0x7c,0x01]
scratch_store_dword v1, v2, s3 offset:2047
// GFX11: encoding: [0xff,0x07,0x69,0xdc,0x01,0x02,0x83,0x00]
scratch_store_dword v1, v2, off offset:2047
// GFX11: encoding: [0xff,0x07,0x69,0xdc,0x01,0x02,0xfc,0x00]
scratch_store_dword off, v2, s3 offset:2047
// GFX11: encoding: [0xff,0x07,0x69,0xdc,0x00,0x02,0x03,0x00]
scratch_store_dword off, v2, off offset:2047
// GFX11: encoding: [0xff,0x07,0x69,0xdc,0x00,0x02,0x7c,0x00]
scratch_load_dword v1, v2, s1 offset:4095
// GFX11: encoding: [0xff,0x0f,0x51,0xdc,0x02,0x00,0x81,0x01]
scratch_load_dword v1, v2, s1 offset:-4096
// GFX11: encoding: [0x00,0x10,0x51,0xdc,0x02,0x00,0x81,0x01]
scratch_store_dword v1, v2, s1 offset:4095
// GFX11: encoding: [0xff,0x0f,0x69,0xdc,0x01,0x02,0x81,0x00]
scratch_store_dword v1, v2, s1 offset:-4096
// GFX11: encoding: [0x00,0x10,0x69,0xdc,0x01,0x02,0x81,0x00]
scratch_store_dword off, v2, off
// GFX11: encoding: [0x00,0x00,0x69,0xdc,0x00,0x02,0x7c,0x00]

852
llvm/test/MC/AMDGPU/gfx11-flat-errs.s Normal file
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@ -0,0 +1,852 @@
// RUN: not llvm-mc -arch=amdgcn -mcpu=tonga 2>&1 %s | FileCheck -check-prefix=VI-GFX9_10-ERR --implicit-check-not=error: %s
// RUN: not llvm-mc -arch=amdgcn -mcpu=gfx900 2>&1 %s | FileCheck -check-prefix=VI-GFX9_10-ERR --implicit-check-not=error: %s
// RUN: not llvm-mc -arch=amdgcn -mcpu=gfx1010 2>&1 %s | FileCheck --check-prefix=VI-GFX9_10-ERR --implicit-check-not=error: %s
// RUN: not llvm-mc -arch=amdgcn -mcpu=gfx1030 2>&1 %s | FileCheck --check-prefix=VI-GFX9_10-ERR --implicit-check-not=error: %s
// RUN: not llvm-mc -arch=amdgcn -mcpu=gfx1100 2>&1 %s | FileCheck --check-prefix=GFX11-ERR --implicit-check-not=error: %s
// FLAT
flat_load_u8 v1, v[3:4]
// VI-GFX9_10-ERR: error: instruction not supported on this GPU
flat_load_i8 v1, v[3:4]
// VI-GFX9_10-ERR: error: instruction not supported on this GPU
flat_load_u16 v1, v[3:4]
// VI-GFX9_10-ERR: error: instruction not supported on this GPU
flat_load_i16 v1, v[3:4]
// VI-GFX9_10-ERR: error: instruction not supported on this GPU
flat_load_d16_b16 v1, v[3:4]
// VI-GFX9_10-ERR: error: instruction not supported on this GPU
flat_load_b32 v1, v[3:4]
// VI-GFX9_10-ERR: error: instruction not supported on this GPU
flat_load_b32 v1, v[3:4] offset:-1
// GFX11-ERR: error: expected a 12-bit unsigned offset
// VI-GFX9_10-ERR: error: instruction not supported on this GPU
flat_load_b32 v1, v[3:4] offset:2047
// VI-GFX9_10-ERR: error: instruction not supported on this GPU
flat_load_b32 v1, v[3:4] offset:4096
// GFX11-ERR: error: expected a 12-bit unsigned offset
// VI-GFX9_10-ERR: error: instruction not supported on this GPU
flat_load_b32 v1, v[3:4] offset:4 glc
// VI-GFX9_10-ERR: error: instruction not supported on this GPU
flat_load_b32 v1, v[3:4] offset:4 glc slc
// VI-GFX9_10-ERR: error: instruction not supported on this GPU
flat_load_b32 v1, v[3:4] offset:4 glc slc dlc
// VI-GFX9_10-ERR: error: instruction not supported on this GPU
flat_load_b64 v[1:2], v[3:4]
// VI-GFX9_10-ERR: error: instruction not supported on this GPU
flat_load_b96 v[1:3], v[5:6]
// VI-GFX9_10-ERR: error: instruction not supported on this GPU
flat_load_b128 v[1:4], v[5:6]
// VI-GFX9_10-ERR: error: instruction not supported on this GPU
flat_load_d16_i8 v1, v[3:4]
// VI-GFX9_10-ERR: error: instruction not supported on this GPU
flat_load_d16_hi_i8 v1, v[3:4]
// VI-GFX9_10-ERR: error: instruction not supported on this GPU
flat_store_b8 v[3:4], v1
// VI-GFX9_10-ERR: error: instruction not supported on this GPU
flat_store_b16 v[3:4], v1
// VI-GFX9_10-ERR: error: instruction not supported on this GPU
flat_store_b32 v[3:4], v1 offset:16
// VI-GFX9_10-ERR: error: instruction not supported on this GPU
flat_store_b32 v[3:4], v1, off
// GFX11-ERR: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction
// VI-GFX9_10-ERR: error: instruction not supported on this GPU
flat_store_b32 v[3:4], v1, s[0:1]
// GFX11-ERR: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction
// VI-GFX9_10-ERR: error: instruction not supported on this GPU
flat_store_b32 v[3:4], v1, s0
// GFX11-ERR: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction
// VI-GFX9_10-ERR: error: instruction not supported on this GPU
flat_load_b32 v1, v[3:4], off
// GFX11-ERR: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction
// VI-GFX9_10-ERR: error: instruction not supported on this GPU
flat_load_b32 v1, v[3:4], s[0:1]
// GFX11-ERR: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction
// VI-GFX9_10-ERR: error: instruction not supported on this GPU
flat_load_b32 v1, v[3:4], s0
// GFX11-ERR: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction
// VI-GFX9_10-ERR: error: instruction not supported on this GPU
flat_load_b32 v1, v[3:4], exec_hi
// GFX11-ERR: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction
// VI-GFX9_10-ERR: error: instruction not supported on this GPU
flat_store_b32 v[3:4], v1, exec_hi
// GFX11-ERR: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction
// VI-GFX9_10-ERR: error: instruction not supported on this GPU
flat_store_b64 v[1:2], v[3:4]
// VI-GFX9_10-ERR: error: instruction not supported on this GPU
flat_store_b96 v[1:2], v[3:5]
// VI-GFX9_10-ERR: error: instruction not supported on this GPU
flat_store_b128 v[1:2], v[3:6]
// VI-GFX9_10-ERR: error: instruction not supported on this GPU
flat_atomic_swap_b32 v0, v[1:2], v3 offset:2047
// GFX11-ERR: [[@LINE-1]]:{{[0-9]+}}: error: instruction must use glc
// VI-GFX9_10-ERR: error: instruction not supported on this GPU
flat_atomic_swap_b32 v[1:2], v3 offset:2047 glc
// GFX11-ERR: error: instruction must not use glc
// VI-GFX9_10-ERR: error: instruction not supported on this GPU
flat_atomic_swap_b32 v0, v[1:2], v3 offset:2047 glc
// VI-GFX9_10-ERR: error: instruction not supported on this GPU
flat_atomic_swap_b32 v0, v[1:2], v3 offset:2047 glc slc
// VI-GFX9_10-ERR: error: instruction not supported on this GPU
flat_atomic_swap_b32 v0, v[1:2], v3 glc
// VI-GFX9_10-ERR: error: instruction not supported on this GPU
flat_atomic_swap_b32 v0, v[1:2], v3 glc slc
// VI-GFX9_10-ERR: error: instruction not supported on this GPU
flat_atomic_swap_b32 v0, v[1:2], v3
// GFX11-ERR: [[@LINE-1]]:{{[0-9]+}}: error: instruction must use glc
// VI-GFX9_10-ERR: error: instruction not supported on this GPU
flat_atomic_swap_b32 v0, v[1:2], v3 slc
// GFX11-ERR: [[@LINE-1]]:{{[0-9]+}}: error: instruction must use glc
// VI-GFX9_10-ERR: error: instruction not supported on this GPU
flat_atomic_swap_b32 v0, v[1:2], v3 offset:2047 slc
// GFX11-ERR: [[@LINE-1]]:{{[0-9]+}}: error: instruction must use glc
// VI-GFX9_10-ERR: error: instruction not supported on this GPU
flat_atomic_swap_b64 v[1:2], v[3:4] offset:2047 glc
// GFX11-ERR: error: instruction must not use glc
// VI-GFX9_10-ERR: error: instruction not supported on this GPU
flat_atomic_swap_b64 v[1:2], v[3:4] glc
// GFX11-ERR: error: instruction must not use glc
// VI-GFX9_10-ERR: error: instruction not supported on this GPU
flat_atomic_swap_b64 v[1:2], v[3:4], v[5:6] offset:2047 glc
// VI-GFX9_10-ERR: error: instruction not supported on this GPU
flat_atomic_swap_b64 v[1:2], v[3:4], v[5:6] offset:2047 glc slc
// VI-GFX9_10-ERR: error: instruction not supported on this GPU
flat_atomic_swap_b64 v[1:2], v[3:4], v[5:6] glc
// VI-GFX9_10-ERR: error: instruction not supported on this GPU
flat_atomic_swap_b64 v[1:2], v[3:4], v[5:6] glc slc
// VI-GFX9_10-ERR: error: instruction not supported on this GPU
flat_atomic_add_u32 v[3:4], v5 slc
// VI-GFX9_10-ERR: error: instruction not supported on this GPU
flat_atomic_add_u32 v2, v[3:4], v5 slc
// GFX11-ERR: [[@LINE-1]]:{{[0-9]+}}: error: instruction must use glc
// VI-GFX9_10-ERR: error: instruction not supported on this GPU
flat_atomic_add_u32 v1, v[3:4], v5 offset:8 slc
// GFX11-ERR: [[@LINE-1]]:{{[0-9]+}}: error: instruction must use glc
// VI-GFX9_10-ERR: error: instruction not supported on this GPU
flat_atomic_cmpswap_b32 v0, v[1:2], v[3:4] offset:2047
// GFX11-ERR: [[@LINE-1]]:{{[0-9]+}}: error: instruction must use glc
// VI-GFX9_10-ERR: error: instruction not supported on this GPU
flat_atomic_cmpswap_b32 v[1:2], v[3:4] offset:2047 glc
// GFX11-ERR: error: instruction must not use glc
// VI-GFX9_10-ERR: error: instruction not supported on this GPU
flat_atomic_cmpswap_b32 v0, v[1:2], v[3:4] offset:2047 glc
// VI-GFX9_10-ERR: error: instruction not supported on this GPU
flat_atomic_cmpswap_b32 v0, v[1:2], v[3:4] offset:2047 glc slc
// VI-GFX9_10-ERR: error: instruction not supported on this GPU
flat_atomic_cmpswap_b32 v0, v[1:2], v[3:4] glc
// VI-GFX9_10-ERR: error: instruction not supported on this GPU
flat_atomic_cmpswap_b32 v0, v[1:2], v[3:4] glc slc
// VI-GFX9_10-ERR: error: instruction not supported on this GPU
flat_atomic_cmpswap_b32 v0, v[1:2], v[3:4]
// GFX11-ERR: [[@LINE-1]]:{{[0-9]+}}: error: instruction must use glc
// VI-GFX9_10-ERR: error: instruction not supported on this GPU
flat_atomic_cmpswap_b32 v0, v[1:2], v[3:4] slc
// GFX11-ERR: [[@LINE-1]]:{{[0-9]+}}: error: instruction must use glc
// VI-GFX9_10-ERR: error: instruction not supported on this GPU
flat_atomic_cmpswap_b32 v0, v[1:2], v[3:4] offset:2047 slc
// GFX11-ERR: [[@LINE-1]]:{{[0-9]+}}: error: instruction must use glc
// VI-GFX9_10-ERR: error: instruction not supported on this GPU
flat_atomic_cmpswap_b64 v[1:2], v[3:4] offset:2047
// GFX11-ERR: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction
// VI-GFX9_10-ERR: error: instruction not supported on this GPU
flat_atomic_cmpswap_b64 v[1:2], v[3:4] offset:2047 glc
// GFX11-ERR: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction
// VI-GFX9_10-ERR: error: instruction not supported on this GPU
flat_atomic_cmpswap_b64 v[1:2], v[3:4] glc
// GFX11-ERR: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction
// VI-GFX9_10-ERR: error: instruction not supported on this GPU
flat_atomic_cmpswap_b64 v[1:2], v[3:4], v[5:8] offset:2047 glc
// VI-GFX9_10-ERR: error: instruction not supported on this GPU
flat_atomic_cmpswap_b64 v[1:2], v[3:4], v[5:8] offset:2047 glc slc
// VI-GFX9_10-ERR: error: instruction not supported on this GPU
flat_atomic_cmpswap_b64 v[1:2], v[3:4], v[5:8] glc
// VI-GFX9_10-ERR: error: instruction not supported on this GPU
flat_atomic_cmpswap_b64 v[1:2], v[3:4], v[5:8] glc slc
// VI-GFX9_10-ERR: error: instruction not supported on this GPU
flat_load_d16_u8 v1, v[3:4]
// VI-GFX9_10-ERR: error: instruction not supported on this GPU
flat_load_d16_hi_u8 v1, v[3:4]
// VI-GFX9_10-ERR: error: instruction not supported on this GPU
flat_load_d16_i8 v1, v[3:4]
// VI-GFX9_10-ERR: error: instruction not supported on this GPU
flat_load_d16_hi_i8 v1, v[3:4]
// VI-GFX9_10-ERR: error: instruction not supported on this GPU
flat_load_d16_b16 v1, v[3:4]
// VI-GFX9_10-ERR: error: instruction not supported on this GPU
flat_load_d16_hi_b16 v1, v[3:4]
// VI-GFX9_10-ERR: error: instruction not supported on this GPU
flat_store_d16_hi_b8 v[3:4], v1
// VI-GFX9_10-ERR: error: instruction not supported on this GPU
flat_store_d16_hi_b16 v[3:4], v1
// VI-GFX9_10-ERR: error: instruction not supported on this GPU
// GLOBAL No saddr
global_load_u8 v1, v[3:4], off
// VI-GFX9_10-ERR: error: instruction not supported on this GPU
global_load_i8 v1, v[3:4], off
// VI-GFX9_10-ERR: error: instruction not supported on this GPU
global_load_u16 v1, v[3:4], off
// VI-GFX9_10-ERR: error: instruction not supported on this GPU
global_load_i16 v1, v[3:4], off
// VI-GFX9_10-ERR: error: instruction not supported on this GPU
global_load_d16_b16 v1, v[3:4], off
// VI-GFX9_10-ERR: error: instruction not supported on this GPU
global_load_b32 v1, v[3:4], off
// VI-GFX9_10-ERR: error: instruction not supported on this GPU
global_load_b32 v1, v[3:4], off offset:-1
// VI-GFX9_10-ERR: error: instruction not supported on this GPU
global_load_b32 v1, v[3:4], off offset:2047
// VI-GFX9_10-ERR: error: instruction not supported on this GPU
global_load_b32 v1, v[3:4], off offset:2048
// VI-GFX9_10-ERR: error: instruction not supported on this GPU
global_load_b32 v1, v[3:4], off offset:4096
// GFX11-ERR: [[@LINE-1]]:{{[0-9]+}}: error: expected a 13-bit signed offset
// VI-GFX9_10-ERR: error: instruction not supported on this GPU
global_load_b32 v1, v[3:4], off offset:4 glc
// VI-GFX9_10-ERR: error: instruction not supported on this GPU
global_load_b32 v1, v[3:4], off offset:4 glc slc
// VI-GFX9_10-ERR: error: instruction not supported on this GPU
global_load_b32 v1, v[3:4], off offset:4 glc slc dlc
// VI-GFX9_10-ERR: error: instruction not supported on this GPU
global_load_b64 v[1:2], v[3:4], off
// VI-GFX9_10-ERR: error: instruction not supported on this GPU
global_load_b96 v[1:3], v[5:6], off
// VI-GFX9_10-ERR: error: instruction not supported on this GPU
global_load_b128 v[1:4], v[5:6], off
// VI-GFX9_10-ERR: error: instruction not supported on this GPU
global_load_d16_i8 v1, v[3:4], off
// VI-GFX9_10-ERR: error: instruction not supported on this GPU
global_load_d16_hi_i8 v1, v[3:4], off
// VI-GFX9_10-ERR: error: instruction not supported on this GPU
global_store_b8 v[3:4], v1, off
// VI-GFX9_10-ERR: error: instruction not supported on this GPU
global_store_b16 v[3:4], v1, off
// VI-GFX9_10-ERR: error: instruction not supported on this GPU
global_store_b32 v[3:4], v1, off offset:16
// VI-GFX9_10-ERR: error: instruction not supported on this GPU
global_store_b32 v[3:4], v1
// GFX11-ERR: [[@LINE-1]]:{{[0-9]+}}: error: too few operands for instruction
// VI-GFX9_10-ERR: error: instruction not supported on this GPU
global_store_b32 v[3:4], v1, s[0:1]
// GFX11-ERR: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction
// VI-GFX9_10-ERR: error: instruction not supported on this GPU
global_store_b32 v[3:4], v1, s0
// GFX11-ERR: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction
// VI-GFX9_10-ERR: error: instruction not supported on this GPU
global_load_b32 v1, v[3:4], off
// VI-GFX9_10-ERR: error: instruction not supported on this GPU
global_load_b32 v1, v[3:4], off, s[0:1]
// GFX11-ERR: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction
// VI-GFX9_10-ERR: error: instruction not supported on this GPU
global_load_b32 v1, v[3:4], s0
// GFX11-ERR: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction
// VI-GFX9_10-ERR: error: instruction not supported on this GPU
global_load_b32 v1, v[3:4], exec_hi
// GFX11-ERR: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction
// VI-GFX9_10-ERR: error: instruction not supported on this GPU
global_store_b32 v[3:4], v1, exec_hi
// GFX11-ERR: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction
// VI-GFX9_10-ERR: error: instruction not supported on this GPU
global_store_b64 v[1:2], v[3:4], off
// VI-GFX9_10-ERR: error: instruction not supported on this GPU
global_store_b96 v[1:2], v[3:5], off
// VI-GFX9_10-ERR: error: instruction not supported on this GPU
global_store_b128 v[1:2], v[3:6], off
// VI-GFX9_10-ERR: error: instruction not supported on this GPU
global_atomic_swap_b32 v0, v[1:2], v3, off offset:2047
// GFX11-ERR: [[@LINE-1]]:{{[0-9]+}}: error: instruction must use glc
// VI-GFX9_10-ERR: error: instruction not supported on this GPU
global_atomic_swap_b32 v[1:2], v3 offset:2047 glc
// GFX11-ERR: [[@LINE-1]]:{{[0-9]+}}: error: not a valid operand
// VI-GFX9_10-ERR: error: instruction not supported on this GPU
global_atomic_swap_b32 v[1:2], v3 glc
// GFX11-ERR: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction
// VI-GFX9_10-ERR: error: instruction not supported on this GPU
global_atomic_swap_b32 v0, v[1:2], v3, off offset:2047 glc
// VI-GFX9_10-ERR: error: instruction not supported on this GPU
global_atomic_swap_b32 v0, v[1:2], v3, off offset:2047 glc slc
// VI-GFX9_10-ERR: error: instruction not supported on this GPU
global_atomic_swap_b32 v0, v[1:2], v3, off glc
// VI-GFX9_10-ERR: error: instruction not supported on this GPU
global_atomic_swap_b32 v0, v[1:2], v3, off glc slc
// VI-GFX9_10-ERR: error: instruction not supported on this GPU
global_atomic_swap_b32 v0, v[1:2], v3, off
// GFX11-ERR: [[@LINE-1]]:{{[0-9]+}}: error: instruction must use glc
// VI-GFX9_10-ERR: error: instruction not supported on this GPU
global_atomic_swap_b32 v0, v[1:2], v3, off slc
// GFX11-ERR: [[@LINE-1]]:{{[0-9]+}}: error: instruction must use glc
// VI-GFX9_10-ERR: error: instruction not supported on this GPU
global_atomic_swap_b32 v0, v[1:2], v3, off offset:2047 slc
// GFX11-ERR: [[@LINE-1]]:{{[0-9]+}}: error: instruction must use glc
// VI-GFX9_10-ERR: error: instruction not supported on this GPU
global_atomic_swap_b64 v[1:2], v[3:4], v[5:6], off offset:2047 glc
// VI-GFX9_10-ERR: error: instruction not supported on this GPU
global_atomic_swap_b64 v[1:2], v[3:4], v[5:6], off offset:2047 glc slc
// VI-GFX9_10-ERR: error: instruction not supported on this GPU
global_atomic_swap_b64 v[1:2], v[3:4], v[5:6], off glc
// VI-GFX9_10-ERR: error: instruction not supported on this GPU
global_atomic_swap_b64 v[1:2], v[3:4], v[5:6], off glc slc
// VI-GFX9_10-ERR: error: instruction not supported on this GPU
global_atomic_add_u32 v2, v[3:4], off, v5 slc
// GFX11-ERR: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction
// VI-GFX9_10-ERR: error: instruction not supported on this GPU
global_atomic_add_u32 v1, v[3:4], off, v5 offset:8 slc
// GFX11-ERR: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction
// VI-GFX9_10-ERR: error: instruction not supported on this GPU
global_atomic_cmpswap_b32 v0, v[1:2], v[3:4], off offset:2047
// GFX11-ERR: [[@LINE-1]]:{{[0-9]+}}: error: instruction must use glc
// VI-GFX9_10-ERR: error: instruction not supported on this GPU
global_atomic_cmpswap_b32 v0, v[1:2], v[3:4], off offset:2047 glc
// VI-GFX9_10-ERR: error: instruction not supported on this GPU
global_atomic_cmpswap_b32 v0, v[1:2], v[3:4], off offset:2047 glc slc
// VI-GFX9_10-ERR: error: instruction not supported on this GPU
global_atomic_cmpswap_b32 v0, v[1:2], v[3:4], off glc
// VI-GFX9_10-ERR: error: instruction not supported on this GPU
global_atomic_cmpswap_b32 v0, v[1:2], v[3:4], off glc slc
// VI-GFX9_10-ERR: error: instruction not supported on this GPU
global_atomic_cmpswap_b32 v0, v[1:2], off, v[3:4]
// GFX11-ERR: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction
// VI-GFX9_10-ERR: error: instruction not supported on this GPU
global_atomic_cmpswap_b32 v0, v[1:2], v[3:4], off slc
// GFX11-ERR: [[@LINE-1]]:{{[0-9]+}}: error: instruction must use glc
// VI-GFX9_10-ERR: error: instruction not supported on this GPU
global_atomic_cmpswap_b32 v0, v[1:2], v[3:4], off offset:2047 slc
// GFX11-ERR: [[@LINE-1]]:{{[0-9]+}}: error: instruction must use glc
// VI-GFX9_10-ERR: error: instruction not supported on this GPU
global_atomic_cmpswap_b64 v[1:2], v[3:4], off offset:2047
// GFX11-ERR: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction
// VI-GFX9_10-ERR: error: instruction not supported on this GPU
global_atomic_cmpswap_b64 v[1:2], v[3:4], v[5:8], off offset:2047 glc
// VI-GFX9_10-ERR: error: instruction not supported on this GPU
global_atomic_cmpswap_b64 v[1:2], v[3:4], v[5:8], off offset:2047 glc slc
// VI-GFX9_10-ERR: error: instruction not supported on this GPU
global_atomic_cmpswap_b64 v[1:2], v[3:4], v[5:8], off glc
// VI-GFX9_10-ERR: error: instruction not supported on this GPU
global_atomic_cmpswap_b64 v[1:2], v[3:4], v[5:8], off glc slc
// VI-GFX9_10-ERR: error: instruction not supported on this GPU
global_load_d16_u8 v1, v[3:4], off
// VI-GFX9_10-ERR: error: instruction not supported on this GPU
global_load_d16_hi_u8 v1, v[3:4], off
// VI-GFX9_10-ERR: error: instruction not supported on this GPU
global_load_d16_i8 v1, v[3:4], off
// VI-GFX9_10-ERR: error: instruction not supported on this GPU
global_load_d16_hi_i8 v1, v[3:4], off
// VI-GFX9_10-ERR: error: instruction not supported on this GPU
global_load_d16_b16 v1, v[3:4], off
// VI-GFX9_10-ERR: error: instruction not supported on this GPU
global_load_d16_hi_b16 v1, v[3:4], off
// VI-GFX9_10-ERR: error: instruction not supported on this GPU
global_store_d16_hi_b8 v[3:4], v1, off
// VI-GFX9_10-ERR: error: instruction not supported on this GPU
global_store_d16_hi_b16 v[3:4], v1, off
// VI-GFX9_10-ERR: error: instruction not supported on this GPU
global_load_addtid_b32 v1, off
// VI-GFX9_10-ERR: error: instruction not supported on this GPU
// GLOBAL With saddr
global_load_u8 v1, v3, s2
// GFX11-ERR: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction
// VI-GFX9_10-ERR: error: instruction not supported on this GPU
global_load_u8 v1, v3, s[2:3]
// VI-GFX9_10-ERR: error: instruction not supported on this GPU
global_load_i8 v1, v3, s[2:3]
// VI-GFX9_10-ERR: error: instruction not supported on this GPU
global_load_u16 v1, v3, s[2:3]
// VI-GFX9_10-ERR: error: instruction not supported on this GPU
global_load_i16 v1, v3, s[2:3]
// VI-GFX9_10-ERR: error: instruction not supported on this GPU
global_load_d16_b16 v1, v3, s[2:3]
// VI-GFX9_10-ERR: error: instruction not supported on this GPU
global_load_b32 v1, v3, s[2:3]
// VI-GFX9_10-ERR: error: instruction not supported on this GPU
global_load_b32 v1, v3, s[2:3] offset:-1
// VI-GFX9_10-ERR: error: instruction not supported on this GPU
global_load_b32 v1, v3, s[2:3] offset:-4097
// GFX11-ERR: [[@LINE-1]]:{{[0-9]+}}: error: expected a 13-bit signed offset
// VI-GFX9_10-ERR: error: instruction not supported on this GPU
global_load_b32 v1, v3, s[2:3] offset:2047
// VI-GFX9_10-ERR: error: instruction not supported on this GPU
global_load_b32 v1, v3, s[2:3] offset:2048
// VI-GFX9_10-ERR: error: instruction not supported on this GPU
global_load_b32 v1, v3, s[2:3] offset:4096
// GFX11-ERR: [[@LINE-1]]:{{[0-9]+}}: error: expected a 13-bit signed offset
// VI-GFX9_10-ERR: error: instruction not supported on this GPU
global_load_b32 v1, v3, s[2:3] offset:4 glc
// VI-GFX9_10-ERR: error: instruction not supported on this GPU
global_load_b32 v1, v3, s[2:3] offset:4 glc slc
// VI-GFX9_10-ERR: error: instruction not supported on this GPU
global_load_b32 v1, v3, s[2:3] offset:4 glc slc dlc
// VI-GFX9_10-ERR: error: instruction not supported on this GPU
global_load_b64 v[1:2], v3, s[2:3]
// VI-GFX9_10-ERR: error: instruction not supported on this GPU
global_load_b96 v[1:3], v5, s[2:3]
// VI-GFX9_10-ERR: error: instruction not supported on this GPU
global_load_b128 v[1:4], v5, s[2:3]
// VI-GFX9_10-ERR: error: instruction not supported on this GPU
global_load_d16_i8 v1, v3, s[2:3]
// VI-GFX9_10-ERR: error: instruction not supported on this GPU
global_load_d16_hi_i8 v1, v3, s[2:3]
// VI-GFX9_10-ERR: error: instruction not supported on this GPU
global_store_b8 v3, v1, s[2:3]
// VI-GFX9_10-ERR: error: instruction not supported on this GPU
global_store_b16 v3, v1, s[2:3]
// VI-GFX9_10-ERR: error: instruction not supported on this GPU
global_store_b32 v3, v1, s[2:3] offset:16
// VI-GFX9_10-ERR: error: instruction not supported on this GPU
global_store_b32 v3, v1
// GFX11-ERR: [[@LINE-1]]:{{[0-9]+}}: error: too few operands for instruction
// VI-GFX9_10-ERR: error: instruction not supported on this GPU
global_store_b32 v3, v1, s[0:1]
// VI-GFX9_10-ERR: error: instruction not supported on this GPU
global_store_b32 v3, v1, s0
// GFX11-ERR: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction
// VI-GFX9_10-ERR: error: instruction not supported on this GPU
global_load_b32 v1, v3, s[2:3]
// VI-GFX9_10-ERR: error: instruction not supported on this GPU
global_load_b32 v1, v3, s[2:3], s[0:1]
// GFX11-ERR: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction
// VI-GFX9_10-ERR: error: instruction not supported on this GPU
global_load_b32 v1, v3, s0
// GFX11-ERR: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction
// VI-GFX9_10-ERR: error: instruction not supported on this GPU
global_load_b32 v1, v3, exec_hi
// GFX11-ERR: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction
// VI-GFX9_10-ERR: error: instruction not supported on this GPU
global_store_b32 v3, v1, exec_hi
// GFX11-ERR: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction
// VI-GFX9_10-ERR: error: instruction not supported on this GPU
global_store_b64 v1, v[2:3], s[2:3]
// VI-GFX9_10-ERR: error: instruction not supported on this GPU
global_store_b96 v1, v[3:5], s[2:3]
// VI-GFX9_10-ERR: error: instruction not supported on this GPU
global_store_b128 v1, v[3:6], s[2:3]
// VI-GFX9_10-ERR: error: instruction not supported on this GPU
global_atomic_swap_b32 v0, v[1:2], v3, s[2:3] offset:2047
// GFX11-ERR: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction
// VI-GFX9_10-ERR: error: instruction not supported on this GPU
global_atomic_swap_b32 v[1:2], v3 offset:2047 glc
// GFX11-ERR: [[@LINE-1]]:{{[0-9]+}}: error: not a valid operand
// VI-GFX9_10-ERR: error: instruction not supported on this GPU
global_atomic_swap_b32 v[1:2], v3 glc
// GFX11-ERR: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction
// VI-GFX9_10-ERR: error: instruction not supported on this GPU
global_atomic_swap_b32 v0, v1, v3, s[2:3] offset:2047 glc
// VI-GFX9_10-ERR: error: instruction not supported on this GPU
global_atomic_swap_b32 v0, v1, v3, s[2:3] offset:2047 glc slc
// VI-GFX9_10-ERR: error: instruction not supported on this GPU
global_atomic_swap_b32 v0, v1, v3, s[2:3] glc
// VI-GFX9_10-ERR: error: instruction not supported on this GPU
global_atomic_swap_b32 v0, v1, v3, s[2:3] glc slc
// VI-GFX9_10-ERR: error: instruction not supported on this GPU
global_atomic_swap_b32 v0, v1, v3, s[2:3]
// GFX11-ERR: [[@LINE-1]]:{{[0-9]+}}: error: instruction must use glc
// VI-GFX9_10-ERR: error: instruction not supported on this GPU
global_atomic_swap_b32 v0, v1, v3, s[2:3] slc
// GFX11-ERR: [[@LINE-1]]:{{[0-9]+}}: error: instruction must use glc
// VI-GFX9_10-ERR: error: instruction not supported on this GPU
global_atomic_swap_b32 v0, v[1:2], v3, s[2:3] offset:2047 slc
// GFX11-ERR: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction
// VI-GFX9_10-ERR: error: instruction not supported on this GPU
global_atomic_swap_b64 v[1:2], v3, v[5:6], s[2:3] offset:2047 glc
// VI-GFX9_10-ERR: error: instruction not supported on this GPU
global_atomic_swap_b64 v[1:2], v3, v[5:6], s[2:3] offset:2047 glc slc
// VI-GFX9_10-ERR: error: instruction not supported on this GPU
global_atomic_swap_b64 v[1:2], v3, v[5:6], s[2:3] glc
// VI-GFX9_10-ERR: error: instruction not supported on this GPU
global_atomic_swap_b64 v[1:2], v3, v[5:6], s[2:3] glc slc
// VI-GFX9_10-ERR: error: instruction not supported on this GPU
global_atomic_add_u32 v2, v3, s[2:3], v5 slc
// GFX11-ERR: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction
// VI-GFX9_10-ERR: error: instruction not supported on this GPU
global_atomic_add_u32 v1, v3, s[2:3], v5 offset:8 slc
// GFX11-ERR: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction
// VI-GFX9_10-ERR: error: instruction not supported on this GPU
global_atomic_cmpswap_b32 v0, v1, v3, s[2:3] offset:2047
// GFX11-ERR: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction
// VI-GFX9_10-ERR: error: instruction not supported on this GPU
global_atomic_cmpswap_b32 v0, v1, v[2:3], s[2:3] offset:2047 glc
// VI-GFX9_10-ERR: error: instruction not supported on this GPU
global_atomic_cmpswap_b32 v0, v1, v[2:3], s[2:3] offset:2047 glc slc
// VI-GFX9_10-ERR: error: instruction not supported on this GPU
global_atomic_cmpswap_b32 v0, v1, v[2:3], s[2:3] glc
// VI-GFX9_10-ERR: error: instruction not supported on this GPU
global_atomic_cmpswap_b32 v0, v1, v[2:3], s[2:3] glc slc
// VI-GFX9_10-ERR: error: instruction not supported on this GPU
global_atomic_cmpswap_b32 v0, v1, s[2:3], v3
// GFX11-ERR: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction
// VI-GFX9_10-ERR: error: instruction not supported on this GPU
global_atomic_cmpswap_b32 v0, v1, v3, s[2:3] slc
// GFX11-ERR: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction
// VI-GFX9_10-ERR: error: instruction not supported on this GPU
global_atomic_cmpswap_b32 v0, v1, v3, s[2:3] offset:2047 slc
// GFX11-ERR: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction
// VI-GFX9_10-ERR: error: instruction not supported on this GPU
global_atomic_cmpswap_b64 v[1:2], v3, s[2:3] offset:2047
// GFX11-ERR: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction
// VI-GFX9_10-ERR: error: instruction not supported on this GPU
global_atomic_cmpswap_b64 v[1:2], v3, v[5:8], s[2:3] offset:2047 glc
// VI-GFX9_10-ERR: error: instruction not supported on this GPU
global_atomic_cmpswap_b64 v[1:2], v3, v[5:8], s[2:3] offset:2047 glc slc
// VI-GFX9_10-ERR: error: instruction not supported on this GPU
global_atomic_cmpswap_b64 v[1:2], v3, v[5:8], s[2:3] glc
// VI-GFX9_10-ERR: error: instruction not supported on this GPU
global_atomic_cmpswap_b64 v[1:2], v3, v[5:8], s[2:3] glc slc
// VI-GFX9_10-ERR: error: instruction not supported on this GPU
global_load_d16_u8 v1, v3, s[2:3]
// VI-GFX9_10-ERR: error: instruction not supported on this GPU
global_load_d16_hi_u8 v1, v3, s[2:3]
// VI-GFX9_10-ERR: error: instruction not supported on this GPU
global_load_d16_i8 v1, v3, s[2:3]
// VI-GFX9_10-ERR: error: instruction not supported on this GPU
global_load_d16_hi_i8 v1, v3, s[2:3]
// VI-GFX9_10-ERR: error: instruction not supported on this GPU
global_load_d16_b16 v1, v3, s[2:3]
// VI-GFX9_10-ERR: error: instruction not supported on this GPU
global_load_d16_hi_b16 v1, v3, s[2:3]
// VI-GFX9_10-ERR: error: instruction not supported on this GPU
global_store_d16_hi_b8 v3, v1, s[2:3]
// VI-GFX9_10-ERR: error: instruction not supported on this GPU
global_store_d16_hi_b16 v3, v1, s[2:3]
// VI-GFX9_10-ERR: error: instruction not supported on this GPU
global_load_addtid_b32 v1, s[2:3]
// VI-GFX9_10-ERR: error: instruction not supported on this GPU
// SCRATCH
scratch_load_u8 v1, v2, s1
// VI-GFX9_10-ERR: error: instruction not supported on this GPU
scratch_load_i8 v1, v2, s1
// VI-GFX9_10-ERR: error: instruction not supported on this GPU
scratch_load_u16 v1, v2, s1
// VI-GFX9_10-ERR: error: instruction not supported on this GPU
scratch_load_i16 v1, v2, s1
// VI-GFX9_10-ERR: error: instruction not supported on this GPU
scratch_load_b32 v1, v2, s1
// VI-GFX9_10-ERR: error: instruction not supported on this GPU
scratch_load_b64 v[1:2], v2, s1
// VI-GFX9_10-ERR: error: instruction not supported on this GPU
scratch_load_b96 v[1:3], v2, s1
// VI-GFX9_10-ERR: error: instruction not supported on this GPU
scratch_load_b128 v[1:4], v2, s1
// VI-GFX9_10-ERR: error: instruction not supported on this GPU
scratch_store_b8 v1, v2, s3
// VI-GFX9_10-ERR: error: instruction not supported on this GPU
scratch_store_b16 v1, v2, s3
// VI-GFX9_10-ERR: error: instruction not supported on this GPU
scratch_store_b32 v1, v2, s3
// VI-GFX9_10-ERR: error: instruction not supported on this GPU
scratch_store_b64 v1, v[2:3], s3
// VI-GFX9_10-ERR: error: instruction not supported on this GPU
scratch_store_b96 v1, v[2:4], s3
// VI-GFX9_10-ERR: error: instruction not supported on this GPU
scratch_store_b128 v1, v[2:5], s3
// VI-GFX9_10-ERR: error: instruction not supported on this GPU
scratch_load_d16_u8 v1, v2, s1
// VI-GFX9_10-ERR: error: instruction not supported on this GPU
scratch_load_d16_hi_u8 v1, v2, s1
// VI-GFX9_10-ERR: error: instruction not supported on this GPU
scratch_load_d16_i8 v1, v2, s1
// VI-GFX9_10-ERR: error: instruction not supported on this GPU
scratch_load_d16_hi_i8 v1, v2, s1
// VI-GFX9_10-ERR: error: instruction not supported on this GPU
scratch_load_d16_b16 v1, v2, s1
// VI-GFX9_10-ERR: error: instruction not supported on this GPU
scratch_load_d16_hi_b16 v1, v2, s1
// VI-GFX9_10-ERR: error: instruction not supported on this GPU
scratch_store_d16_hi_b8 v1, v2, s3
// VI-GFX9_10-ERR: error: instruction not supported on this GPU
scratch_store_d16_hi_b16 v1, v2, s3
// VI-GFX9_10-ERR: error: instruction not supported on this GPU
scratch_load_b32 v1, v2, s1 offset:2047
// VI-GFX9_10-ERR: error: instruction not supported on this GPU
scratch_load_b32 v1, v2, off offset:2047
// VI-GFX9_10-ERR: error: instruction not supported on this GPU
scratch_load_b32 v1, off, s1 offset:2047
// VI-GFX9_10-ERR: error: instruction not supported on this GPU
scratch_load_b32 v1, off, off offset:2047
// VI-GFX9_10-ERR: error: instruction not supported on this GPU
scratch_load_b32 v1, off, off
// VI-GFX9_10-ERR: error: instruction not supported on this GPU
scratch_store_b32 v1, v2, s3 offset:2047
// VI-GFX9_10-ERR: error: instruction not supported on this GPU
scratch_store_b32 v1, v2, off offset:2047
// VI-GFX9_10-ERR: error: instruction not supported on this GPU
scratch_store_b32 off, v2, s3 offset:2047
// VI-GFX9_10-ERR: error: instruction not supported on this GPU
scratch_store_b32 off, v2, off offset:2047
// VI-GFX9_10-ERR: error: instruction not supported on this GPU
scratch_load_b32 v1, v2, s1 offset:4095
// VI-GFX9_10-ERR: error: instruction not supported on this GPU
scratch_load_b32 v1, v2, s1 offset:-4096
// VI-GFX9_10-ERR: error: instruction not supported on this GPU
scratch_store_b32 v1, v2, s1 offset:4095
// VI-GFX9_10-ERR: error: instruction not supported on this GPU
scratch_store_b32 v1, v2, s1 offset:-4096
// VI-GFX9_10-ERR: error: instruction not supported on this GPU
scratch_load_b32 v1, v2, s1 offset:4096
// GFX11-ERR: error: expected a 13-bit signed offset
// VI-GFX9_10-ERR: error: instruction not supported on this GPU
scratch_load_b32 v1, v2, s1 offset:-4097
// GFX11-ERR: error: expected a 13-bit signed offset
// VI-GFX9_10-ERR: error: instruction not supported on this GPU
scratch_store_b32 v1, v2, s1 offset:4096
// GFX11-ERR: error: expected a 13-bit signed offset
// VI-GFX9_10-ERR: error: instruction not supported on this GPU
scratch_store_b32 v1, v2, s1 offset:-4097
// GFX11-ERR: error: expected a 13-bit signed offset
// VI-GFX9_10-ERR: error: instruction not supported on this GPU
scratch_store_b32 off, v2, off
// VI-GFX9_10-ERR: error: instruction not supported on this GPU

3
llvm/test/MC/AMDGPU/gfx11_err.s
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@ -32,3 +32,6 @@ v_interp_p10_f32 v0, v1, v2, v3 wait_exp:8
v_interp_p2_f32 v0, -v1, v2, v3 wait_exp
// GFX11: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction
global_atomic_cmpswap_x2 v[1:4], v3, v[5:8], off offset:2047 glc
// GFX11: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction

1551
llvm/test/MC/AMDGPU/gfx11_flat.s Normal file
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File diff suppressed because it is too large Load Diff

536
llvm/test/MC/Disassembler/AMDGPU/flat-gfx11.txt Normal file
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@ -0,0 +1,536 @@
# RUN: llvm-mc -arch=amdgcn -mcpu=gfx1100 -disassemble -show-encoding < %s | FileCheck %s -check-prefix=GFX11
# FLAT
# GFX11: flat_load_u8 v1, v[3:4]
0x00,0x00,0x40,0xdc,0x03,0x00,0x7c,0x01
# GFX11: flat_load_i8 v1, v[3:4]
0x00,0x00,0x44,0xdc,0x03,0x00,0x7c,0x01
# GFX11: flat_load_u16 v1, v[3:4]
0x00,0x00,0x48,0xdc,0x03,0x00,0x7c,0x01
# GFX11: flat_load_i16 v1, v[3:4]
0x00,0x00,0x4c,0xdc,0x03,0x00,0x7c,0x01
# GFX11: flat_load_d16_b16 v1, v[3:4]
0x00,0x00,0x80,0xdc,0x03,0x00,0x7c,0x01
# GFX11: flat_load_b32 v1, v[3:4]
0x00,0x00,0x50,0xdc,0x03,0x00,0x7c,0x01
# GFX11: flat_load_b32 v1, v[3:4] offset:2047
0xff,0x07,0x50,0xdc,0x03,0x00,0x7c,0x01
# GFX11: flat_load_b32 v1, v[3:4] offset:4 glc
0x04,0x40,0x50,0xdc,0x03,0x00,0x7c,0x01
# GFX11: flat_load_b32 v1, v[3:4] offset:4 glc slc
0x04,0xc0,0x50,0xdc,0x03,0x00,0x7c,0x01
# GFX11: flat_load_b32 v1, v[3:4] offset:4 glc slc dlc
0x04,0xe0,0x50,0xdc,0x03,0x00,0x7c,0x01
# GFX11: flat_load_b64 v[1:2], v[3:4]
0x00,0x00,0x54,0xdc,0x03,0x00,0x7c,0x01
# GFX11: flat_load_b96 v[1:3], v[5:6]
0x00,0x00,0x58,0xdc,0x05,0x00,0x7c,0x01
# GFX11: flat_load_b128 v[1:4], v[5:6]
0x00,0x00,0x5c,0xdc,0x05,0x00,0x7c,0x01
# GFX11: flat_load_d16_i8 v1, v[3:4]
0x00,0x00,0x7c,0xdc,0x03,0x00,0x7c,0x01
# GFX11: flat_load_d16_hi_i8 v1, v[3:4]
0x00,0x00,0x88,0xdc,0x03,0x00,0x7c,0x01
# GFX11: flat_store_b8 v[3:4], v1
0x00,0x00,0x60,0xdc,0x03,0x01,0x7c,0x00
# GFX11: flat_store_b16 v[3:4], v1
0x00,0x00,0x64,0xdc,0x03,0x01,0x7c,0x00
# GFX11: flat_store_b32 v[3:4], v1 offset:16
0x10,0x00,0x68,0xdc,0x03,0x01,0x7c,0x00
# GFX11: flat_store_b64 v[1:2], v[3:4]
0x00,0x00,0x6c,0xdc,0x01,0x03,0x7c,0x00
# GFX11: flat_store_b96 v[1:2], v[3:5]
0x00,0x00,0x70,0xdc,0x01,0x03,0x7c,0x00
# GFX11: flat_store_b128 v[1:2], v[3:6]
0x00,0x00,0x74,0xdc,0x01,0x03,0x7c,0x00
# GFX11: flat_atomic_swap_b32 v0, v[1:2], v3 offset:2047 glc
0xff,0x47,0xcc,0xdc,0x01,0x03,0x7c,0x00
# GFX11: flat_atomic_swap_b32 v0, v[1:2], v3 offset:2047 glc slc
0xff,0xc7,0xcc,0xdc,0x01,0x03,0x7c,0x00
# GFX11: flat_atomic_swap_b32 v0, v[1:2], v3 glc
0x00,0x40,0xcc,0xdc,0x01,0x03,0x7c,0x00
# GFX11: flat_atomic_swap_b32 v0, v[1:2], v3 glc slc
0x00,0xc0,0xcc,0xdc,0x01,0x03,0x7c,0x00
# GFX11: flat_atomic_swap_b64 v[1:2], v[3:4], v[5:6] offset:2047 glc
0xff,0x47,0x04,0xdd,0x03,0x05,0x7c,0x01
# GFX11: flat_atomic_swap_b64 v[1:2], v[3:4], v[5:6] offset:2047 glc slc
0xff,0xc7,0x04,0xdd,0x03,0x05,0x7c,0x01
# GFX11: flat_atomic_swap_b64 v[1:2], v[3:4], v[5:6] glc
0x00,0x40,0x04,0xdd,0x03,0x05,0x7c,0x01
# GFX11: flat_atomic_swap_b64 v[1:2], v[3:4], v[5:6] glc slc
0x00,0xc0,0x04,0xdd,0x03,0x05,0x7c,0x01
# GFX11: flat_atomic_cmpswap_b32 v0, v[1:2], v[3:4] offset:2047 glc
0xff,0x47,0xd0,0xdc,0x01,0x03,0x7c,0x00
# GFX11: flat_atomic_cmpswap_b32 v0, v[1:2], v[3:4] offset:2047 glc slc
0xff,0xc7,0xd0,0xdc,0x01,0x03,0x7c,0x00
# GFX11: flat_atomic_cmpswap_b32 v0, v[1:2], v[3:4] glc
0x00,0x40,0xd0,0xdc,0x01,0x03,0x7c,0x00
# GFX11: flat_atomic_cmpswap_b32 v0, v[1:2], v[3:4] glc slc
0x00,0xc0,0xd0,0xdc,0x01,0x03,0x7c,0x00
# GFX11: flat_atomic_cmpswap_b64 v[1:2], v[3:4], v[5:8] offset:2047 glc
0xff,0x47,0x08,0xdd,0x03,0x05,0x7c,0x01
# GFX11: flat_atomic_cmpswap_b64 v[1:2], v[3:4], v[5:8] offset:2047 glc slc
0xff,0xc7,0x08,0xdd,0x03,0x05,0x7c,0x01
# GFX11: flat_atomic_cmpswap_b64 v[1:2], v[3:4], v[5:8] glc
0x00,0x40,0x08,0xdd,0x03,0x05,0x7c,0x01
# GFX11: flat_atomic_cmpswap_b64 v[1:2], v[3:4], v[5:8] glc slc
0x00,0xc0,0x08,0xdd,0x03,0x05,0x7c,0x01
# GFX11: flat_load_d16_u8 v1, v[3:4]
0x00,0x00,0x78,0xdc,0x03,0x00,0x7c,0x01
# GFX11: flat_load_d16_hi_u8 v1, v[3:4]
0x00,0x00,0x84,0xdc,0x03,0x00,0x7c,0x01
# GFX11: flat_load_d16_i8 v1, v[3:4]
0x00,0x00,0x7c,0xdc,0x03,0x00,0x7c,0x01
# GFX11: flat_load_d16_hi_i8 v1, v[3:4]
0x00,0x00,0x88,0xdc,0x03,0x00,0x7c,0x01
# GFX11: flat_load_d16_b16 v1, v[3:4]
0x00,0x00,0x80,0xdc,0x03,0x00,0x7c,0x01
# GFX11: flat_load_d16_hi_b16 v1, v[3:4]
0x00,0x00,0x8c,0xdc,0x03,0x00,0x7c,0x01
# GFX11: flat_store_d16_hi_b8 v[3:4], v1
0x00,0x00,0x90,0xdc,0x03,0x01,0x7c,0x00
# GFX11: flat_store_d16_hi_b16 v[3:4], v1
0x00,0x00,0x94,0xdc,0x03,0x01,0x7c,0x00
# GLOBAL No saddr
# GFX11: global_load_u8 v1, v[3:4], off
0x00,0x00,0x42,0xdc,0x03,0x00,0x7c,0x01
# GFX11: global_load_i8 v1, v[3:4], off
0x00,0x00,0x46,0xdc,0x03,0x00,0x7c,0x01
# GFX11: global_load_u16 v1, v[3:4], off
0x00,0x00,0x4a,0xdc,0x03,0x00,0x7c,0x01
# GFX11: global_load_i16 v1, v[3:4], off
0x00,0x00,0x4e,0xdc,0x03,0x00,0x7c,0x01
# GFX11: global_load_d16_b16 v1, v[3:4], off
0x00,0x00,0x82,0xdc,0x03,0x00,0x7c,0x01
# GFX11: global_load_b32 v1, v[3:4], off
0x00,0x00,0x52,0xdc,0x03,0x00,0x7c,0x01
# GFX11: global_load_b32 v1, v[3:4], off offset:2047
0xff,0x07,0x52,0xdc,0x03,0x00,0x7c,0x01
# GFX11: global_load_b32 v1, v[3:4], off offset:4 glc
0x04,0x40,0x52,0xdc,0x03,0x00,0x7c,0x01
# GFX11: global_load_b32 v1, v[3:4], off offset:4 glc slc
0x04,0xc0,0x52,0xdc,0x03,0x00,0x7c,0x01
# GFX11: global_load_b32 v1, v[3:4], off offset:4 glc slc dlc
0x04,0xe0,0x52,0xdc,0x03,0x00,0x7c,0x01
# GFX11: global_load_b64 v[1:2], v[3:4], off
0x00,0x00,0x56,0xdc,0x03,0x00,0x7c,0x01
# GFX11: global_load_b96 v[1:3], v[5:6], off
0x00,0x00,0x5a,0xdc,0x05,0x00,0x7c,0x01
# GFX11: global_load_b128 v[1:4], v[5:6], off
0x00,0x00,0x5e,0xdc,0x05,0x00,0x7c,0x01
# GFX11: global_load_d16_i8 v1, v[3:4], off
0x00,0x00,0x7e,0xdc,0x03,0x00,0x7c,0x01
# GFX11: global_load_d16_hi_i8 v1, v[3:4], off
0x00,0x00,0x8a,0xdc,0x03,0x00,0x7c,0x01
# GFX11: global_store_b8 v[3:4], v1, off
0x00,0x00,0x62,0xdc,0x03,0x01,0x7c,0x00
# GFX11: global_store_b16 v[3:4], v1, off
0x00,0x00,0x66,0xdc,0x03,0x01,0x7c,0x00
# GFX11: global_store_b32 v[3:4], v1, off offset:16
0x10,0x00,0x6a,0xdc,0x03,0x01,0x7c,0x00
# GFX11: global_store_b64 v[1:2], v[3:4], off
0x00,0x00,0x6e,0xdc,0x01,0x03,0x7c,0x00
# GFX11: global_store_b96 v[1:2], v[3:5], off
0x00,0x00,0x72,0xdc,0x01,0x03,0x7c,0x00
# GFX11: global_store_b128 v[1:2], v[3:6], off
0x00,0x00,0x76,0xdc,0x01,0x03,0x7c,0x00
# GFX11: global_atomic_swap_b32 v0, v[1:2], v3, off offset:2047 glc
0xff,0x47,0xce,0xdc,0x01,0x03,0x7c,0x00
# GFX11: global_atomic_swap_b32 v0, v[1:2], v3, off offset:2047 glc slc
0xff,0xc7,0xce,0xdc,0x01,0x03,0x7c,0x00
# GFX11: global_atomic_swap_b32 v0, v[1:2], v3, off glc
0x00,0x40,0xce,0xdc,0x01,0x03,0x7c,0x00
# GFX11: global_atomic_swap_b32 v0, v[1:2], v3, off glc slc
0x00,0xc0,0xce,0xdc,0x01,0x03,0x7c,0x00
# GFX11: global_atomic_swap_b64 v[1:2], v[3:4], v[5:6], off offset:2047 glc
0xff,0x47,0x06,0xdd,0x03,0x05,0x7c,0x01
# GFX11: global_atomic_swap_b64 v[1:2], v[3:4], v[5:6], off offset:2047 glc slc
0xff,0xc7,0x06,0xdd,0x03,0x05,0x7c,0x01
# GFX11: global_atomic_swap_b64 v[1:2], v[3:4], v[5:6], off glc
0x00,0x40,0x06,0xdd,0x03,0x05,0x7c,0x01
# GFX11: global_atomic_swap_b64 v[1:2], v[3:4], v[5:6], off glc slc
0x00,0xc0,0x06,0xdd,0x03,0x05,0x7c,0x01
# GFX11: global_atomic_cmpswap_b32 v0, v[1:2], v[3:4], off offset:2047 glc
0xff,0x47,0xd2,0xdc,0x01,0x03,0x7c,0x00
# GFX11: global_atomic_cmpswap_b32 v0, v[1:2], v[3:4], off offset:2047 glc slc
0xff,0xc7,0xd2,0xdc,0x01,0x03,0x7c,0x00
# GFX11: global_atomic_cmpswap_b32 v0, v[1:2], v[3:4], off glc
0x00,0x40,0xd2,0xdc,0x01,0x03,0x7c,0x00
# GFX11: global_atomic_cmpswap_b32 v0, v[1:2], v[3:4], off glc slc
0x00,0xc0,0xd2,0xdc,0x01,0x03,0x7c,0x00
# GFX11: global_atomic_cmpswap_b64 v[1:2], v[3:4], v[5:8], off offset:2047 glc
0xff,0x47,0x0a,0xdd,0x03,0x05,0x7c,0x01
# GFX11: global_atomic_cmpswap_b64 v[1:2], v[3:4], v[5:8], off offset:2047 glc slc
0xff,0xc7,0x0a,0xdd,0x03,0x05,0x7c,0x01
# GFX11: global_atomic_cmpswap_b64 v[1:2], v[3:4], v[5:8], off glc
0x00,0x40,0x0a,0xdd,0x03,0x05,0x7c,0x01
# GFX11: global_atomic_cmpswap_b64 v[1:2], v[3:4], v[5:8], off glc slc
0x00,0xc0,0x0a,0xdd,0x03,0x05,0x7c,0x01
# GFX11: global_load_d16_u8 v1, v[3:4], off
0x00,0x00,0x7a,0xdc,0x03,0x00,0x7c,0x01
# GFX11: global_load_d16_hi_u8 v1, v[3:4], off
0x00,0x00,0x86,0xdc,0x03,0x00,0x7c,0x01
# GFX11: global_load_d16_i8 v1, v[3:4], off
0x00,0x00,0x7e,0xdc,0x03,0x00,0x7c,0x01
# GFX11: global_load_d16_hi_i8 v1, v[3:4], off
0x00,0x00,0x8a,0xdc,0x03,0x00,0x7c,0x01
# GFX11: global_load_d16_b16 v1, v[3:4], off
0x00,0x00,0x82,0xdc,0x03,0x00,0x7c,0x01
# GFX11: global_load_d16_hi_b16 v1, v[3:4], off
0x00,0x00,0x8e,0xdc,0x03,0x00,0x7c,0x01
# GFX11: global_store_d16_hi_b8 v[3:4], v1, off
0x00,0x00,0x92,0xdc,0x03,0x01,0x7c,0x00
# GFX11: global_store_d16_hi_b16 v[3:4], v1, off
0x00,0x00,0x96,0xdc,0x03,0x01,0x7c,0x00
# GFX11: global_load_addtid_b32 v1, off
0x00,0x00,0xa2,0xdc,0x00,0x00,0x7c,0x01
# GFX11: global_atomic_add_f32 v[1:2], v2, off offset:-4096
0x00,0x10,0x5a,0xdd,0x01,0x02,0x7c,0x00
# GFX11: global_atomic_add_f32 v[1:2], v2, off offset:4095
0xff,0x0f,0x5a,0xdd,0x01,0x02,0x7c,0x00
# GLOBAL With saddr
# GFX11: global_load_u8 v1, v3, s[2:3]
0x00,0x00,0x42,0xdc,0x03,0x00,0x02,0x01
# GFX11: global_load_i8 v1, v3, s[2:3]
0x00,0x00,0x46,0xdc,0x03,0x00,0x02,0x01
# GFX11: global_load_u16 v1, v3, s[2:3]
0x00,0x00,0x4a,0xdc,0x03,0x00,0x02,0x01
# GFX11: global_load_i16 v1, v3, s[2:3]
0x00,0x00,0x4e,0xdc,0x03,0x00,0x02,0x01
# GFX11: global_load_d16_b16 v1, v3, s[2:3]
0x00,0x00,0x82,0xdc,0x03,0x00,0x02,0x01
# GFX11: global_load_b32 v1, v3, s[2:3]
0x00,0x00,0x52,0xdc,0x03,0x00,0x02,0x01
# GFX11: global_load_b32 v1, v3, s[2:3] offset:2047
0xff,0x07,0x52,0xdc,0x03,0x00,0x02,0x01
# GFX11: global_load_b32 v1, v3, s[2:3] offset:4 glc
0x04,0x40,0x52,0xdc,0x03,0x00,0x02,0x01
# GFX11: global_load_b32 v1, v3, s[2:3] offset:4 glc slc
0x04,0xc0,0x52,0xdc,0x03,0x00,0x02,0x01
# GFX11: global_load_b32 v1, v3, s[2:3] offset:4 glc slc dlc
0x04,0xe0,0x52,0xdc,0x03,0x00,0x02,0x01
# GFX11: global_load_b64 v[1:2], v3, s[2:3]
0x00,0x00,0x56,0xdc,0x03,0x00,0x02,0x01
# GFX11: global_load_b96 v[1:3], v5, s[2:3]
0x00,0x00,0x5a,0xdc,0x05,0x00,0x02,0x01
# GFX11: global_load_b128 v[1:4], v5, s[2:3]
0x00,0x00,0x5e,0xdc,0x05,0x00,0x02,0x01
# GFX11: global_load_d16_i8 v1, v3, s[2:3]
0x00,0x00,0x7e,0xdc,0x03,0x00,0x02,0x01
# GFX11: global_load_d16_hi_i8 v1, v3, s[2:3]
0x00,0x00,0x8a,0xdc,0x03,0x00,0x02,0x01
# GFX11: global_store_b8 v3, v1, s[2:3]
0x00,0x00,0x62,0xdc,0x03,0x01,0x02,0x00
# GFX11: global_store_b16 v3, v1, s[2:3]
0x00,0x00,0x66,0xdc,0x03,0x01,0x02,0x00
# GFX11: global_store_b32 v3, v1, s[2:3] offset:16
0x10,0x00,0x6a,0xdc,0x03,0x01,0x02,0x00
# GFX11: global_store_b64 v1, v[2:3], s[2:3]
0x00,0x00,0x6e,0xdc,0x01,0x02,0x02,0x00
# GFX11: global_store_b96 v1, v[3:5], s[2:3]
0x00,0x00,0x72,0xdc,0x01,0x03,0x02,0x00
# GFX11: global_store_b128 v1, v[3:6], s[2:3]
0x00,0x00,0x76,0xdc,0x01,0x03,0x02,0x00
# GFX11: global_atomic_swap_b32 v0, v1, v3, s[2:3] offset:2047 glc
0xff,0x47,0xce,0xdc,0x01,0x03,0x02,0x00
# GFX11: global_atomic_swap_b32 v0, v1, v3, s[2:3] offset:2047 glc slc
0xff,0xc7,0xce,0xdc,0x01,0x03,0x02,0x00
# GFX11: global_atomic_swap_b32 v0, v1, v3, s[2:3] glc
0x00,0x40,0xce,0xdc,0x01,0x03,0x02,0x00
# GFX11: global_atomic_swap_b32 v0, v1, v3, s[2:3] glc slc
0x00,0xc0,0xce,0xdc,0x01,0x03,0x02,0x00
# GFX11: global_atomic_swap_b64 v[1:2], v3, v[5:6], s[2:3] offset:2047 glc
0xff,0x47,0x06,0xdd,0x03,0x05,0x02,0x01
# GFX11: global_atomic_swap_b64 v[1:2], v3, v[5:6], s[2:3] offset:2047 glc slc
0xff,0xc7,0x06,0xdd,0x03,0x05,0x02,0x01
# GFX11: global_atomic_swap_b64 v[1:2], v3, v[5:6], s[2:3] glc
0x00,0x40,0x06,0xdd,0x03,0x05,0x02,0x01
# GFX11: global_atomic_swap_b64 v[1:2], v3, v[5:6], s[2:3] glc slc
0x00,0xc0,0x06,0xdd,0x03,0x05,0x02,0x01
# GFX11: global_atomic_cmpswap_b32 v0, v1, v[2:3], s[2:3] offset:2047 glc
0xff,0x47,0xd2,0xdc,0x01,0x02,0x02,0x00
# GFX11: global_atomic_cmpswap_b32 v0, v1, v[2:3], s[2:3] offset:2047 glc slc
0xff,0xc7,0xd2,0xdc,0x01,0x02,0x02,0x00
# GFX11: global_atomic_cmpswap_b32 v0, v1, v[2:3], s[2:3] glc
0x00,0x40,0xd2,0xdc,0x01,0x02,0x02,0x00
# GFX11: global_atomic_cmpswap_b32 v0, v1, v[2:3], s[2:3] glc slc
0x00,0xc0,0xd2,0xdc,0x01,0x02,0x02,0x00
# GFX11: global_atomic_cmpswap_b64 v[1:2], v3, v[5:8], s[2:3] offset:2047 glc
0xff,0x47,0x0a,0xdd,0x03,0x05,0x02,0x01
# GFX11: global_atomic_cmpswap_b64 v[1:2], v3, v[5:8], s[2:3] offset:2047 glc slc
0xff,0xc7,0x0a,0xdd,0x03,0x05,0x02,0x01
# GFX11: global_atomic_cmpswap_b64 v[1:2], v3, v[5:8], s[2:3] glc
0x00,0x40,0x0a,0xdd,0x03,0x05,0x02,0x01
# GFX11: global_atomic_cmpswap_b64 v[1:2], v3, v[5:8], s[2:3] glc slc
0x00,0xc0,0x0a,0xdd,0x03,0x05,0x02,0x01
# GFX11: global_load_d16_u8 v1, v3, s[2:3]
0x00,0x00,0x7a,0xdc,0x03,0x00,0x02,0x01
# GFX11: global_load_d16_hi_u8 v1, v3, s[2:3]
0x00,0x00,0x86,0xdc,0x03,0x00,0x02,0x01
# GFX11: global_load_d16_i8 v1, v3, s[2:3]
0x00,0x00,0x7e,0xdc,0x03,0x00,0x02,0x01
# GFX11: global_load_d16_hi_i8 v1, v3, s[2:3]
0x00,0x00,0x8a,0xdc,0x03,0x00,0x02,0x01
# GFX11: global_load_d16_b16 v1, v3, s[2:3]
0x00,0x00,0x82,0xdc,0x03,0x00,0x02,0x01
# GFX11: global_load_d16_hi_b16 v1, v3, s[2:3]
0x00,0x00,0x8e,0xdc,0x03,0x00,0x02,0x01
# GFX11: global_store_d16_hi_b8 v3, v1, s[2:3]
0x00,0x00,0x92,0xdc,0x03,0x01,0x02,0x00
# GFX11: global_store_d16_hi_b16 v3, v1, s[2:3]
0x00,0x00,0x96,0xdc,0x03,0x01,0x02,0x00
# GFX11: global_load_addtid_b32 v1, s[2:3]
0x00,0x00,0xa2,0xdc,0x00,0x00,0x02,0x01
# SCRATCH
# GFX11: scratch_load_u8 v1, v2, s1
0x00,0x00,0x41,0xdc,0x02,0x00,0x81,0x01
# GFX11: scratch_load_i8 v1, v2, s1
0x00,0x00,0x45,0xdc,0x02,0x00,0x81,0x01
# GFX11: scratch_load_u16 v1, v2, s1
0x00,0x00,0x49,0xdc,0x02,0x00,0x81,0x01
# GFX11: scratch_load_i16 v1, v2, s1
0x00,0x00,0x4d,0xdc,0x02,0x00,0x81,0x01
# GFX11: scratch_load_b32 v1, v2, s1
0x00,0x00,0x51,0xdc,0x02,0x00,0x81,0x01
# GFX11: scratch_load_b64 v[1:2], v2, s1
0x00,0x00,0x55,0xdc,0x02,0x00,0x81,0x01
# GFX11: scratch_load_b96 v[1:3], v2, s1
0x00,0x00,0x59,0xdc,0x02,0x00,0x81,0x01
# GFX11: scratch_load_b128 v[1:4], v2, s1
0x00,0x00,0x5d,0xdc,0x02,0x00,0x81,0x01
# GFX11: scratch_store_b8 v1, v2, s3
0x00,0x00,0x61,0xdc,0x01,0x02,0x83,0x00
# GFX11: scratch_store_b16 v1, v2, s3
0x00,0x00,0x65,0xdc,0x01,0x02,0x83,0x00
# GFX11: scratch_store_b32 v1, v2, s3
0x00,0x00,0x69,0xdc,0x01,0x02,0x83,0x00
# GFX11: scratch_store_b64 v1, v[2:3], s3
0x00,0x00,0x6d,0xdc,0x01,0x02,0x83,0x00
# GFX11: scratch_store_b96 v1, v[2:4], s3
0x00,0x00,0x71,0xdc,0x01,0x02,0x83,0x00
# GFX11: scratch_store_b128 v1, v[2:5], s3
0x00,0x00,0x75,0xdc,0x01,0x02,0x83,0x00
# GFX11: scratch_load_d16_u8 v1, v2, s1
0x00,0x00,0x79,0xdc,0x02,0x00,0x81,0x01
# GFX11: scratch_load_d16_hi_u8 v1, v2, s1
0x00,0x00,0x85,0xdc,0x02,0x00,0x81,0x01
# GFX11: scratch_load_d16_i8 v1, v2, s1
0x00,0x00,0x7d,0xdc,0x02,0x00,0x81,0x01
# GFX11: scratch_load_d16_hi_i8 v1, v2, s1
0x00,0x00,0x89,0xdc,0x02,0x00,0x81,0x01
# GFX11: scratch_load_d16_b16 v1, v2, s1
0x00,0x00,0x81,0xdc,0x02,0x00,0x81,0x01
# GFX11: scratch_load_d16_hi_b16 v1, v2, s1
0x00,0x00,0x8d,0xdc,0x02,0x00,0x81,0x01
# GFX11: scratch_store_d16_hi_b8 v1, v2, s3
0x00,0x00,0x91,0xdc,0x01,0x02,0x83,0x00
# GFX11: scratch_store_d16_hi_b16 v1, v2, s3
0x00,0x00,0x95,0xdc,0x01,0x02,0x83,0x00
# GFX11: scratch_load_b32 v1, v2, s1 offset:2047
0xff,0x07,0x51,0xdc,0x02,0x00,0x81,0x01
# GFX11: scratch_load_b32 v1, v2, off offset:2047
0xff,0x07,0x51,0xdc,0x02,0x00,0xfc,0x01
# GFX11: scratch_load_b32 v1, off, s1 offset:2047
0xff,0x07,0x51,0xdc,0x00,0x00,0x01,0x01
# GFX11: scratch_load_b32 v1, off, off offset:2047
0xff,0x07,0x51,0xdc,0x00,0x00,0x7c,0x01
# GFX11: scratch_load_b32 v1, off, off
0x00,0x00,0x51,0xdc,0x00,0x00,0x7c,0x01
# GFX11: scratch_store_b32 v1, v2, s3 offset:2047
0xff,0x07,0x69,0xdc,0x01,0x02,0x83,0x00
# GFX11: scratch_store_b32 v1, v2, off offset:2047
0xff,0x07,0x69,0xdc,0x01,0x02,0xfc,0x00
# GFX11: scratch_store_b32 off, v2, s3 offset:2047
0xff,0x07,0x69,0xdc,0x00,0x02,0x03,0x00
# GFX11: scratch_store_b32 off, v2, off offset:2047
0xff,0x07,0x69,0xdc,0x00,0x02,0x7c,0x00
# GFX11: scratch_store_b32 off, v2, off
0x00,0x00,0x69,0xdc,0x00,0x02,0x7c,0x00
# GFX11: scratch_load_b32 v5, off, off offset:-4096
0x00,0x10,0x51,0xdc,0x00,0x00,0x7c,0x05
# GFX11: scratch_load_b32 v5, off, off offset:4095
0xff,0x0f,0x51,0xdc,0x00,0x00,0x7c,0x05

1
llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_all.txt
View File

@ -1,7 +1,6 @@
# RUN: llvm-mc -arch=amdgcn -mcpu=gfx1100 -disassemble -show-encoding < %s | FileCheck -check-prefixes=GFX11 %s
# RUN: llvm-mc -arch=amdgcn -mcpu=gfx1100 -mattr=-WavefrontSize32,+WavefrontSize64 -disassemble -show-encoding < %s | FileCheck -check-prefixes=GFX11 %s
# GFX11: s_absdiff_i32 exec_hi, s1, s2 ; encoding: [0x01,0x02,0x7f,0x83]
0x01,0x02,0x7f,0x83