forked from OSchip/llvm-project
Since TargetLowering is already subtarget dependent just pass
in the subtarget and stash it in the class so that lookups are easier and safer. llvm-svn: 227819
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1c50429923
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@ -68,9 +68,9 @@ getTargetNodeName(unsigned Opcode) const
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}
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}
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XCoreTargetLowering::XCoreTargetLowering(const TargetMachine &TM)
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: TargetLowering(TM), TM(TM),
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Subtarget(TM.getSubtarget<XCoreSubtarget>()) {
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XCoreTargetLowering::XCoreTargetLowering(const TargetMachine &TM,
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const XCoreSubtarget &Subtarget)
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: TargetLowering(TM), TM(TM), Subtarget(Subtarget) {
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// Set up the register classes.
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addRegisterClass(MVT::i32, &XCore::GRRegsRegClass);
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@ -807,8 +807,7 @@ SDValue XCoreTargetLowering::LowerFRAMEADDR(SDValue Op,
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return SDValue();
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MachineFunction &MF = DAG.getMachineFunction();
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const TargetRegisterInfo *RegInfo =
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getTargetMachine().getSubtargetImpl()->getRegisterInfo();
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const TargetRegisterInfo *RegInfo = Subtarget.getRegisterInfo();
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return DAG.getCopyFromReg(DAG.getEntryNode(), SDLoc(Op),
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RegInfo->getFrameRegister(MF), MVT::i32);
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}
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@ -854,8 +853,7 @@ LowerEH_RETURN(SDValue Op, SelectionDAG &DAG) const {
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SDLoc dl(Op);
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// Absolute SP = (FP + FrameToArgs) + Offset
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const TargetRegisterInfo *RegInfo =
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getTargetMachine().getSubtargetImpl()->getRegisterInfo();
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const TargetRegisterInfo *RegInfo = Subtarget.getRegisterInfo();
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SDValue Stack = DAG.getCopyFromReg(DAG.getEntryNode(), dl,
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RegInfo->getFrameRegister(MF), MVT::i32);
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SDValue FrameToArgs = DAG.getNode(XCoreISD::FRAME_TO_ARGS_OFFSET, dl,
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@ -1550,8 +1548,7 @@ XCoreTargetLowering::LowerReturn(SDValue Chain,
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MachineBasicBlock *
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XCoreTargetLowering::EmitInstrWithCustomInserter(MachineInstr *MI,
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MachineBasicBlock *BB) const {
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const TargetInstrInfo &TII =
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*getTargetMachine().getSubtargetImpl()->getInstrInfo();
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const TargetInstrInfo &TII = *Subtarget.getInstrInfo();
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DebugLoc dl = MI->getDebugLoc();
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assert((MI->getOpcode() == XCore::SELECT_CC) &&
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"Unexpected instr type to insert");
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@ -93,8 +93,8 @@ namespace llvm {
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class XCoreTargetLowering : public TargetLowering
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{
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public:
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explicit XCoreTargetLowering(const TargetMachine &TM);
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explicit XCoreTargetLowering(const TargetMachine &TM,
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const XCoreSubtarget &Subtarget);
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using TargetLowering::isZExtFree;
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bool isZExtFree(SDValue Val, EVT VT2) const override;
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@ -28,4 +28,4 @@ void XCoreSubtarget::anchor() { }
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XCoreSubtarget::XCoreSubtarget(const std::string &TT, const std::string &CPU,
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const std::string &FS, const TargetMachine &TM)
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: XCoreGenSubtargetInfo(TT, CPU, FS), InstrInfo(), FrameLowering(*this),
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TLInfo(TM), TSInfo(*TM.getDataLayout()) {}
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TLInfo(TM, *this), TSInfo(*TM.getDataLayout()) {}
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