forked from OSchip/llvm-project
[X86] Remove '128' from the internal name of some scalar FP instructions to be consistent with other scalar instructions.
llvm-svn: 334727
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@ -5466,12 +5466,12 @@ multiclass avx512_fp_scalef_all<bits<8> opc, bits<8> opcScaler, string OpcodeStr
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defm PDZ : avx512_fp_scalef_p<opc, OpcodeStr, OpNode, sched.ZMM, v8f64_info>,
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avx512_fp_round_packed<opc, OpcodeStr, OpNode, sched.ZMM, v8f64_info>,
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EVEX_V512, VEX_W, EVEX_CD8<64, CD8VF>;
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defm SSZ128 : avx512_fp_scalef_scalar<opcScaler, OpcodeStr, OpNodeScal, sched.Scl, f32x_info>,
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avx512_fp_scalar_round<opcScaler, OpcodeStr##"ss", f32x_info, OpNodeScal, sched.Scl>,
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EVEX_4V,EVEX_CD8<32, CD8VT1>;
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defm SDZ128 : avx512_fp_scalef_scalar<opcScaler, OpcodeStr, OpNodeScal, sched.Scl, f64x_info>,
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avx512_fp_scalar_round<opcScaler, OpcodeStr##"sd", f64x_info, OpNodeScal, sched.Scl>,
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EVEX_4V, EVEX_CD8<64, CD8VT1>, VEX_W;
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defm SSZ : avx512_fp_scalef_scalar<opcScaler, OpcodeStr, OpNodeScal, sched.Scl, f32x_info>,
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avx512_fp_scalar_round<opcScaler, OpcodeStr##"ss", f32x_info, OpNodeScal, sched.Scl>,
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EVEX_4V,EVEX_CD8<32, CD8VT1>;
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defm SDZ : avx512_fp_scalef_scalar<opcScaler, OpcodeStr, OpNodeScal, sched.Scl, f64x_info>,
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avx512_fp_scalar_round<opcScaler, OpcodeStr##"sd", f64x_info, OpNodeScal, sched.Scl>,
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EVEX_4V, EVEX_CD8<64, CD8VT1>, VEX_W;
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// Define only if AVX512VL feature is present.
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let Predicates = [HasVLX] in {
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@ -9815,8 +9815,8 @@ multiclass avx512_common_fp_sae_scalar_imm<string OpcodeStr,
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X86VectorVTInfo _, bits<8> opc, SDNode OpNode,
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SDNode OpNodeRnd, X86SchedWriteWidths sched, Predicate prd> {
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let Predicates = [prd] in {
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defm Z128 : avx512_fp_scalar_imm<opc, OpcodeStr, OpNode, sched.XMM, _>,
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avx512_fp_sae_scalar_imm<opc, OpcodeStr, OpNodeRnd, sched.XMM, _>;
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defm Z : avx512_fp_scalar_imm<opc, OpcodeStr, OpNode, sched.XMM, _>,
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avx512_fp_sae_scalar_imm<opc, OpcodeStr, OpNodeRnd, sched.XMM, _>;
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}
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}
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