forked from OSchip/llvm-project
[DAGCombiner] Fold xor/and/or (bitcast(A), bitcast(B)) -> bitcast(op (A,B)) anytime before LegalizeVectorOprs
xor/and/or (bitcast(A), bitcast(B)) -> bitcast(op (A,B)) was only being combined at the AfterLegalizeTypes stage, this patch permits the combine to occur anytime before then as well. The main aim with this to improve the ability to recognise bitmasks that can be converted to shuffles. I had to modify a number of AVX512 mask tests as the basic bitcast to/from scalar pattern was being stripped out, preventing testing of the mmask bitops. By replacing the bitcasts with loads we can get almost the same result. Differential Revision: http://reviews.llvm.org/D18944 llvm-svn: 265998
This commit is contained in:
Simon Pilgrim
parent
5751814eda
commit
82e54871d0
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@ -2765,7 +2765,7 @@ SDValue DAGCombiner::SimplifyBinOpWithSameOpcodeHands(SDNode *N) {
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}
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// Simplify xor/and/or (bitcast(A), bitcast(B)) -> bitcast(op (A,B))
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// Only perform this optimization after type legalization and before
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// Only perform this optimization up until type legalization, before
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// LegalizeVectorOprs. LegalizeVectorOprs promotes vector operations by
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// adding bitcasts. For example (xor v4i32) is promoted to (v2i64), and
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// we don't want to undo this promotion.
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@ -2773,7 +2773,7 @@ SDValue DAGCombiner::SimplifyBinOpWithSameOpcodeHands(SDNode *N) {
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// on scalars.
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if ((N0.getOpcode() == ISD::BITCAST ||
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N0.getOpcode() == ISD::SCALAR_TO_VECTOR) &&
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Level == AfterLegalizeTypes) {
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Level <= AfterLegalizeTypes) {
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SDValue In0 = N0.getOperand(0);
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SDValue In1 = N1.getOperand(0);
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EVT In0Ty = In0.getValueType();
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@ -77,15 +77,33 @@ define void @mask8_mem(i8* %ptr) {
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define i16 @mand16(i16 %x, i16 %y) {
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; CHECK-LABEL: mand16:
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; CHECK: ## BB#0:
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; CHECK-NEXT: kmovw %edi, %k0
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; CHECK-NEXT: kmovw %esi, %k1
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; CHECK-NEXT: movl %edi, %eax
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; CHECK-NEXT: xorl %esi, %eax
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; CHECK-NEXT: andl %esi, %edi
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; CHECK-NEXT: orl %eax, %edi
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; CHECK-NEXT: movw %di, %ax
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; CHECK-NEXT: retq
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%ma = bitcast i16 %x to <16 x i1>
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%mb = bitcast i16 %y to <16 x i1>
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%mc = and <16 x i1> %ma, %mb
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%md = xor <16 x i1> %ma, %mb
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%me = or <16 x i1> %mc, %md
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%ret = bitcast <16 x i1> %me to i16
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ret i16 %ret
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}
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define i16 @mand16_mem(<16 x i1>* %x, <16 x i1>* %y) {
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; CHECK-LABEL: mand16_mem:
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; CHECK: ## BB#0:
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; CHECK-NEXT: kmovw (%rdi), %k0
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; CHECK-NEXT: kmovw (%rsi), %k1
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; CHECK-NEXT: kandw %k1, %k0, %k2
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; CHECK-NEXT: kxorw %k1, %k0, %k0
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; CHECK-NEXT: korw %k0, %k2, %k0
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; CHECK-NEXT: kmovw %k0, %eax
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; CHECK-NEXT: retq
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%ma = bitcast i16 %x to <16 x i1>
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%mb = bitcast i16 %y to <16 x i1>
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%ma = load <16 x i1>, <16 x i1>* %x
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%mb = load <16 x i1>, <16 x i1>* %y
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%mc = and <16 x i1> %ma, %mb
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%md = xor <16 x i1> %ma, %mb
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%me = or <16 x i1> %mc, %md
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@ -265,13 +283,13 @@ define <16 x i8> @test8(<16 x i32>%a, <16 x i32>%b, i32 %a1, i32 %b1) {
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; KNL: ## BB#0:
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; KNL-NEXT: vpxord %zmm2, %zmm2, %zmm2
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; KNL-NEXT: cmpl %esi, %edi
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; KNL-NEXT: jg LBB14_1
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; KNL-NEXT: jg LBB15_1
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; KNL-NEXT: ## BB#2:
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; KNL-NEXT: vpcmpltud %zmm2, %zmm1, %k1
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; KNL-NEXT: jmp LBB14_3
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; KNL-NEXT: LBB14_1:
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; KNL-NEXT: jmp LBB15_3
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; KNL-NEXT: LBB15_1:
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; KNL-NEXT: vpcmpgtd %zmm2, %zmm0, %k1
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; KNL-NEXT: LBB14_3:
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; KNL-NEXT: LBB15_3:
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; KNL-NEXT: vpbroadcastd {{.*}}(%rip), %zmm0 {%k1} {z}
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; KNL-NEXT: vpmovdb %zmm0, %xmm0
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; KNL-NEXT: retq
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@ -280,12 +298,12 @@ define <16 x i8> @test8(<16 x i32>%a, <16 x i32>%b, i32 %a1, i32 %b1) {
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; SKX: ## BB#0:
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; SKX-NEXT: vpxord %zmm2, %zmm2, %zmm2
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; SKX-NEXT: cmpl %esi, %edi
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; SKX-NEXT: jg LBB14_1
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; SKX-NEXT: jg LBB15_1
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; SKX-NEXT: ## BB#2:
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; SKX-NEXT: vpcmpltud %zmm2, %zmm1, %k0
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; SKX-NEXT: vpmovm2b %k0, %xmm0
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; SKX-NEXT: retq
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; SKX-NEXT: LBB14_1:
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; SKX-NEXT: LBB15_1:
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; SKX-NEXT: vpcmpgtd %zmm2, %zmm0, %k0
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; SKX-NEXT: vpmovm2b %k0, %xmm0
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; SKX-NEXT: retq
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@ -300,13 +318,13 @@ define <16 x i1> @test9(<16 x i1>%a, <16 x i1>%b, i32 %a1, i32 %b1) {
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; KNL-LABEL: test9:
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; KNL: ## BB#0:
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; KNL-NEXT: cmpl %esi, %edi
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; KNL-NEXT: jg LBB15_1
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; KNL-NEXT: jg LBB16_1
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; KNL-NEXT: ## BB#2:
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; KNL-NEXT: vpmovsxbd %xmm1, %zmm0
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; KNL-NEXT: jmp LBB15_3
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; KNL-NEXT: LBB15_1:
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; KNL-NEXT: jmp LBB16_3
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; KNL-NEXT: LBB16_1:
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; KNL-NEXT: vpmovsxbd %xmm0, %zmm0
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; KNL-NEXT: LBB15_3:
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; KNL-NEXT: LBB16_3:
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; KNL-NEXT: vpslld $31, %zmm0, %zmm0
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; KNL-NEXT: vptestmd %zmm0, %zmm0, %k1
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; KNL-NEXT: vpbroadcastd {{.*}}(%rip), %zmm0 {%k1} {z}
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@ -316,13 +334,13 @@ define <16 x i1> @test9(<16 x i1>%a, <16 x i1>%b, i32 %a1, i32 %b1) {
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; SKX-LABEL: test9:
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; SKX: ## BB#0:
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; SKX-NEXT: cmpl %esi, %edi
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; SKX-NEXT: jg LBB15_1
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; SKX-NEXT: jg LBB16_1
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; SKX-NEXT: ## BB#2:
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; SKX-NEXT: vpsllw $7, %xmm1, %xmm0
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; SKX-NEXT: jmp LBB15_3
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; SKX-NEXT: LBB15_1:
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; SKX-NEXT: jmp LBB16_3
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; SKX-NEXT: LBB16_1:
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; SKX-NEXT: vpsllw $7, %xmm0, %xmm0
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; SKX-NEXT: LBB15_3:
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; SKX-NEXT: LBB16_3:
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; SKX-NEXT: vpmovb2m %xmm0, %k0
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; SKX-NEXT: vpmovm2b %k0, %xmm0
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; SKX-NEXT: retq
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@ -339,22 +357,22 @@ define <4 x i1> @test11(<4 x i1>%a, <4 x i1>%b, i32 %a1, i32 %b1) {
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; KNL-LABEL: test11:
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; KNL: ## BB#0:
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; KNL-NEXT: cmpl %esi, %edi
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; KNL-NEXT: jg LBB17_2
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; KNL-NEXT: jg LBB18_2
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; KNL-NEXT: ## BB#1:
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; KNL-NEXT: vmovaps %zmm1, %zmm0
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; KNL-NEXT: LBB17_2:
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; KNL-NEXT: LBB18_2:
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; KNL-NEXT: retq
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;
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; SKX-LABEL: test11:
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; SKX: ## BB#0:
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; SKX-NEXT: cmpl %esi, %edi
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; SKX-NEXT: jg LBB17_1
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; SKX-NEXT: jg LBB18_1
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; SKX-NEXT: ## BB#2:
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; SKX-NEXT: vpslld $31, %xmm1, %xmm0
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; SKX-NEXT: jmp LBB17_3
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; SKX-NEXT: LBB17_1:
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; SKX-NEXT: jmp LBB18_3
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; SKX-NEXT: LBB18_1:
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; SKX-NEXT: vpslld $31, %xmm0, %xmm0
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; SKX-NEXT: LBB17_3:
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; SKX-NEXT: LBB18_3:
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; SKX-NEXT: vptestmd %xmm0, %xmm0, %k0
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; SKX-NEXT: vpmovm2d %k0, %xmm0
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; SKX-NEXT: retq
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@ -794,11 +812,11 @@ define void @ktest_1(<8 x double> %in, double * %base) {
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; KNL-NEXT: vcmpltpd %zmm1, %zmm0, %k0 {%k1}
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; KNL-NEXT: kmovw %k0, %eax
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; KNL-NEXT: testb %al, %al
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; KNL-NEXT: je LBB38_2
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; KNL-NEXT: je LBB39_2
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; KNL-NEXT: ## BB#1: ## %L1
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; KNL-NEXT: vmovapd %zmm0, (%rdi)
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; KNL-NEXT: retq
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; KNL-NEXT: LBB38_2: ## %L2
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; KNL-NEXT: LBB39_2: ## %L2
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; KNL-NEXT: vmovapd %zmm0, 8(%rdi)
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; KNL-NEXT: retq
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;
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@ -809,11 +827,11 @@ define void @ktest_1(<8 x double> %in, double * %base) {
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; SKX-NEXT: vmovupd 8(%rdi), %zmm1 {%k1} {z}
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; SKX-NEXT: vcmpltpd %zmm1, %zmm0, %k0 {%k1}
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; SKX-NEXT: ktestb %k0, %k0
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; SKX-NEXT: je LBB38_2
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; SKX-NEXT: je LBB39_2
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; SKX-NEXT: ## BB#1: ## %L1
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; SKX-NEXT: vmovapd %zmm0, (%rdi)
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; SKX-NEXT: retq
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; SKX-NEXT: LBB38_2: ## %L2
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; SKX-NEXT: LBB39_2: ## %L2
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; SKX-NEXT: vmovapd %zmm0, 8(%rdi)
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; SKX-NEXT: retq
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%addr1 = getelementptr double, double * %base, i64 0
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@ -859,12 +877,12 @@ define void @ktest_2(<32 x float> %in, float * %base) {
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; SKX-NEXT: kunpckwd %k1, %k2, %k1
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; SKX-NEXT: kord %k1, %k0, %k0
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; SKX-NEXT: ktestd %k0, %k0
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; SKX-NEXT: je LBB39_2
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; SKX-NEXT: je LBB40_2
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; SKX-NEXT: ## BB#1: ## %L1
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; SKX-NEXT: vmovaps %zmm0, (%rdi)
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; SKX-NEXT: vmovaps %zmm1, 64(%rdi)
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; SKX-NEXT: retq
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; SKX-NEXT: LBB39_2: ## %L2
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; SKX-NEXT: LBB40_2: ## %L2
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; SKX-NEXT: vmovaps %zmm0, 4(%rdi)
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; SKX-NEXT: vmovaps %zmm1, 68(%rdi)
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; SKX-NEXT: retq
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@ -71,10 +71,8 @@ define <16 x double> @select04(<16 x double> %a, <16 x double> %b) {
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define i8 @select05(i8 %a.0, i8 %m) {
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; CHECK-LABEL: select05:
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; CHECK: ## BB#0:
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; CHECK-NEXT: kmovw %esi, %k0
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; CHECK-NEXT: kmovw %edi, %k1
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; CHECK-NEXT: korw %k1, %k0, %k0
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; CHECK-NEXT: kmovw %k0, %eax
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; CHECK-NEXT: orl %esi, %edi
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; CHECK-NEXT: movb %dil, %al
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; CHECK-NEXT: retq
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%mask = bitcast i8 %m to <8 x i1>
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%a = bitcast i8 %a.0 to <8 x i1>
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@ -83,13 +81,28 @@ define i8 @select05(i8 %a.0, i8 %m) {
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ret i8 %res;
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}
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define i8 @select05_mem(<8 x i1>* %a.0, <8 x i1>* %m) {
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; CHECK-LABEL: select05_mem:
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; CHECK: ## BB#0:
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; CHECK-NEXT: movzbw (%rsi), %ax
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; CHECK-NEXT: kmovw %eax, %k0
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; CHECK-NEXT: movzbw (%rdi), %ax
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; CHECK-NEXT: kmovw %eax, %k1
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; CHECK-NEXT: korw %k1, %k0, %k0
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; CHECK-NEXT: kmovw %k0, %eax
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; CHECK-NEXT: retq
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%mask = load <8 x i1> , <8 x i1>* %m
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%a = load <8 x i1> , <8 x i1>* %a.0
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%r = select <8 x i1> %mask, <8 x i1> <i1 -1, i1 -1, i1 -1, i1 -1, i1 -1, i1 -1, i1 -1, i1 -1>, <8 x i1> %a
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%res = bitcast <8 x i1> %r to i8
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ret i8 %res;
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}
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define i8 @select06(i8 %a.0, i8 %m) {
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; CHECK-LABEL: select06:
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; CHECK: ## BB#0:
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; CHECK-NEXT: kmovw %esi, %k0
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; CHECK-NEXT: kmovw %edi, %k1
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; CHECK-NEXT: kandw %k1, %k0, %k0
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; CHECK-NEXT: kmovw %k0, %eax
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; CHECK-NEXT: andl %esi, %edi
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; CHECK-NEXT: movb %dil, %al
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; CHECK-NEXT: retq
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%mask = bitcast i8 %m to <8 x i1>
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%a = bitcast i8 %a.0 to <8 x i1>
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@ -98,6 +111,22 @@ define i8 @select06(i8 %a.0, i8 %m) {
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ret i8 %res;
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}
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define i8 @select06_mem(<8 x i1>* %a.0, <8 x i1>* %m) {
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; CHECK-LABEL: select06_mem:
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; CHECK: ## BB#0:
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; CHECK-NEXT: movzbw (%rsi), %ax
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; CHECK-NEXT: kmovw %eax, %k0
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; CHECK-NEXT: movzbw (%rdi), %ax
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; CHECK-NEXT: kmovw %eax, %k1
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; CHECK-NEXT: kandw %k1, %k0, %k0
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; CHECK-NEXT: kmovw %k0, %eax
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; CHECK-NEXT: retq
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%mask = load <8 x i1> , <8 x i1>* %m
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%a = load <8 x i1> , <8 x i1>* %a.0
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%r = select <8 x i1> %mask, <8 x i1> %a, <8 x i1> zeroinitializer
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%res = bitcast <8 x i1> %r to i8
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ret i8 %res;
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}
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define i8 @select07(i8 %a.0, i8 %b.0, i8 %m) {
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; CHECK-LABEL: select07:
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; CHECK: ## BB#0:
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@ -80,12 +80,11 @@ define void @mask64_mem(i64* %ptr) {
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define i32 @mand32(i32 %x, i32 %y) {
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; CHECK-LABEL: mand32:
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; CHECK: ## BB#0:
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; CHECK-NEXT: kmovd %edi, %k0
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; CHECK-NEXT: kmovd %esi, %k1
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; CHECK-NEXT: kandd %k1, %k0, %k2
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; CHECK-NEXT: kxord %k1, %k0, %k0
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; CHECK-NEXT: kord %k0, %k2, %k0
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; CHECK-NEXT: kmovd %k0, %eax
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; CHECK-NEXT: movl %edi, %eax
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; CHECK-NEXT: andl %esi, %eax
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; CHECK-NEXT: xorl %esi, %edi
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; CHECK-NEXT: orl %eax, %edi
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; CHECK-NEXT: movl %edi, %eax
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; CHECK-NEXT: retq
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%ma = bitcast i32 %x to <32 x i1>
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%mb = bitcast i32 %y to <32 x i1>
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@ -96,15 +95,33 @@ define i32 @mand32(i32 %x, i32 %y) {
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ret i32 %ret
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}
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define i32 @mand32_mem(<32 x i1>* %x, <32 x i1>* %y) {
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; CHECK-LABEL: mand32_mem:
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; CHECK: ## BB#0:
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; CHECK-NEXT: kmovd (%rdi), %k0
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; CHECK-NEXT: kmovd (%rsi), %k1
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; CHECK-NEXT: kandd %k1, %k0, %k2
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; CHECK-NEXT: kxord %k1, %k0, %k0
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; CHECK-NEXT: kord %k0, %k2, %k0
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; CHECK-NEXT: kmovd %k0, %eax
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; CHECK-NEXT: retq
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%ma = load <32 x i1>, <32 x i1>* %x
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%mb = load <32 x i1>, <32 x i1>* %y
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%mc = and <32 x i1> %ma, %mb
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%md = xor <32 x i1> %ma, %mb
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%me = or <32 x i1> %mc, %md
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%ret = bitcast <32 x i1> %me to i32
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ret i32 %ret
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}
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define i64 @mand64(i64 %x, i64 %y) {
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; CHECK-LABEL: mand64:
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; CHECK: ## BB#0:
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; CHECK-NEXT: kmovq %rdi, %k0
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; CHECK-NEXT: kmovq %rsi, %k1
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; CHECK-NEXT: kandq %k1, %k0, %k2
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; CHECK-NEXT: kxorq %k1, %k0, %k0
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; CHECK-NEXT: korq %k0, %k2, %k0
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; CHECK-NEXT: kmovq %k0, %rax
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; CHECK-NEXT: movq %rdi, %rax
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; CHECK-NEXT: andq %rsi, %rax
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; CHECK-NEXT: xorq %rsi, %rdi
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; CHECK-NEXT: orq %rax, %rdi
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; CHECK-NEXT: movq %rdi, %rax
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; CHECK-NEXT: retq
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%ma = bitcast i64 %x to <64 x i1>
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%mb = bitcast i64 %y to <64 x i1>
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@ -114,3 +131,22 @@ define i64 @mand64(i64 %x, i64 %y) {
|
|||
%ret = bitcast <64 x i1> %me to i64
|
||||
ret i64 %ret
|
||||
}
|
||||
|
||||
define i64 @mand64_mem(<64 x i1>* %x, <64 x i1>* %y) {
|
||||
; CHECK-LABEL: mand64_mem:
|
||||
; CHECK: ## BB#0:
|
||||
; CHECK-NEXT: kmovq (%rdi), %k0
|
||||
; CHECK-NEXT: kmovq (%rsi), %k1
|
||||
; CHECK-NEXT: kandq %k1, %k0, %k2
|
||||
; CHECK-NEXT: kxorq %k1, %k0, %k0
|
||||
; CHECK-NEXT: korq %k0, %k2, %k0
|
||||
; CHECK-NEXT: kmovq %k0, %rax
|
||||
; CHECK-NEXT: retq
|
||||
%ma = load <64 x i1>, <64 x i1>* %x
|
||||
%mb = load <64 x i1>, <64 x i1>* %y
|
||||
%mc = and <64 x i1> %ma, %mb
|
||||
%md = xor <64 x i1> %ma, %mb
|
||||
%me = or <64 x i1> %mc, %md
|
||||
%ret = bitcast <64 x i1> %me to i64
|
||||
ret i64 %ret
|
||||
}
|
||||
|
|
|
|||
|
|
@ -32,12 +32,11 @@ define void @mask8_mem(i8* %ptr) {
|
|||
define i8 @mand8(i8 %x, i8 %y) {
|
||||
; CHECK-LABEL: mand8:
|
||||
; CHECK: ## BB#0:
|
||||
; CHECK-NEXT: kmovb %edi, %k0
|
||||
; CHECK-NEXT: kmovb %esi, %k1
|
||||
; CHECK-NEXT: kandb %k1, %k0, %k2
|
||||
; CHECK-NEXT: kxorb %k1, %k0, %k0
|
||||
; CHECK-NEXT: korb %k0, %k2, %k0
|
||||
; CHECK-NEXT: kmovb %k0, %eax
|
||||
; CHECK-NEXT: movl %edi, %eax
|
||||
; CHECK-NEXT: xorl %esi, %eax
|
||||
; CHECK-NEXT: andl %esi, %edi
|
||||
; CHECK-NEXT: orl %eax, %edi
|
||||
; CHECK-NEXT: movb %dil, %al
|
||||
; CHECK-NEXT: retq
|
||||
%ma = bitcast i8 %x to <8 x i1>
|
||||
%mb = bitcast i8 %y to <8 x i1>
|
||||
|
|
@ -47,3 +46,22 @@ define i8 @mand8(i8 %x, i8 %y) {
|
|||
%ret = bitcast <8 x i1> %me to i8
|
||||
ret i8 %ret
|
||||
}
|
||||
|
||||
define i8 @mand8_mem(<8 x i1>* %x, <8 x i1>* %y) {
|
||||
; CHECK-LABEL: mand8_mem:
|
||||
; CHECK: ## BB#0:
|
||||
; CHECK-NEXT: kmovb (%rdi), %k0
|
||||
; CHECK-NEXT: kmovb (%rsi), %k1
|
||||
; CHECK-NEXT: kandb %k1, %k0, %k2
|
||||
; CHECK-NEXT: kxorb %k1, %k0, %k0
|
||||
; CHECK-NEXT: korb %k0, %k2, %k0
|
||||
; CHECK-NEXT: kmovb %k0, %eax
|
||||
; CHECK-NEXT: retq
|
||||
%ma = load <8 x i1>, <8 x i1>* %x
|
||||
%mb = load <8 x i1>, <8 x i1>* %y
|
||||
%mc = and <8 x i1> %ma, %mb
|
||||
%md = xor <8 x i1> %ma, %mb
|
||||
%me = or <8 x i1> %mc, %md
|
||||
%ret = bitcast <8 x i1> %me to i8
|
||||
ret i8 %ret
|
||||
}
|
||||
|
|
|
|||
|
|
@ -1869,48 +1869,34 @@ define <4 x float> @mask_v4f32_4127(<4 x float> %a, <4 x float> %b) {
|
|||
define <4 x float> @mask_v4f32_0127(<4 x float> %a, <4 x float> %b) {
|
||||
; SSE2-LABEL: mask_v4f32_0127:
|
||||
; SSE2: # BB#0:
|
||||
; SSE2-NEXT: andps {{.*}}(%rip), %xmm0
|
||||
; SSE2-NEXT: andps {{.*}}(%rip), %xmm1
|
||||
; SSE2-NEXT: orps %xmm1, %xmm0
|
||||
; SSE2-NEXT: shufps {{.*#+}} xmm0 = xmm0[3,0],xmm1[2,0]
|
||||
; SSE2-NEXT: shufps {{.*#+}} xmm1 = xmm1[0,1],xmm0[2,0]
|
||||
; SSE2-NEXT: movaps %xmm1, %xmm0
|
||||
; SSE2-NEXT: retq
|
||||
;
|
||||
; SSE3-LABEL: mask_v4f32_0127:
|
||||
; SSE3: # BB#0:
|
||||
; SSE3-NEXT: andps {{.*}}(%rip), %xmm0
|
||||
; SSE3-NEXT: andps {{.*}}(%rip), %xmm1
|
||||
; SSE3-NEXT: orps %xmm1, %xmm0
|
||||
; SSE3-NEXT: shufps {{.*#+}} xmm0 = xmm0[3,0],xmm1[2,0]
|
||||
; SSE3-NEXT: shufps {{.*#+}} xmm1 = xmm1[0,1],xmm0[2,0]
|
||||
; SSE3-NEXT: movaps %xmm1, %xmm0
|
||||
; SSE3-NEXT: retq
|
||||
;
|
||||
; SSSE3-LABEL: mask_v4f32_0127:
|
||||
; SSSE3: # BB#0:
|
||||
; SSSE3-NEXT: andps {{.*}}(%rip), %xmm0
|
||||
; SSSE3-NEXT: andps {{.*}}(%rip), %xmm1
|
||||
; SSSE3-NEXT: orps %xmm1, %xmm0
|
||||
; SSSE3-NEXT: shufps {{.*#+}} xmm0 = xmm0[3,0],xmm1[2,0]
|
||||
; SSSE3-NEXT: shufps {{.*#+}} xmm1 = xmm1[0,1],xmm0[2,0]
|
||||
; SSSE3-NEXT: movaps %xmm1, %xmm0
|
||||
; SSSE3-NEXT: retq
|
||||
;
|
||||
; SSE41-LABEL: mask_v4f32_0127:
|
||||
; SSE41: # BB#0:
|
||||
; SSE41-NEXT: pxor %xmm2, %xmm2
|
||||
; SSE41-NEXT: pblendw {{.*#+}} xmm0 = xmm2[0,1,2,3,4,5],xmm0[6,7]
|
||||
; SSE41-NEXT: pblendw {{.*#+}} xmm2 = xmm1[0,1,2,3,4,5],xmm2[6,7]
|
||||
; SSE41-NEXT: por %xmm2, %xmm0
|
||||
; SSE41-NEXT: blendps {{.*#+}} xmm0 = xmm1[0,1,2],xmm0[3]
|
||||
; SSE41-NEXT: retq
|
||||
;
|
||||
; AVX1-LABEL: mask_v4f32_0127:
|
||||
; AVX1: # BB#0:
|
||||
; AVX1-NEXT: vpxor %xmm2, %xmm2, %xmm2
|
||||
; AVX1-NEXT: vpblendw {{.*#+}} xmm0 = xmm2[0,1,2,3,4,5],xmm0[6,7]
|
||||
; AVX1-NEXT: vpblendw {{.*#+}} xmm1 = xmm1[0,1,2,3,4,5],xmm2[6,7]
|
||||
; AVX1-NEXT: vpor %xmm0, %xmm1, %xmm0
|
||||
; AVX1-NEXT: retq
|
||||
;
|
||||
; AVX2-LABEL: mask_v4f32_0127:
|
||||
; AVX2: # BB#0:
|
||||
; AVX2-NEXT: vpxor %xmm2, %xmm2, %xmm2
|
||||
; AVX2-NEXT: vpblendd {{.*#+}} xmm0 = xmm2[0,1,2],xmm0[3]
|
||||
; AVX2-NEXT: vpblendd {{.*#+}} xmm1 = xmm1[0,1,2],xmm2[3]
|
||||
; AVX2-NEXT: vpor %xmm0, %xmm1, %xmm0
|
||||
; AVX2-NEXT: retq
|
||||
; AVX-LABEL: mask_v4f32_0127:
|
||||
; AVX: # BB#0:
|
||||
; AVX-NEXT: vblendps {{.*#+}} xmm0 = xmm1[0,1,2],xmm0[3]
|
||||
; AVX-NEXT: retq
|
||||
%1 = bitcast <4 x float> %a to <2 x i64>
|
||||
%2 = bitcast <4 x float> %b to <2 x i64>
|
||||
%3 = and <2 x i64> %1, <i64 0, i64 -4294967296>
|
||||
|
|
@ -1923,47 +1909,38 @@ define <4 x float> @mask_v4f32_0127(<4 x float> %a, <4 x float> %b) {
|
|||
define <4 x i32> @mask_v4i32_0127(<4 x i32> %a, <4 x i32> %b) {
|
||||
; SSE2-LABEL: mask_v4i32_0127:
|
||||
; SSE2: # BB#0:
|
||||
; SSE2-NEXT: andps {{.*}}(%rip), %xmm0
|
||||
; SSE2-NEXT: andps {{.*}}(%rip), %xmm1
|
||||
; SSE2-NEXT: orps %xmm1, %xmm0
|
||||
; SSE2-NEXT: shufps {{.*#+}} xmm0 = xmm0[3,0],xmm1[2,0]
|
||||
; SSE2-NEXT: shufps {{.*#+}} xmm1 = xmm1[0,1],xmm0[2,0]
|
||||
; SSE2-NEXT: movaps %xmm1, %xmm0
|
||||
; SSE2-NEXT: retq
|
||||
;
|
||||
; SSE3-LABEL: mask_v4i32_0127:
|
||||
; SSE3: # BB#0:
|
||||
; SSE3-NEXT: andps {{.*}}(%rip), %xmm0
|
||||
; SSE3-NEXT: andps {{.*}}(%rip), %xmm1
|
||||
; SSE3-NEXT: orps %xmm1, %xmm0
|
||||
; SSE3-NEXT: shufps {{.*#+}} xmm0 = xmm0[3,0],xmm1[2,0]
|
||||
; SSE3-NEXT: shufps {{.*#+}} xmm1 = xmm1[0,1],xmm0[2,0]
|
||||
; SSE3-NEXT: movaps %xmm1, %xmm0
|
||||
; SSE3-NEXT: retq
|
||||
;
|
||||
; SSSE3-LABEL: mask_v4i32_0127:
|
||||
; SSSE3: # BB#0:
|
||||
; SSSE3-NEXT: andps {{.*}}(%rip), %xmm0
|
||||
; SSSE3-NEXT: andps {{.*}}(%rip), %xmm1
|
||||
; SSSE3-NEXT: orps %xmm1, %xmm0
|
||||
; SSSE3-NEXT: shufps {{.*#+}} xmm0 = xmm0[3,0],xmm1[2,0]
|
||||
; SSSE3-NEXT: shufps {{.*#+}} xmm1 = xmm1[0,1],xmm0[2,0]
|
||||
; SSSE3-NEXT: movaps %xmm1, %xmm0
|
||||
; SSSE3-NEXT: retq
|
||||
;
|
||||
; SSE41-LABEL: mask_v4i32_0127:
|
||||
; SSE41: # BB#0:
|
||||
; SSE41-NEXT: pxor %xmm2, %xmm2
|
||||
; SSE41-NEXT: pblendw {{.*#+}} xmm0 = xmm2[0,1,2,3,4,5],xmm0[6,7]
|
||||
; SSE41-NEXT: pblendw {{.*#+}} xmm2 = xmm1[0,1,2,3,4,5],xmm2[6,7]
|
||||
; SSE41-NEXT: por %xmm2, %xmm0
|
||||
; SSE41-NEXT: pblendw {{.*#+}} xmm0 = xmm1[0,1,2,3,4,5],xmm0[6,7]
|
||||
; SSE41-NEXT: retq
|
||||
;
|
||||
; AVX1-LABEL: mask_v4i32_0127:
|
||||
; AVX1: # BB#0:
|
||||
; AVX1-NEXT: vpxor %xmm2, %xmm2, %xmm2
|
||||
; AVX1-NEXT: vpblendw {{.*#+}} xmm0 = xmm2[0,1,2,3,4,5],xmm0[6,7]
|
||||
; AVX1-NEXT: vpblendw {{.*#+}} xmm1 = xmm1[0,1,2,3,4,5],xmm2[6,7]
|
||||
; AVX1-NEXT: vpor %xmm0, %xmm1, %xmm0
|
||||
; AVX1-NEXT: vpblendw {{.*#+}} xmm0 = xmm1[0,1,2,3,4,5],xmm0[6,7]
|
||||
; AVX1-NEXT: retq
|
||||
;
|
||||
; AVX2-LABEL: mask_v4i32_0127:
|
||||
; AVX2: # BB#0:
|
||||
; AVX2-NEXT: vpxor %xmm2, %xmm2, %xmm2
|
||||
; AVX2-NEXT: vpblendd {{.*#+}} xmm0 = xmm2[0,1,2],xmm0[3]
|
||||
; AVX2-NEXT: vpblendd {{.*#+}} xmm1 = xmm1[0,1,2],xmm2[3]
|
||||
; AVX2-NEXT: vpor %xmm0, %xmm1, %xmm0
|
||||
; AVX2-NEXT: vpblendd {{.*#+}} xmm0 = xmm1[0,1,2],xmm0[3]
|
||||
; AVX2-NEXT: retq
|
||||
%1 = bitcast <4 x i32> %a to <2 x i64>
|
||||
%2 = bitcast <4 x i32> %b to <2 x i64>
|
||||
|
|
|
|||
|
|
@ -2140,40 +2140,31 @@ define <8 x i16> @shuffle_v8i16_8012345u(<8 x i16> %a) {
|
|||
define <8 x i16> @mask_v8i16_012345ef(<8 x i16> %a, <8 x i16> %b) {
|
||||
; SSE2-LABEL: mask_v8i16_012345ef:
|
||||
; SSE2: # BB#0:
|
||||
; SSE2-NEXT: andps {{.*}}(%rip), %xmm0
|
||||
; SSE2-NEXT: andps {{.*}}(%rip), %xmm1
|
||||
; SSE2-NEXT: orps %xmm1, %xmm0
|
||||
; SSE2-NEXT: shufps {{.*#+}} xmm0 = xmm0[3,0],xmm1[2,0]
|
||||
; SSE2-NEXT: shufps {{.*#+}} xmm1 = xmm1[0,1],xmm0[2,0]
|
||||
; SSE2-NEXT: movaps %xmm1, %xmm0
|
||||
; SSE2-NEXT: retq
|
||||
;
|
||||
; SSSE3-LABEL: mask_v8i16_012345ef:
|
||||
; SSSE3: # BB#0:
|
||||
; SSSE3-NEXT: andps {{.*}}(%rip), %xmm0
|
||||
; SSSE3-NEXT: andps {{.*}}(%rip), %xmm1
|
||||
; SSSE3-NEXT: orps %xmm1, %xmm0
|
||||
; SSSE3-NEXT: shufps {{.*#+}} xmm0 = xmm0[3,0],xmm1[2,0]
|
||||
; SSSE3-NEXT: shufps {{.*#+}} xmm1 = xmm1[0,1],xmm0[2,0]
|
||||
; SSSE3-NEXT: movaps %xmm1, %xmm0
|
||||
; SSSE3-NEXT: retq
|
||||
;
|
||||
; SSE41-LABEL: mask_v8i16_012345ef:
|
||||
; SSE41: # BB#0:
|
||||
; SSE41-NEXT: pxor %xmm2, %xmm2
|
||||
; SSE41-NEXT: pblendw {{.*#+}} xmm0 = xmm2[0,1,2,3,4,5],xmm0[6,7]
|
||||
; SSE41-NEXT: pblendw {{.*#+}} xmm2 = xmm1[0,1,2,3,4,5],xmm2[6,7]
|
||||
; SSE41-NEXT: por %xmm2, %xmm0
|
||||
; SSE41-NEXT: pblendw {{.*#+}} xmm0 = xmm1[0,1,2,3,4,5],xmm0[6,7]
|
||||
; SSE41-NEXT: retq
|
||||
;
|
||||
; AVX1-LABEL: mask_v8i16_012345ef:
|
||||
; AVX1: # BB#0:
|
||||
; AVX1-NEXT: vpxor %xmm2, %xmm2, %xmm2
|
||||
; AVX1-NEXT: vpblendw {{.*#+}} xmm0 = xmm2[0,1,2,3,4,5],xmm0[6,7]
|
||||
; AVX1-NEXT: vpblendw {{.*#+}} xmm1 = xmm1[0,1,2,3,4,5],xmm2[6,7]
|
||||
; AVX1-NEXT: vpor %xmm0, %xmm1, %xmm0
|
||||
; AVX1-NEXT: vpblendw {{.*#+}} xmm0 = xmm1[0,1,2,3,4,5],xmm0[6,7]
|
||||
; AVX1-NEXT: retq
|
||||
;
|
||||
; AVX2-LABEL: mask_v8i16_012345ef:
|
||||
; AVX2: # BB#0:
|
||||
; AVX2-NEXT: vpxor %xmm2, %xmm2, %xmm2
|
||||
; AVX2-NEXT: vpblendd {{.*#+}} xmm0 = xmm2[0,1,2],xmm0[3]
|
||||
; AVX2-NEXT: vpblendd {{.*#+}} xmm1 = xmm1[0,1,2],xmm2[3]
|
||||
; AVX2-NEXT: vpor %xmm0, %xmm1, %xmm0
|
||||
; AVX2-NEXT: vpblendd {{.*#+}} xmm0 = xmm1[0,1,2],xmm0[3]
|
||||
; AVX2-NEXT: retq
|
||||
%1 = bitcast <8 x i16> %a to <2 x i64>
|
||||
%2 = bitcast <8 x i16> %b to <2 x i64>
|
||||
|
|
|
|||
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
Loading…
Reference in New Issue