forked from OSchip/llvm-project
Live intervals for live-in registers should begin at the beginning of a basic block, not at the first
instruction. Also, their valno's should have an unknown def. This has no effect currently, but was causing issues when StrongPHIElimination was enabled. llvm-svn: 56231
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@ -624,7 +624,11 @@ void LiveIntervals::handleLiveInRegister(MachineBasicBlock *MBB,
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MachineBasicBlock::iterator mi = MBB->begin();
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unsigned baseIndex = MIIdx;
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unsigned start = baseIndex;
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unsigned end = start;
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while (baseIndex / InstrSlots::NUM < i2miMap_.size() &&
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getInstructionFromIndex(baseIndex) == 0)
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baseIndex += InstrSlots::NUM;
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unsigned end = baseIndex;
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while (mi != MBB->end()) {
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if (mi->killsRegister(interval.reg, tri_)) {
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DOUT << " killed";
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@ -659,7 +663,7 @@ exit:
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}
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}
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LiveRange LR(start, end, interval.getNextValue(start, 0, VNInfoAllocator));
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LiveRange LR(start, end, interval.getNextValue(~0U, 0, VNInfoAllocator));
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interval.addRange(LR);
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interval.addKill(LR.valno, end);
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DOUT << " +" << LR << '\n';
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@ -676,11 +680,6 @@ void LiveIntervals::computeIntervals() {
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// Track the index of the current machine instr.
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unsigned MIIndex = 0;
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// Skip over empty initial indices.
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while (MIIndex / InstrSlots::NUM < i2miMap_.size() &&
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getInstructionFromIndex(MIIndex) == 0)
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MIIndex += InstrSlots::NUM;
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for (MachineFunction::iterator MBBI = mf_->begin(), E = mf_->end();
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MBBI != E; ++MBBI) {
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MachineBasicBlock *MBB = MBBI;
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@ -699,6 +698,11 @@ void LiveIntervals::computeIntervals() {
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true);
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}
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// Skip over empty initial indices.
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while (MIIndex / InstrSlots::NUM < i2miMap_.size() &&
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getInstructionFromIndex(MIIndex) == 0)
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MIIndex += InstrSlots::NUM;
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for (; MI != miEnd; ++MI) {
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DOUT << MIIndex << "\t" << *MI;
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