[X86] Don't disassemble wbinvd with 0xf2 or 0x66 prefix.

The 0xf3 prefix has been defined as wbnoinvd on Icelake Server. So
the prefix isn't ignored by the CPU. AMD documentation suggests that
wbnoinvd is treated as wbinvd on older processors. Intel documentation
is not clear. Perhaps 0xf2 and 0x66 are treated the same, but its
not documented.

This patch changes TB to PS in the td file so 0xf2 and 0x66 will
be treated as errors. This matches versions of objdump after
wbnoinvd was added.

llvm/lib/Target/X86/X86InstrSystem.td

@@ -447,7 +447,7 @@ let Defs = [EAX, EBX, ECX, EDX], Uses = [EAX, ECX] in
 // Cache instructions
 let SchedRW = [WriteSystem] in {
 def INVD : I<0x08, RawFrm, (outs), (ins), "invd", []>, TB;
-def WBINVD : I<0x09, RawFrm, (outs), (ins), "wbinvd", [(int_x86_wbinvd)]>, TB;
+def WBINVD : I<0x09, RawFrm, (outs), (ins), "wbinvd", [(int_x86_wbinvd)]>, PS;
 
 // wbnoinvd is like wbinvd, except without invalidation
 // encoding: like wbinvd + an 0xF3 prefix

llvm/test/MC/Disassembler/X86/invalid-wbinvd.txt

@@ -0,0 +1,4 @@
+# RUN: llvm-mc --disassemble %s -triple=x86_64 2>&1 | FileCheck %s
+
+# CHECK: invalid instruction encoding
+0xf2,0x0f,0x09

llvm/test/MC/Disassembler/X86/x86-32.txt

@@ -866,6 +866,9 @@
 # CHECK: ptwritel %eax
 0xf3 0x0f 0xae 0xe0
 
+# CHECK: wbinvd
+0x0f 0x09
+
 # CHECK: wbnoinvd
 0xf3 0x0f 0x09
 

llvm/test/MC/Disassembler/X86/x86-64.txt

@@ -553,6 +553,9 @@
 # CHECK: ptwriteq %rax
 0xf3 0x48 0x0f 0xae 0xe0
 
+# CHECK: wbinvd
+0x0f 0x09
+
 # CHECK: wbnoinvd
 0xf3 0x0f 0x09