forked from OSchip/llvm-project
[AArch64][GlobalISel] Make <4 x s16> G_ASHR and G_LSHR legal.
Selection support for these is coming up.
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@ -144,6 +144,7 @@ AArch64LegalizerInfo::AArch64LegalizerInfo(const AArch64Subtarget &ST)
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{v4s32, v4s32},
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{v2s64, v2s64},
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{v16s8, v16s8},
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{v4s16, v4s16},
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{v8s16, v8s16}})
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.clampScalar(1, s32, s64)
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.clampScalar(0, s32, s64)
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@ -382,3 +382,31 @@ body: |
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%2:_(<4 x s16>) = G_SHL %0, %1
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$d0 = COPY %2
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...
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---
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name: test_lshr_v4i16
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body: |
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bb.0:
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; CHECK-LABEL: name: test_lshr_v4i16
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; CHECK: [[COPY:%[0-9]+]]:_(<4 x s16>) = COPY $d0
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; CHECK: [[COPY1:%[0-9]+]]:_(<4 x s16>) = COPY $d1
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; CHECK: [[LSHR:%[0-9]+]]:_(<4 x s16>) = G_LSHR [[COPY]], [[COPY1]](<4 x s16>)
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; CHECK: $d0 = COPY [[LSHR]](<4 x s16>)
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%0:_(<4 x s16>) = COPY $d0
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%1:_(<4 x s16>) = COPY $d1
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%2:_(<4 x s16>) = G_LSHR %0, %1
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$d0 = COPY %2
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...
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---
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name: test_ashr_v4i16
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body: |
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bb.0:
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; CHECK-LABEL: name: test_ashr_v4i16
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; CHECK: [[COPY:%[0-9]+]]:_(<4 x s16>) = COPY $d0
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; CHECK: [[COPY1:%[0-9]+]]:_(<4 x s16>) = COPY $d1
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; CHECK: [[ASHR:%[0-9]+]]:_(<4 x s16>) = G_ASHR [[COPY]], [[COPY1]](<4 x s16>)
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; CHECK: $d0 = COPY [[ASHR]](<4 x s16>)
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%0:_(<4 x s16>) = COPY $d0
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%1:_(<4 x s16>) = COPY $d1
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%2:_(<4 x s16>) = G_ASHR %0, %1
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$d0 = COPY %2
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...
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