[x64] Process the B field of the REX prefix correctly for the PUSH and POP

instructions

Summary: This patch makes `x86AssemblyInspectionEngine` to process zero value of
the `B` field of the `REX` prefix in a correct way for `PUSH` and `POP`
instructions. MSVC sometimes emits `pushq %rbp` instruction as `0x40 0x55`, and
it was not parsed correctly before.

Reviewers: jasonmolenda, labath

Reviewed By: jasonmolenda, labath

Subscribers: abidh, lldb-commits

Tags: #lldb

Differential Revision: https://reviews.llvm.org/D57745

llvm-svn: 353281
This commit is contained in:
Aleksandr Urakov 2019-02-06 08:48:30 +00:00
parent bb3609e49d
commit 823c66b617
2 changed files with 58 additions and 4 deletions

View File

@ -364,8 +364,8 @@ bool x86AssemblyInspectionEngine::push_reg_p(int &regno) {
uint8_t *p = m_cur_insn;
int regno_prefix_bit = 0;
// If we have a rex prefix byte, check to see if a B bit is set
if (m_wordsize == 8 && *p == 0x41) {
regno_prefix_bit = 1 << 3;
if (m_wordsize == 8 && (*p & 0xfe) == 0x40) {
regno_prefix_bit = (*p & 1) << 3;
p++;
}
if (*p >= 0x50 && *p <= 0x57) {
@ -562,8 +562,8 @@ bool x86AssemblyInspectionEngine::pop_reg_p(int &regno) {
uint8_t *p = m_cur_insn;
int regno_prefix_bit = 0;
// If we have a rex prefix byte, check to see if a B bit is set
if (m_wordsize == 8 && *p == 0x41) {
regno_prefix_bit = 1 << 3;
if (m_wordsize == 8 && (*p & 0xfe) == 0x40) {
regno_prefix_bit = (*p & 1) << 3;
p++;
}
if (*p >= 0x58 && *p <= 0x5f) {

View File

@ -1415,6 +1415,34 @@ TEST_F(Testx86AssemblyInspectionEngine, TestPushEBP) {
EXPECT_EQ(-8, regloc.GetOffset());
}
TEST_F(Testx86AssemblyInspectionEngine, TestPushRBPWithREX) {
UnwindPlan::Row::RegisterLocation regloc;
UnwindPlan::RowSP row_sp;
uint8_t data[] = {
0x40, 0x55, // pushq %rbp
0x90 // nop
};
AddressRange sample_range(0x1000, sizeof(data));
UnwindPlan unwind_plan(eRegisterKindLLDB);
std::unique_ptr<x86AssemblyInspectionEngine> engine64 = Getx86_64Inspector();
EXPECT_TRUE(engine64->GetNonCallSiteUnwindPlanFromAssembly(
data, sizeof(data), sample_range, unwind_plan));
row_sp = unwind_plan.GetRowForFunctionOffset(2);
EXPECT_EQ(2ull, row_sp->GetOffset());
EXPECT_TRUE(row_sp->GetCFAValue().GetRegisterNumber() == k_rsp);
EXPECT_TRUE(row_sp->GetCFAValue().IsRegisterPlusOffset() == true);
EXPECT_EQ(16, row_sp->GetCFAValue().GetOffset());
EXPECT_TRUE(row_sp->GetRegisterInfo(k_rbp, regloc));
EXPECT_TRUE(regloc.IsAtCFAPlusOffset());
EXPECT_EQ(-16, regloc.GetOffset());
}
TEST_F(Testx86AssemblyInspectionEngine, TestPushESI) {
UnwindPlan::Row::RegisterLocation regloc;
UnwindPlan::RowSP row_sp;
@ -1913,6 +1941,32 @@ TEST_F(Testx86AssemblyInspectionEngine, TestPopEBP) {
EXPECT_FALSE(row_sp->GetRegisterInfo(k_ebp, regloc));
}
TEST_F(Testx86AssemblyInspectionEngine, TestPopRBPWithREX) {
UnwindPlan::Row::RegisterLocation regloc;
UnwindPlan::RowSP row_sp;
AddressRange sample_range;
UnwindPlan unwind_plan(eRegisterKindLLDB);
std::unique_ptr<x86AssemblyInspectionEngine> engine = Getx86_64Inspector();
uint8_t data[] = {
0x40, 0x55, // pushq %rbp
0x40, 0x5d, // popq %rbp
0x90 // nop
};
sample_range = AddressRange(0x1000, sizeof(data));
EXPECT_TRUE(engine->GetNonCallSiteUnwindPlanFromAssembly(
data, sizeof(data), sample_range, unwind_plan));
row_sp = unwind_plan.GetRowForFunctionOffset(4);
EXPECT_EQ(4ull, row_sp->GetOffset());
EXPECT_TRUE(row_sp->GetCFAValue().GetRegisterNumber() == k_rsp);
EXPECT_TRUE(row_sp->GetCFAValue().IsRegisterPlusOffset() == true);
EXPECT_EQ(8, row_sp->GetCFAValue().GetOffset());
EXPECT_FALSE(row_sp->GetRegisterInfo(k_rbp, regloc));
}
TEST_F(Testx86AssemblyInspectionEngine, TestPopESI) {
UnwindPlan::Row::RegisterLocation regloc;
UnwindPlan::RowSP row_sp;