forked from OSchip/llvm-project
[x64] Process the B field of the REX prefix correctly for the PUSH and POP
instructions Summary: This patch makes `x86AssemblyInspectionEngine` to process zero value of the `B` field of the `REX` prefix in a correct way for `PUSH` and `POP` instructions. MSVC sometimes emits `pushq %rbp` instruction as `0x40 0x55`, and it was not parsed correctly before. Reviewers: jasonmolenda, labath Reviewed By: jasonmolenda, labath Subscribers: abidh, lldb-commits Tags: #lldb Differential Revision: https://reviews.llvm.org/D57745 llvm-svn: 353281
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@ -364,8 +364,8 @@ bool x86AssemblyInspectionEngine::push_reg_p(int ®no) {
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uint8_t *p = m_cur_insn;
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int regno_prefix_bit = 0;
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// If we have a rex prefix byte, check to see if a B bit is set
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if (m_wordsize == 8 && *p == 0x41) {
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regno_prefix_bit = 1 << 3;
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if (m_wordsize == 8 && (*p & 0xfe) == 0x40) {
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regno_prefix_bit = (*p & 1) << 3;
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p++;
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}
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if (*p >= 0x50 && *p <= 0x57) {
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@ -562,8 +562,8 @@ bool x86AssemblyInspectionEngine::pop_reg_p(int ®no) {
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uint8_t *p = m_cur_insn;
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int regno_prefix_bit = 0;
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// If we have a rex prefix byte, check to see if a B bit is set
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if (m_wordsize == 8 && *p == 0x41) {
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regno_prefix_bit = 1 << 3;
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if (m_wordsize == 8 && (*p & 0xfe) == 0x40) {
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regno_prefix_bit = (*p & 1) << 3;
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p++;
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}
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if (*p >= 0x58 && *p <= 0x5f) {
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@ -1415,6 +1415,34 @@ TEST_F(Testx86AssemblyInspectionEngine, TestPushEBP) {
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EXPECT_EQ(-8, regloc.GetOffset());
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}
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TEST_F(Testx86AssemblyInspectionEngine, TestPushRBPWithREX) {
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UnwindPlan::Row::RegisterLocation regloc;
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UnwindPlan::RowSP row_sp;
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uint8_t data[] = {
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0x40, 0x55, // pushq %rbp
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0x90 // nop
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};
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AddressRange sample_range(0x1000, sizeof(data));
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UnwindPlan unwind_plan(eRegisterKindLLDB);
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std::unique_ptr<x86AssemblyInspectionEngine> engine64 = Getx86_64Inspector();
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EXPECT_TRUE(engine64->GetNonCallSiteUnwindPlanFromAssembly(
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data, sizeof(data), sample_range, unwind_plan));
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row_sp = unwind_plan.GetRowForFunctionOffset(2);
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EXPECT_EQ(2ull, row_sp->GetOffset());
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EXPECT_TRUE(row_sp->GetCFAValue().GetRegisterNumber() == k_rsp);
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EXPECT_TRUE(row_sp->GetCFAValue().IsRegisterPlusOffset() == true);
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EXPECT_EQ(16, row_sp->GetCFAValue().GetOffset());
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EXPECT_TRUE(row_sp->GetRegisterInfo(k_rbp, regloc));
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EXPECT_TRUE(regloc.IsAtCFAPlusOffset());
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EXPECT_EQ(-16, regloc.GetOffset());
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}
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TEST_F(Testx86AssemblyInspectionEngine, TestPushESI) {
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UnwindPlan::Row::RegisterLocation regloc;
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UnwindPlan::RowSP row_sp;
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@ -1913,6 +1941,32 @@ TEST_F(Testx86AssemblyInspectionEngine, TestPopEBP) {
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EXPECT_FALSE(row_sp->GetRegisterInfo(k_ebp, regloc));
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}
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TEST_F(Testx86AssemblyInspectionEngine, TestPopRBPWithREX) {
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UnwindPlan::Row::RegisterLocation regloc;
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UnwindPlan::RowSP row_sp;
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AddressRange sample_range;
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UnwindPlan unwind_plan(eRegisterKindLLDB);
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std::unique_ptr<x86AssemblyInspectionEngine> engine = Getx86_64Inspector();
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uint8_t data[] = {
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0x40, 0x55, // pushq %rbp
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0x40, 0x5d, // popq %rbp
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0x90 // nop
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};
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sample_range = AddressRange(0x1000, sizeof(data));
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EXPECT_TRUE(engine->GetNonCallSiteUnwindPlanFromAssembly(
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data, sizeof(data), sample_range, unwind_plan));
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row_sp = unwind_plan.GetRowForFunctionOffset(4);
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EXPECT_EQ(4ull, row_sp->GetOffset());
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EXPECT_TRUE(row_sp->GetCFAValue().GetRegisterNumber() == k_rsp);
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EXPECT_TRUE(row_sp->GetCFAValue().IsRegisterPlusOffset() == true);
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EXPECT_EQ(8, row_sp->GetCFAValue().GetOffset());
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EXPECT_FALSE(row_sp->GetRegisterInfo(k_rbp, regloc));
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}
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TEST_F(Testx86AssemblyInspectionEngine, TestPopESI) {
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UnwindPlan::Row::RegisterLocation regloc;
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UnwindPlan::RowSP row_sp;
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